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Analog Measurement Module

The AMMl Analog Measurement Module combines two important Series 500 functions
into a single module: the AMMl performs analog signal conditioning and switching,
and A/D conversion. The analog section of the module provides signal selection and
programmable gain for both local and global analog signals connected to the Series 500.
After analog conditioning, signals are routed to the AID converter section of the
module for the analog-to-digital conversion process.

The AMMl has a total of eight local single-ended inputs with unity (xl) local gain. In-
put signals are applied through on-card screw terminals. Global conditioning consists of
a high-speed software-controlled gain amplifier with programmable xl, x2, x5, and x10
gain values. Since all analog inputs connected to the Series 500 pass through the global
circuitry, these gain values can be applied to any analog input in the system.

For A/D conversion, the AMMl utilizes a K&bit successive approximation converter that
provides fast, accurate measurement and conversion. A maximum conversion time of
only 25psec and a sample-and-hold acquisition time of 3~s allow sampling rates as high
as 35.7kHz. To maximize resolution, the AMMl has five A/D converter ranges (three
bipolar, two unipolar) that can be selected by on-card DIP switches.

The AMMl is designed to be used only in slot 1 of the system baseboard. To install the
module, first remove the baseboard top cover and install the module in slot 1 with the
component side facing the power supply.

CAUTION: Always turn off the system power before installing or removing modules.
To minimize the possibility of EM1 radiation, always operate the system with the top
cover in place and properly secured.

User-Configured Components

User-configured components for the AMMl include the input screw terminals and the
switches that control A/D converter ranges, as surnmarized in Table 1. For the locations
of these components, refer to Figure 1.

Table 1. AMMl User-Configured Components

Description Designation Function
Screw Terminals Local inputs, channels O-7
DIP Switch Set SlOl A/D Converter range

All local input signals are applied to screw terminals, which are designed to accept
16-24 gage wire stripped 3116of an inch.

Document Number: 500-910-01F&v. B AMMl-1

C-H 1

\ /
PI77 PI78
Switch SlOl controls the input range of the A/D converter located on the module.
Available bipolar ranges include -10 to +lOV, -5 to +5V, and -2.5 to +2.5V. The
unipolar ranges are 0 to +lOV and 0 to +5V.


Local input signals for channels 0 through 7 of the AMMl are applied to screw ter-
minals located at the back edge of the board. The channel numbers are marked on the
board and are shown in Figure 1. Typical connections for channel 0 are shown in
Figure 2. Note that the high side of the input signal is applied to the channel 0 ter-
minal, and the low side of the signal is connected to module ground.







Figure 2. Typical Connection (Channel 0 Shown)

CAUTION: AMMl inputs are non-isolated, meaning that one side of the input is con-
nected to power line ground. Any signal connected to the AMMl must also be
referenced to power line ground, or module or system damage may occur. Also note
the inaccuracies on other channels may result.

In many situations, shielded cable may be required to minimize EM1 radiation, or to
keep noise to a minimum. If shielded cable is used, connect the shield to ground only,
and do not use the shield as a signal carrying lead. Usually, a module ground terminal
should be used, but in some cases better results may be obtained by using one of the
baseboard ground posts instead. Use the configuration that results in the lowest noise.

For shielding to be effective, the shield must contain both high and low signal wires,
and must not carry any other signals. If a number of AMMl signal input lines are
shielded, all shields should be connected to the same ground terminal.

A/D Converter Range Selection

As shipped, the Ah&I1 is set up for the i-1OV range, but the module may be recon-
figured to one of four other ranges by setting the five DIP switches located on SlOl to
the correct positions, as summarized in Table 2. To set the A/D converter to a specific
range, first turn off system power and then set the switches to the correct positions,
either open (off) or closed (on). For example, for the 0 to +5V range, switches 1, 3 and
4 should be closed (on), and switches 2 and 5 should be open (off).

NOTE: The module must be recalibrated if the range is changed. Turn to the Calibra-
tion Section of this chapter for AMMl calibration information.

Table 2. 901 Settings for the A/D Converter Ranges

DIP Switches
Input Range 1 2 3 4 5
-10 to +lov* Open Closed Open Open Closed
-5 to +5v Open Open Closed Open Closed
-2.5 to +2.5V Open Open Closed Closed Closed
0 to +5v Closed Open Closed Closed Open
0 to +lov Closed Open Closed Open Open

*Factory default value
NOTE: A/D converter must be recalibrated if range is changed.

Signal Conditioning

A simplified block diagram of the AMMl is shown in Figure 3. The module is divided
into four general sections: a local multiplexer, a global multiplexer, a programmable gain
amplifier (PGA) and a XI-bit AID converter.

Local input signals from channels 0 to 7 are applied to the local multiplexer for selec-
tion. At any given time, only one channel will be selected, as determined by the
SELECT CHANNEL command (covered later in this section). The signal from the
selected channel is then routed to the global multiplexer for further signal selection and

The global multiplexer selects a single signal from among the 10 slots in the signal. In
this manner, signals from any of the Xl slots can be selected by software. The global
multiplexer is controlled by the SELECT SLOT command, discussed later in this

After the signal is selected, the PGA applies software-selectable gains of xl, x2, x5, or
x10. When this signal conditioning process is complete, the signal is routed to the l2-bit
AID converter for digitization. After the conversion process, digital data representing
the applied signal travels via the baseboard and interface card to the host computer.

(9 MAXIMUM) xl, x2, x5OR x10

Input Filtering

Noise introduced into the input signal can corrupt the accuracy of the measurement.
Such noise will usually be seen as an unsteady reading that jumps around, or, in some
cases, as a constant offset. In the former case, the presence of noise will usually be
quite obvious, but its effects may not be noticeable in the steady-state offset situation.
Regardless of the type of noise, however, such unwanted signals can degrade measure-
ment accuracy considerably if enough of the unwanted signal is present.

Frequently, noise is introduced into the signal from 50 or 6OHz power sources. In many
cases, such noise can be attenuated by shielding the input signal lines, as discussed
earlier. In more difficult situations, however, it may be necessary to filter the input
signal to achieve the necessary noise reduction.

When noise is a problem, a single-pole low-pass filter like the one shown in Fiie 4
can be conntected between the input signal and the corresponding AMMl channel.
Note that the filter is made up of a single capacitor and resistor with the capacitor con-
nected between the AMMl channel input terminal and the module ground terminal.
The resistor is then placed in series with the high input signal lead.

f -3dB = -



Figure 4. Input Filtering

A common yardstick for a simple filter like the one in Figure 4 is the -3dB or half-
power point, which is given as follows:

f-J, = -

where f is in Hz, C is in farads, and R is in ohms. Above this frequency, filter response
will roll off (decrease) at a rate of -2OdB per decade. Thus, each time the frequency in-
creases by a factor of lo, the filter output voltage decreases by a factor of 10 (-20dB).

Although such filtering can quiet down a noisy signal, there is a trade-off in the form
of increased response time. This response time may be important in the case of a rapid-
ly changing input signal. For the filter in Figure 4, the response time to 1% of final
value is 4.6RC, while the response time to 0.1% and 0.01% of final value are 6.9RC and
9.2RC, respectively.

As an example, assume that 10 counts of 6OHz noise is present in the input signal. To
reduce the noise to one count, an attenuation factor of I.0 (-20dB) at 6OHz will be
necessary. Thus, the filter should have a -3dB point of 6Hz.

To determine the relative RC values, the above equations can be rearrange to solve for
either R or C. If we wish to choose a nominal capacitor value and then solve for the
resistance, we have:


Choosing a nominal value of 2$ for C, the necessary resistance is:

2n(2 x 10-6)x 6Hz

I? = 13.263k3

The resulting response times with these R and C values would be:

t(l%) = 4.6RC = 122ms
t(O.l%) = 6.9RC = 183ms
t(O.Ol%) = 9.2RC = 244ms

Note that there are a number of RC values that can be used in a given situation. To
minimize the effects of the series resistance, however, it is recommended that the value
of R be kept under 20kQ.

Current-to-Voltage Conversion

AMMl local inputs are designed to accept voltages in the range of flOV. Thus, the
AMMl can be directly connected to many signal sources. Some transducers and in-
strumentation, however, provide current outputs that must be converted into voltages in
order to be measured through an AMMl input channel.

When connecting current inputs to the AMMl, a resistor should be installed across the
input to make the necessary current-to-voltage conversion. One end of the resistor
should be connected to the channel input terminals and the other end of the resistor
should be connected to module ground.

The value of the resistor can be determined from Ohms law as follows:

R = E/I

Where R is the resistance in ohms, E is the maximum desired voltage in volts (usually
the upper range limit of the A/D converter), and I is the maximum anticipated current
in amps.

As an example, assume the AID converter range is 0 to +5V and that the expected cur-
rent lies in the range of 4 to 2OmA. The required resistance is:

R = S/O.02

R = 25061

Thus, a 25OBresistor should be installed across the input of the channel in question
(note that a 2500 value is required when using Soft500 engineering units conversion).
Since current measurement accuracy is directly related to the accuracy of the resistor,
use the smallest tolerance resistor available (typically &O.l%). Suitable 2503 precision
resistors can be purchased from Dale Resistors, RN. RN55E25008.

Analog-to-Digital Converter Timing

When programmin g high-speed sampling sequences, certain timing constraints concern-
ing the A/D conversion cycle should be kept in mind. When the A/D START command
is issued, the converter immediately begins to assess the value of the signal, a process
that takes from 20 to 25~s to complete. During this period, the sample-and-hold cir-
cuitry remains in the hold mode, freezing the signal for the duration of the analog-to-
digital conversion process. When the conversion has been completed, the new data is
available for reading, and the sample-and-hold circuitry returns automatically to sample
mode and begins to track the signal once again.

Because the signal may have changed significantly since the beginning of the last con-
version, the sample-and-hold circuitry requires some time to adjust to the new signal
voltage level. This time period is known as the "acquisition time" of the sample-and-
hold circuitry and is typically 3~ for the AMh41 module. Thus, to ensure accuracy, a
new conversion should not be triggered for at least 3~ following completion of the last
conversion, and a total of 28~s must be allowed from the start of each conversion to the
start of the next one (note that these times are automatically taken into account when
using Soft500).

To increase system throughput, data latches have been provided on the AMMl, making
data from the previous conversion available while the converter is busy processing
another reading. The data is refreshed (updated) as soon as the converter has finished
its current assessment (25~s after a conversion is triggered).

Using Additional Analog-to-Digital Modules

Some situations may call for the use of an additional A/D converter module in the
system to supplement the A/D capabilities of the AMMl. In particular, it may be
desirable to increase the resolution of the system by using a 14-bit ADM2 A/D converter
in slot 2.

Note that only one AMMl can be used in a given system since that module must be
placed in slot 1.

When using an additional A/D converter module, the analog signal output of the
AMMl will be routed to that module via the daisy chain pathway on the system
baseboard. Thus, it would be possible to process certain analog channels through the
built-in l2-bit A/D converter of the AMMl, and route other, more critical signals
through a separate U-bit ADM2 module located in slot 2.


Commands used with the AMMl are summarized in Table 3. Note that several com-
mands share the CMDA and CMDB locations. The selected command will depend on
whether a read or write operation is performed, as indicated in the table.

Table 3. Commands Used with the AMMl

Command Address Signal line


Location: CFFBO

The SELECT CHANNEL command is used to control the local signal multiplexer on the
AMMl, thus determining which of the local input channels is selected for A/D conver-
sion. This command affects only those signals connected to the AMMl local inputs,
and does not affect input channels connected to modules located in other slots.
SELECT CHANNEL must be used in conjunction with the SELECT SLOT command
(discussed below) issued with a value of 1 in order to select slot 1.

To select the desired channel, write the appropriate value to the SELECT CHANNEL
location, as sumfnarize d in `lhble 4. For example, if channel 7 is to be selected, write
that value to the SELECT CHANNEL location, from BASIC, this value can be written
with the POKE statement.

Table 4. Values Written to the SELECT CHANNEL Location

Function Binary Hex Decimal
Channel0 00000 HO 0
Channel 1 00001 Hl 1

Channel 2
3 00010
00011 H2
H3 z
Channel 4 00100 H4 4
Channel 5 OOlOl H5 5
Channel 6 00110 H6 6
Channel 7 00111 H7 7


Location: CFF81

The SELECT SLOT command controls the global multiplexer on the AMMl, selecting
the appropriate slot on the Series 500 baseboard from which to read the input channel.

The value to be written to the SELECT SLOT location is always the same as the
number of the slot to be selected, as summarized in Table 5. For example, if a signal
connected to a channel on the AhMl in slot 1 is to be selected, a value of 1 would be
written to SELECT SLOT (the channel must also be selected with SELECT CHANNEL
as discussed previously). Similarly, the values 2-10 would be written for slots 2-10
respectively. The BASIC POKE statement can be used to write the appropriate value to
the SELECT SLOT location.

As indicated in Table 5, there are other values besides slot numbers that can be writeen
to this location. These values select ground, +5V, and +lOV sources and are intended
primarily for diagnostic purposes.

Table 5. Values Written to the SELECT SLUT' Location

Function. Binary Hex Decimal
Ground (0 volts) 0000 HO 0
Slot 1 0001 Hl 1
Slot 2 oolo H2 2
Slot 3 OOll- H3 3
Slot 4 0100 H4 4
Slot 5 0101 H5 5
Slot 6 %l H6 6
Slot 7 H7 7
Slot 8 lOW H8 8
Slot 9 9
Slot l.0 E FE lo
+lOV Reference ml HD 13
Ground (0 volts) lllo HE 14
+5V Digital Power Supply 1111 HE 15


Location: CFF9A

The GLOBAL GAIN command controls the PGA (Progammable Gain Amplifier) located
on the AMMl module. Since all analog inputs are processed by the PGA, the GLOBAL
GAIN command affects every analog input connected to the Series 500. To avoid ran-
dom gain factors, this command must be issued at least once after the Series 500 has
been powered on. Once the gain value has been selected, it is not necessary to reissue
GLOBAL GAIN unless a different PGA gain is desired. The gain factor may, however,
be updated before each A/D conversion, as required.

Four programmable gain values, xl, x2, x5, and x10, are available with the PGA. These
gains are selected by writing the appropriate number to the GLOBAL GAIN location, as
summarized in Table 6. The BASIC POKE statement can be used to write to the desired
GLOBAL GAIN location. For example, to select a PGA gain of x5, the value 2 would be
written to the GLOBAL GAIN location.
Table 6. Values Written to the GLOBAL GAIN Location

PGA Gain Binary Decimal
xl 00 0
x2 01 1
x5 10 2
Xl0 11 3


Location: CFFSO

The A/D LOW DATA location is used to read the low byte of the results of the A/D
conversion process. Since the module incorporates data latches, one conversion may be
read while another conversion is in progress. To find out when data from one conver-
sion is available, use the A/D S`IARTKMTLJS command, discussed below.

A/D LOW DAL4 shares the CMDA location with the SELECT CHANNEL command.
Thus, A/D LOW DAM is a read-only command; do not attempt to write to A/D LOW
DAYI& as this may change the selected channel. To read AID LOW DATA from BASIC,
use the PEEK statement with the appropriate address in the argument.


Location: CFF8l

The A/D HIGH DATA command performs essentially the same function as the A/D
LOW DATA command, except that the high data byte is returned.

A/D HIGH DATA is a read-only command that shares the CMDB location with SELECT
SLOT. Any attempt to write to A/D HIGH DATA may alter the selected slot and give er-
roneous results.

Since the AMMl has a l2-bit converter, the four most significant bits of the high byte
returned by A/D HIGH DATA are not used. These four most significant bits will always
be set high and should be masked out when interpreting the reading. From Pascal or
BASIC, masking can be done by subtracting 240 from the high byte value (240 is the
value of the four most significant bits when all are high). From assembly language,
masking the high byte of the returned data can be performed by ANDing with HOE
Doing so will change the four most significant bits form ls to OS.

Once both the low and the high data bytes have been obtained, the total number of
counts representing A/D converter data can be determined with the following BASIC

CO = DL + 256*(DH-240)

CO represents the number of counts, and DL and DH are the low and high bytes
respectively. Since the AMMl uses a l2-bit converter, the number of counts will lie in
the range of 0 to 4095.


Location: CFF9B

The A/D START/ST4TLJScommand has two functions: to start the A/D conversion pro-
cess, and to determine whether or not the AID converter is busy processing a reading.

Writing to the A/D START/S'IATLJSlocation will trigger (start) the A/D conversion cycle.
Although any value (O-255) can be written to trigger a conversion, a value of 255 should
be used to minimize noise.

The A/D conversion cycle takes approximately 25~s. During this period, the converter
should not be re-triggered. Status of the converter can be checked by reading the A/D
START/STATLJS location. The returned value will depend on whether the converter is
ready or busy (see Table 7). To allow sufficient sample-and-hold settling time, a new
conversion should be triggered less than 3~s after the previous conversion has been

Table 7. Values Read from the A/D START/STATUS Location

Converter Status Binary HeX Decimal
Busy llllllll 255
Ready 01111111 H7F 127

This section contains calibration procedures for the AMMl module. Note that these pro-
, cedures are intended for use in the field and may not be as accurate as those used at
the factory. Calibration accuracy depends both on the accuracy of the equipment used
in the procedure as well as the skill of the individual. If you are not familiar with
calibration equipment, do not attempt AMMl calibration.

Environmental Conditions

Calibration should be performed at an ambient temperature of 23