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5 4 3 2 1
MS-9621 POWER BLOCK DIAGRAM
* 01 Power Block Diagram
D * 02 System Block Diagram D
* 03 Clock Block Diagram
04 GPIO setting & SMBus address
+12V_CPU
VCORE_P0
Switch Reg
05 CPU0 Power
06 CPU1 Power
* 07 DDR Power 1.8V
VCORE_P1
Switch Reg
* 08 MP_VTT & 1.5V
09 System Power
10 Clock
11 CPU0 Signal
+12V
12 CPU0 Power and GND
+1.8V
Switch Reg
13 CPU1 Signal
14 CPU1 Power and GND
15 ITP Port
C
* 16 MCH A C
* 17 MCH B
* 18 MCH C
* 19 DDRII DIMM A1
* 20 DDRII DIMM A2
* 21 DDRII DIMM A3
* 22 DDRII DIMM B1
* 23 DDRII DIMM B2
* 24 DDRII DIMM B3
25 PCI-E SLOT
26 BCM 5721
+1.5V 27 BCM 5705
+5V
Switch Reg MCH,HR
28 HR A
* 29 HR B
+1.2V 30 HR C
B
Switch Reg CPU0,CPU1 Terminator B
31 PCI-X SLOT 1,2
32 SCSI A
33 SCSI B
AVDD25
Linear Reg VGA 34 SCSI C
35 PCI32
36 VGA A
LAN_VAUX_25 37 VGA B
Linear Reg 38 IDE,SATA,FWH BIOS
LAN BCM5721 * 39 SIO
+3.3VDUAL LAN_VAUX_12 40 PRINTER PORT & COM & PS2
MOS Switch Linear Reg 41 HM
42 FAN Connector
VAUX_25 43 System logic
Linear Reg * 44 Layout Component
A LAN BCM5705 A
+5VSBY
+3.3VSBY VAUX_12
Linear Reg Linear Reg Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Power Block Diagram
Size Document Number Rev
http://laptop-motherboard-schematic.blogspot.com/ A3 MS-9621 1.0
Date: Friday, March 25, 2005 Sheet 1 of 44
5 4 3 2 1
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MS-9621 SYSTEM BLOCK DIAGRAM
CPU0 VRD CPU 0 CPU 1 CPU1 VRD
( NOCONA ) ( NOCONA)
D D
ITP DIMM B3 DIMM A3
1.2V VRD
NOTE: ALL COYOTE VARIANTS WILL ( FSB DIMM B2 DIMM A2
SUPPORT NOCONA PROCESSORS SB ( 800MT/S - 6.4GB/S )
VTT )
( EARLY JAYHAWK PROCESSORS ) DIMM B1 DIMM A1
SPLIT PLANE CONFIGURATION ONLY
RJ45
LAN PCI EXPRESS X1 ( 256KB/S Duplex )
DDR II ( 400MT/S -3.2GB/S )
BCM 5721
LAN VREG
( 2.5V & 1.2V ) MCH
DDR ( 400MT/S - 3.2GB/S )
PCI EXPRESS X4
( 2GB/S Duplex ) 1.8V VRD
CY20410
PCI EXPRESS ( SLOT # 5 )
( DDR II )
( CLOCK
C SYNTH/ C
DRVR )
SERIAL PORT ( BACK PANEL )
HUB INTERFACE 1.5
SERIAL PORT ( INTERNAL )
266 MB/s
SIO
FLOPPY
FWH ( PC87366 )
PS/2 KEYBOARD
FRONT PANEL HDR PS/2 MOUSE
LPC
PCI-X 66MHZ ( 528MB/S )
B B
USB PORT# 0 REAR USB
PCI-X 66MHZ
USB PORT# 1 REAR USB
PCI-X 66MHZ
PCI 32-BIT 33MHZ 5V ( 133MB/S )
Hance Rapids
USB PORT# 2 FRONT USB
PCI 32/33 5V ( SLOT # 1 )
S-ATA
S-ATA
USB PORT# 3 FRONT USB
S-ATA
VGA LAN
S-ATA
ATI Rage XL BCM 5705
Fan Speed
Hard Monitor
SECONDARY ATA-100
Control
Circuitry ADT7463
PRIMARY ATA-100
LAN VREG
( 2.5V & 1.2V )
A A
RJ45
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
System Block Diagram
Size Document Number Rev
IDE IDE
http://laptop-motherboard-schematic.blogspot.com/ A3 MS-9621 1.0
Date: Friday, March 25, 2005 Sheet 2 of 44
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MS-9621 CLOCK BLOCK DIAGRAM
D D
P0_BCLK_P/N (200MHZ)
CPU3 BCLK(P/N-1/0) CPU0
2
P1_BCLK_P/N (200MHZ)
CPU3 BCLK(P/N-1/0) CPU1 DDRA_CMDCLK_P/N0
2
2
DDRA_CMDCLK_P/N1
2
DDRA_CMDCLK_P/N2
DDRII 400 DIMM #
DDRII 400 DIMM #
DDRII 400 DIMM #
DDRII 400 DIMM #
DDRII 400 DIMM #
DDRII 400 DIMM #
MCH_BCLK_P/N (200MHZ)
CPU1 2
2 DDRA_CMDCLK_P/N3
MCH
MCH_66CLK 2
3V66_0 DDRB_CMDCLK_P/N0
2
A1
B1
A2
B2
A3
B3
DDRB_CMDCLK_P/N1
SIO_48CLK 2
DOY_48 DDRB_CMDCLK_P/N2
SIO_33CLK SIO 2
PCIF2
2
C SRC C
MCH_100CLK_P/N 25MHZ
Crystal
PCI_SLOT_33CLK
PCI2 PCI 32/33 ( SLOT # 1 ) BCM 5721
25MHZ
Crystal
2 2
14.318MHZ
Crystal
BCM 5705 DIFF1 DIFF7
REF1
PCI_VGA_33CLK DB800 (SRC-DIFFERENTIAL BUFFER)
PCI6 ATI RAGE-XL
DIFF4 DIFF5
FWH_33CLK
PCI4 FWH
2
2
SLOT1_100CLK_P/N
32.768KHZ
Crystal
B ICH_66CLK B
3V66_3 ICH_100CLK_P/N
ICH_48CLK
USB_48
ICH_33CLK Hance Rapids
PCI0
ICH_14CLK
REF0
HR_66CLK
3V66_2
PX_CLK_SLOT1
PX_CLK_SLOT2
PX_CLK_SCSI
PCI EXPRESS X4 SLOT # 4
PCI-X SLOT # 2
PCI-X SLOT # 1
A 80MHZ A
U320 SCSI AIC7901 Osc
AIC_CLKINP
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Clock Block Diagram
http://laptop-motherboard-schematic.blogspot.com/ Size
C
Document Number
MS-9621
Rev
1.0
Date: Friday, March 25, 2005 Sheet 3 of 44
5 4 3 2 1
5 4 3 2 1
ICH-HR GPIO [6:7] internal pull up
GPIO Pin Type Function Power Well Device Address CLOCK
GPIO Pin Type Function Power well GPIO00 I/O NC Main DIMM1 0xA0 DDR_A_CMDCLK_P0/N0
GPIO0 I PX_REQJ2 Main GPIO01 I/O NC Main DIMM2 0xA8 DDR_B_CMDCLK_P0/N0
GPIO1 I NC Main GPIO02 I/O NC Main DIMM3 0xA2 DDR_A_CMDCLK_P1/N1
GPIO2 I SIO_SMI_N Main GPIO03 I/O NC Main DIMM4 0xAA DDR_B_CMDCLK_P1/N1
D D
GPIO3 I MCH_GPEJ Main GPIO04 I/O NC Main DIMM5 0xA4 DDR_A_CMDCLK_P2/N2
GPIO4 I MCH_PMEJ Main GPIO05 I/O NC Main DIMM6 0xAC DDR_B_CMDCLK_P2/N2
GPIO5 I DUMP_SW Main GPIO06 I/O KBRSTJ Main
GPIO6 I HM1_ALERTJ Main GPIO07 I/O CPU_A20GATE Main
GPIO7 I HM0_ALERTJ Main GPIO10 I/O SIO_SMI_N Main
DEVICE INT REQ#/GNT# IDSEL CLOCK
GPIO8 I PX_PMEJ Resume GPIO11 I/O NC Main
PCI 1 PIRQ#A REQ#0/GNT#0 AD20 PCI0
GPIO11 I SMBAlERT_N Resume GPIO12 I/O NC Main
PIRQ#B
GPIO12 I WAKE_N Resume GPIO13 I/O NC Main
PIRQ#C
GPIO13 I PCIE_SIO_WAKEJ Resume GPIO15 I/O NC Main
PIRQ#D
GPIO16 O PX_GNTJ2 Main GPIO16 I/O MTR1J Main
GPIO17 O NC Main GPIO17 I/O DR1J Main VGA PIRQ#C REQ#1/GNT#1 AD21 PCI6
GPIO18 O NC Main GPIO20 I/O NC Main LAN PIRQ#D REQ#2/GNT#2 AD22 PCIF2
GPIO19 O NC Main GPIO21 I/O NC Main PCIX1 PXIRQ#0 PXREQ#0/PXGNT#0 PXAD17 PXPCLK00
GPIO20 O SCSI_ENABLE Main GPIO22 I/O NC Main PXIRQ#1
GPIO21 O NC Main GPIO23 I/O NC Main PXIRQ#2
GPIO22 O SATALED Main GPIO24 I/O CPU0_FORCEPRJ Main PXIRQ#3
GPIO23 O NC Main GPIO25 I/O CPU1_FORCEPRJ Main PCIX2 PXIRQ#1 PXREQ#1/PXGNT#1 PXAD18 PXPCLK01
GPIO24 I/O SYS_LED Resume GPIO26 I/O NC Main PXIRQ#2
GPIO25 I/O PLLSEL0 Resume GPIO27 I/O NC Main PXIRQ#3
C C
GPIO27 I/O PLLSEL1 Resume GPIO30 I/O NC Main PXIRQ#0
GPIO28 I/O LAN_ENABLE Resume GPIO31 I/O NC Main SCSI PXIRQ#2 PXREQ#2/PXGNT#2 PXAD19 PXPCLK02
GPIO32 I/O NC Main GPIO32 I/O NC Main
GPIO33 I/O PX_IRQJ0 Main GPIO33 I/O NC Main
GPIO34 I/O PX_IRQJ1 Main GPIO34 I/O NC Main
GPIO35 I/O PX_IRQJ2 Main GPIOE0 I/O COLD_WOL_EN Standby
GPIO36 I/O PX_IRQJ3 Main GPIOE1 I/O NC Standby
GPIO37 I/O NC Main GPIOE2 I/O PLED Standby
GPIO38 I/O NC Main GPIOE3 I/O IPMB_ALT2 Standby
GPIO39 I/O BIOS_WPJ Main GPIOE4 I/O IPMB_ALT1 Standby
GPIO40 I/O CONFIG1 Main GPIOE5 I/O NC Standby
GPIO41 I/O CONFIG0 Main GPIE6 I NC Standby
GPIO42 I/O CPU1_IERR Main GPIE7 I NC Standby
GPIO43 I/O CPU0_IERR Main GPOS0 O PWBTOUTJ Standby
GPIO56 O NC Resume GPOS1 O PSONJ Standby
GPIO57 O NC Resume GPIS2 I PWBTIN Standby
GPIS3 I SLPS3J Standby
B B
A A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
SMBus Block Diagram
http://laptop-motherboard-schematic.blogspot.com/ Size
C
Document Number
MS-9621
Rev
1.0
Date: Friday, March 25, 2005 Sheet 4 of 44
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5 4 3 2 1
JPWR2
+12V_CPU0
1 8 +5V 56 degree VIN0
GND +12V +12V
2 GND +12V 7 base on 3.0 G CPU
3 6 C552 CHOCK2 CH-1.1U25A 1u16VC5KX7R 330u16VFP
GND +12V +12V_CPU1
4 5 4.7u6.3VX5R-0805
GND +12V
1
1
1
C10
47p50VC3JNPO C3 C4 C5 + TC6 + TC3 + TC4
26
POWERCONN2X4 U5 47p50VC3JNPO
VR0_EN 27 21 PWM01
VCC
43 VR0_EN IN EN PWM1 ISEN01
R570 2KR3F
2
2
2
43 VRM0_PWRGD OUT 2 PGOOD ISEN1 20
CPU0_VID4 3
11,12,41 CPU0_VID[0..5] IN CPU0_VID3 VID4
D 4 0.1u16VC3KX7R 330u16VFP 330u16VFP D
CPU0_VID2 VID3 PWM02 VIN0
5 VID2 PWM2 22
CPU0_VID1 6 23 R571 2KR3F ISEN02
CPU0_VID0 VID1 ISEN2
0B CHANGE 7 VID0
CPU0_VID5 8 VID12.5 +5V
R51 24.9KR3F C6 13 18 PWM03
COMP PWM3
5
5
3300p50VC3KX7R 19 R568 2KR3F ISEN03 Q2 Q9
C7 220p50VC3KNPO ISEN3 C8
1 1
12 +5V 2 2 1u16VC5KX7R
R67 2.2KR3F FB R572 8.2K R554
14 VDIFF PWM4 25 3 3
R68 200R3F C58 24 2.2R-0805