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Compal Confidential
KALG1 M/B Schematics Document
2 2
Intel Penryn Processor with Cantiga + DDRIII + ICH9M
2009-03-02
REV 02
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4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/11/10 Deciphered Date 2008/11/24 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 1 of 45
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Compal Confidential
Model Name : KALG1
Intel Penryn Processor Thermal Sensor Clock Generator
File Name : LA-5271P Fan Control
page 4
EMC 1402 ICS9LPRS387
1
uPGA-478 Package page 4 page 16 1
(Socket P) page 4,5,6
FSB
H_A#(3..35) 667/800/1066MHz H_D#(0..63)
HDMI Conn. LCD Conn. CRT Conn.
page 24 page 17 page 18
Memory BUS(DDRIII) 204pin DDRIII-SO-DIMM X2
Intel Cantiga
TMDS LVDS Dual Channel BANK 0, 1, 2, 3 page 14,15
LVDS uFCBGA-1329 1.5V DDRIII 800
HDMI PCI-Express
page 7,8,9,10,11,12,13
ASM1442T
page 24
LS-4494P
DMI C-Link USB conn x3 Bluetooth CMOS Finger Print
AES1610
USB port 0, 1, 6 Conn Camera
2 2
page 29 page 29 page 17 page 29
www.laptopblue.com PCI-Express
S-ATA
Intel ICH9-M 3.3V 48MHz USB
3.3V 24.576MHz/48Mhz HD Audio
BGA-676 Card Reader
LAN(GbE) MINI Card x1 NEW Card page 20,21,22,23 RTS5159-GR
ATHEROS AR8131 WLAN page 25
page 26 page 28 page 28 GMCH HDA MDC 1.5 HDA Codec
port 2
port 1
port 0
Conn 32 ALC888S-VC
page 08 page page 33
RJ45 ESATA CDROM SATA HDD
page 27
Conn. Conn. Conn. Audio AMP
3
page 29 page 23 page 23 APA2051 3
page 34
LPC BUS
ENE KB926 Phone Jack x3
page 30 page 34
RTC CKT.
page 20
Int.KBD
Touch Pad page 31
page 31
Power On/Off CKT.
page 32
DC/DC Interface CKT. BIOS CIR
page 31 page 30
page 37
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Power Circuit DC/DC
page 38,39,40,41,42,43
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/11/10 Deciphered Date 2008/11/24 Title
POWER SW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
Page 36 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 2 of 45
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SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.75VS 0.75VS power rail for DDR3 terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.5V 1.5V power rail for HDA ON ON OFF
+1.5VS 1.5V switched power rail ON OFF OFF Board ID / SKU ID Table for AD channel
+1.8V 1.8V power rail for NB(LVDS) ON ON OFF Vcc 3.3V +/- 5%
+3VALW 3.3V always on power rail ON ON ON* Ra/Rc/Re 100K +/- 5%
+3V_LAN 3.3V power rail for LAN ON ON ON Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3V 3.3V power rail for SB ON ON OFF 0 0 0 V 0 V 0 V
+3VS 3.3V switched power rail ON OFF OFF 1
+5VALW 5V always on power rail ON ON ON* 2
+5V 5V power rail for SB ON ON OFF 3
+5VS 5V switched power rail ON OFF OFF 4
+VSB VSB always on power rail ON ON ON* 5
+RTCVCC RTC power ON ON ON 6
7
2 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOARD ID Table
Board ID PCB Revision
External PCI Devices 0 PCB 08Y LA-5271P REV0 M/B
1
Device IDSEL# REQ#/GNT# Interrupts
2
3
4
5
6
7
EC SM Bus1 address EC SM Bus2 address BTO Option Table
3 3
Device Address Device Address BTO Item BOM Structure
Smart Battery 0001 011X b EMC1402 1001 100X b GL40 GL40@
GM45 GM45@
BOM Configuration Table
Project BOM Configuration
ICH9M SM Bus address KALG1-GM45 GM45@/KALG1@/KAL90_G0_90+@
Device Address
KALG1-GL40 GL40@/KALG1@/KAL90_G0_90+@
Clock Generator 1101 001Xb
(ICS9LPRS387, SLG8SP556V)
DDR3 DIMMA 1001 000Xb
DDR3 DIMMB 1001 010Xb
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/11/10 Deciphered Date 2008/11/24 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 3 of 45
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5 4 3 2 1
H_A#[3..35]
[7] H_A#[3..35]
H_REQ#[0..4]
[7] H_REQ#[0..4]
H_RS#[0..2]
[7] H_RS#[0..2]
FAN1 Conn
JCPU1A +5VS
D H_A#3 J4 H1 C81 10U_0805_10V4Z +5VS D
A[3]# ADS# H_ADS# [7]
ADDR GROUP_0
ADDR GROUP_0
H_A#4 L5 E2 H_BNR# [7] 1 2
H_A#5 A[4]# BNR#
L4 A[5]# BPRI# G5 H_BPRI# [7]
1
H_A#6 K5
H_A#7 A[6]# U4 D16
M3 A[7]# DEFER# H5 H_DEFER# [7]
H_A#8 N2 F21 1 8 1SS355_SOD323-2
A[8]# DRDY# H_DRDY# [7] VEN GND
H_A#9 J1 E1 2 7
A[9]# DBSY# H_DBSY# [7] VIN GND
H_A#10 N3 +VCC_FAN1 3 6
2
H_A#11 A[10]# VO GND
P5 A[11]# BR0# F1 H_BR0# [7] [30] EN_DFAN1 2 R43 1 4 VSET GND 5 D15
H_A#12 P2 300_0402_5% 1 2
A[12]#
CONTROL
H_A#13 L2 D20 H_IERR# 1 APL5605KI-TRL SOP 8P
H_A#14 A[13]# IERR# C73 BAS16_SOT23-3
P4 A[14]# INIT# B3 H_INIT# [20]
H_A#15 P1 C88
H_A#16 A[15]# 0.1U_0402_16V4Z 10U_0805_10V4Z
R1 A[16]# LOCK# H4 H_LOCK# [7] 2
[7] H_ADSTB#0 M1 ADSTB[0]# 1 2
C1 H_RESET# H_RESET# [7]
H_REQ#0 RESET# H_RS#0 +3VS C82
K3 REQ[0]# RS[0]# F3
H_REQ#1 H2 F4 H_RS#1 1000P_0402_50V7K
H_REQ#2 REQ[1]# RS[1]# H_RS#2
K2 REQ[2]# RS[2]# G3 1 2
1
H_REQ#3 J3 G2 H_TRDY# [7]
H_REQ#4 REQ[3]# TRDY# R46
L1 REQ[4]#
G6 10K_0402_5%
HIT# H_HIT# [7]
H_A#17 Y2 E4 40mil
A[17]# HITM# H_HITM# [7]
H_A#18 U5 JP27
2
H_A#19 A[18]# +VCC_FAN1
R3 A[19]# BPM[0]# AD4 1
ADDR GROUP_1
ADDR GROUP_1
H_A#20 W6 AD3
A[20]# BPM[1]# [30] FAN_SPEED1 2
H_A#21 U4 AD1
H_A#22 A[21]# BPM[2]# +1.05VS 3
Y5 A[22]# BPM[3]# AC4 1
XDP/ITP SIGNALS
H_A#23 U1 AC2 C83 ACES_85205-03001
C H_A#24 A[23]# PRDY# XDP_BPM#5 1000P_0402_50V7K CONN@ C
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK
A[25]# TCK
1
H_A#26 XDP_TDI 2
T3 A[26]# TDI AA6
H_A#27 W2 AB3 R48 @
H_A#28 A[27]# TDO XDP_TMS
W5 A[28]# TMS AB5 56_0402_5%
H_A#29 Y4 AB6 XDP_TRST#
H_A#30 A[29]# TRST# XDP_DBRESET#
U2 C20 XDP_DBRESET# [21]
2
H_A#31 A[30]# DBR#
V4 A[31]#
H_A#32 W3 A[32]#
2
B
H_A#33 AA4 THERMAL
H_A#34 A[33]#
AB2 A[34]#
E
E
H_A#35 AA3 D21 H_PROCHOT# 3 1 OCP# [21]
A[35]# PROCHOT#
C
V1 A24 H_THERMDA
[7] H_ADSTB#1 ADSTB[1]# THERMDA Q5 +1.05VS
B25 H_THERMDC
THERMDC MMBT3904_SOT23-3
[20] H_A20M# A6 A20M#
ICH
ICH
A5 C7 H_THERMTRIP# [8,20] @
[20] H_FERR# FERR# THERMTRIP#
[20] H_IGNNE# C4 IGNNE#
D5 XDP_TDI R108 1 2 54.9_0402_1%
[20] H_STPCLK# STPCLK#
[20] H_INTR C6 LINT0 H CLK
[20] H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK [16] left NC if no ITP
[20] H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# [16]
XDP_TMS R109 1 2 54.9_0402_1% 39Ohm
M4 RSVD[01]
N5 XDP_BPM#5 R117 1 @ 2 54.9_0402_1%
RSVD[02]
T2 RSVD[03] Layout Note:
V3 RSVD[04] H_THERMDA&H_THERMDC Trace / Space = 10 / 10 mil
RESERVED
B2 RSVD[05]
D2 H_PROCHOT# R53 2 1 56_0402_5%
B RSVD[06] B
D22 RSVD[07]
D3 H_IERR# R52 2 1 56_0402_5%
RSVD[08]
F6 RSVD[09]
Penryn XDP_TRST# R107 2 1 54.9_0402_1%
CONN@
XDP_TCK R116 1 2 54.9_0402_1%
+3VS
C90
0.1U_0402_16V4Z
1 2
U5
H_THERMDA
1 VDD SMCLK 8 EC_SMB_CK2 [30,31]
1
C92 2 7
DP SMDATA EC_SMB_DA2 [30,31]
2200P_0402_50V7K 3 6 1 2 +3VS
2 DN ALERT# R49
10K_0402_5%
BSEL2 BSEL1 BSEL0 BCLK H_THERMDC
4 THERM# GND 5
A A
0 0 0 266 EMC1402-1-ACZL-TR_MSOP8
0 1 0 200
Security Classification Compal Secret Data Compal Electronics, Inc.
0 1 1 166 Issued Date 2008/11/10 Deciphered Date 2008/11/24 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Penryn (1/3) & FAN Conn
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 4 of 45
5 4 3 2 1
5 4 3 2 1
H_D#[0..63] JCPU1C
H_D#[0..63] [7]
+CPU_CORE A7 VCC[001] VCC[068] AB20 +CPU_CORE
JCPU1B A9 AB7
H_D#0 H_D#32 VCC[002] VCC[069]
E22 D[0]# D[32]# Y22 A10 VCC[003] VCC[070] AC7
D H_D#1 F24 AB24 H_D#33 A12 AC9 D
H_D#2 D[1]# D[33]# H_D#34 VCC[004] VCC[071]
E26 D[2]# D[34]# V24