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MODEL: REV: CHANGE LIST: MODEL : ZH1 MB
1A FIRST RELEASE
PAGE FROM TO
2A PAGE02. 1.MODIFY BSEL0 & BSEL1 2.ADD PCIE CLOCK FOR SATA
PAGE03. 1.UN-STUFF R218 1 1A
PAGE05. 1.MODIFY BSEL0 & BSEL1 2. REMOVE M_OCDCOMP RESISTOR ( Intel Errta )
PAGE06. 1.MODIFY SDVO I2C BUS PULL HIGH TO 5.6K 2 2A
PAGE08. 1.MODIFY CAPACITOR P/N DUE TO ME ISSUE
ZH1 PAGE09. 1.MODIFY SO-DIMM SA0 & SA1 3 2A
D MotherBoard PAGE10. 1.MODIFY Q9,Q10 TO 2N7002 2. MODIFY RGB BEAD VALUE 3. DELETE SYNC BEFORE BUFFER RESISTOR 4. DELETE LCD_ON PULL DOWN RESISTOR
4 1A D
5.MODIFY LVDS CONNECTOR
PAGE11. 1.MODIFY ICH-6 PULL HIGH RESISTOR VALUE 2. MODIFY Azalia LAYOUT TOPOLOGY 3.ADD SATA CIRCUIT 4. LAN_RST# CONNECT TO PLTRST#
PAGE12. 1.MODIFY LAN POWER TO +1.5V & +3V (S3~S4 OFF) 5 2B
PAGE14. 1.MODIFY LAN RDAC TO 1.18K FOR IEEE TEST
PAGE15. 1.MODIFY IDSEL RESISTOR TO 150 OHM 6 2B 3A
PAGE16. 1.MODIFY 1394 POWER CLASS TO 30W 2.MODIFY CRYSTAL CL VALUE 3.ADD MOS FOR 1394 POWER
PAGE17. 1.MODIFY IDSEL RESISTOR TO 150 OHM 2. MODIFY Azalia LAYOUT TOPOLOGY 3. MODIFY USB COMMON CHOKE FOOTPRINT & P/N 7 2B
PAGE18. 1.MODIFY Azalia LAYOUT TOPOLOGY 2. DELETE R458 3. ADD DIODE FOR HPS
PAGE19. 1.MODIFY LED7,LED8 FOOTPRINT 2.ADD SATA INTERFACE HDD 3.REMOVE R465 , 6648_OV# USE PULL HIGH +3V 8 2B
PAGE20. 1.MODIFY IrDA C504 LOCATION
PAGE21. 1.MODIFY KB MATRIX 2. ADD PME & MAX6648_AL# 9 2A 3A
PAGE22. 1.MODIFY U18 FOOTPRINT
PAGE23. 1.MODIFY PR116 FROM 787/F TO 1.54K/F FOR CPU LOAD LINE 2.MODIFY PQ41 FROM SUD50N03-09P TO AOD404 FOR CPU EFFICIENCY 10 2A 3A
PAGE24. 1.REMOVE PQ2,PQ3,PR74 AND MOUNT PR57 FOR POWER SOURCE OF TURN ON MOSFET2.ADD PR136,PR137,PC132,PC133 FOR EMI REQUEST
PAGE25. 1.MODIFY PR78 NETNAME S5_ON CHANGE TO NETNAME SUSON 2.MODIFY PR80,PC89 FOR EMI REQUEST 3.MODIFY +VCCP POWER UP SEQUENCE 11 2B
PAGE26. 1.ADD PR138,PR139,PC134,PC135 FOR EMI REQUEST 2.REMOVE JP2,JP3
PAGE27. 1.REMOVE PC98 FOR ME REQUEST 2.MODIFY PR26 FROM 22K/F TO 12K/F FOR CONSTANT CURRENT LIMIT 12 2B

2B PAGE 05. MODIFY NB P/N 13 2A 3A
PAGE 06. MODIFY NB P/N
PAGE 07. MODIFY NB P/N 14 2A 3A
PAGE 08. MODIFY NB P/N
PAGE 11. MODIFY SB P/N 15 2A 3A
C PAGE 12. MODIFY SB P/N C
16 2A 3A
3A PAGE 06. ADD DVI SERIAL RESISTORS FOR EMI
PAGE 09. MODIFY DDR2 CONNECTOR P/N 17 2A 3A
PAGE 10. MODIFY RGB BEAD FROM 22 TO 30
PAGE 13. MODIFY CRYSTAL SERIAL RESISTOR R354 TO 200 OHM 18 2A 3A
PAGE 14. MODIFY PCI BUS
PAGE 15. MODIFY 1394 POWER SWITCH GATE ENABLE SIGNAL 19 2A
PAGE 16. MODIFY USB POWER SWITCH
PAGE 17. MODIFY AUDIO POWER & AMP INPUT CIRCUIT 20 2A
PAGE 18. MODIFY FAN & SW BOARD CONNECTOR P/N
PAGE 21. MODIFY RGB FOR EMI SOLUTION 21 2A 3A
PAGE 22. MODIFY CAPACITOR FOR NOISE
PAGE 23. STUFF SNUBBER CIRCUIT 22 2A 3A
PAGE 24. UN-STUFF PC23 & STUFF SNUBBER CIRCUIT
PAGE 25. STUFF SNUBBER CIRCUIT 23 2A 3A
PAGE 26. STUFF SNUBBER CIRCUIT
24 2A 3A
25 2A 3A
26 2A 3A

B B




A A




PROJECT : ZH1 APPROVE BY: JIM HSU DRAWING BY:JACKY CHENG REV 3A
COVER SHEET 1 OF 1
MB ASSY'S P/N : 31ZH1MB0001 PROJECT LEADER: JIM HSU DOCUMENT NO: 204 DATE :2004/12/16
Quanta Computer Inc.
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HOST 100/133MHz
ZH1 Block Diagram
PCI-E 100MHz

D DOTHAN D
VGA 96MHz
CLOCK GEN INTEL Mobile_479 CPU
ICS954206 USB 48MHz
Page : 3,4
DVI DVI
PCI 33MHz SiI1362
HOST BUS Page : 6 Docking
REF 14MHz 533MHz EXT_CRT
Page : 2 Page : 22
SDVO
DDR2-SODIMM Channel A
5VPCU Page : 9 TVOUT
ALVISO-GM
3V_591 DDR2 533MHz 1257 BGA CRT
5V / 3.3V / 10V RGB CRT INT_CRT
Channel B Page : 10
Page : 24 3V_S5 DDR2-SODIMM Switch
Page : 5 ~ 8 Page : 10
Page : 9 LVDS
3VSUS LVDS
Page : 10
C 5VSUS C
DMI I/F
+3V REQ2# GNT2# AD24 INT(B,D)

+5V PCI BUS
IDE - HDD ATA 66/100 MINI-PCI
+10V USB3
Page : 19 ICH6-M Wireless LAN
609 BGA USB 2.0 BT Modem/LAN
+1.8VSUS
Page : 17
SATA - SATA Page : 17
1.8V / 0.9V / 2.5V +1.8V
HDD Azalia
Page : 25 Page : 19
+0.9VSUS Page : 11,12 USB0,1,2
SYSTEM PCI BUS
+0.9V
PCI-E ext USB*3 SWITCH
LPC Page : 17
+2.5V
Page : 13

1.5V_S5
REQ0# GNT0# AD22 INTA Docking
1.5V / 1.05V +1.5V NS NS
B B
Page : 26 BROADCOM
AGP_VCC (+1.5V) KBC(87541) SIO (87383) 10/100/1G LAN LAN
Page : 21 Page : 20 Switch RJ45
1.2VCCT 4401 / 5788M Page : 14

VTT Page : 14
MDC 1.5
FIR Page : 17
VCC_CORE Touchpad Keyboard Page : 20 REQ1# GNT1# AD23 INT(A,C,D) 1394
CPU CORE
Page : 21 Page : 21 COM LPT Page: 16
Page : 23 AUDIO CODEC TI
STAC9200 AMP PCMCIA+1394
PS2 Page : 18 PCMCIA
BATTERY Docking +3 IN 1
Page: 15
CHARGER PCI7411
Page : 27 Page : 22 DOCKING AUDIO Page : 15,16
LINEIN HP INT
& MIC OUT SPK 3 IN 1
Page: 16
A A




PCI ROUTING TABLE IDSEL INTERUPT DEVICE PROJECT : ZH1
REQ0# / GNT0# AD22 INTA# BROADCOM LAN Quanta Computer Inc.
REQ2# / GNT2# AD24 INTB# , INTD# MINI-PCI Size Document Number Rev
BLOCK DIAGRAM 1A
REQ1# / GNT1# AD23 INTC#,INTD#,INTA# TI 7411
Date: Wednesday, January 19, 2005 Sheet 1 of 27
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HCLK_CPU R378 49.9/F_4
C460 REV:B MODIFY HCLK_CPU# R381 49.9/F_4
CKG_XIN
R370 12.1/F_4 14M_SIO HCLK_MCH R384 49.9/F_4
14M_SIO (19)




1
33p_4 U37 HCLK_MCH# R388 49.9/F_4
Y5 50 52 14M_REF0 R374 12.1/F_4 14M_ICH
XIN REF0 SELPSB2_CLK 14M_ICH (11)
14.318MHz 53 DOT96 R380 49.9/F_4
C459 REF1/FSC DOT96# R383 49.9/F_4
CKG_XOUT R_HCLK_CPU RN24 33_4P2R HCLK_CPU




2
49 XOUT CPUCLK0 44 4 3 HCLK_CPU (3)
43 R_HCLK_CPU# 2 1 HCLK_CPU# CLK_PCIE_SATA R488 0_4 REV:B MODIFY
CPUCLK0# HCLK_CPU# (3)
D 33p_4 CLK_PCIE_SATA# R489 0_4 D
SMBCK 46 41 R_HCLK_MCH RN26 4 3 33_4P2R HCLK_MCH W/O SATA : 0 OHM
SMCLK CPUCLK1 HCLK_MCH# HCLK_MCH (5)
SMBDT 47 40 R_HCLK_MCH# 2 1 CLK_PCIE_EZ1 R398 49.9/F_4 W SATA : 49.9 1% OHM
SMDAT CPUCLK1# HCLK_MCH# (5)
CLK_PCIE_EZ1# R402 49.9/F_4
CLK_EN# 10 14 R_DOT96 RN25 2 1 33_4P2R DOT96
(22) CLK_EN# VTT_PWRGD#/PD DOT_96 DOT96# DOT96 (5)
15 R_DOT96# 4 3 CLK_PCIE_EZ2 R394 49.9/F_4
DOT_96# DOT96# (5)
STP_CPU# 54 CLK_PCIE_EZ2# R396 49.9/F_4
(11,22) STP_CPU# CPU_STOP# DREFSSCLK
17 R_DREFSSCLK RN27 2 1 33_4P2R
96M_SS/SRC0 DREFSSCLK# DREFSSCLK (5)
STP_PCI# 55 18 R_DREFSSCLK# 4 3 CLK_PCIE_ICH R393 49.9/F_4
(11) STP_PCI# PCI/PCIE_STOP# 96M_SS#/SRC0# DREFSSCLK# (5)
CLK_PCIE_ICH# R395 49.9/F_4
SELPSB1_CLK 16 19
SELPSB1_CLK TEST_MODE/FSB SRC1
20 CLK_MCH_3GPLL R397 49.9/F_4
SRC1# CLK_MCH_3GPLL# R401 49.9/F_4
R391 475/F_4 39 22 R_PCIE_ICH RN28 2 1 33_4P2R CLK_PCIE_ICH
IREF SRC2 CLK_PCIE_ICH# CLK_PCIE_ICH (11)
23 R_PCIE_ICH# 4 3 DREFSSCLK R390 49.9/F_4
SRC2# CLK_PCIE_ICH# (11)
L55 DREFSSCLK# R392 49.9/F_4
VDDCKGPCI 1 24 R_MCH_3GPLL RN30 2 1 33_4P2R CLK_MCH_3GPLL
+3V VDDPCI1 SRC3 CLK_MCH_3GPLL# CLK_MCH_3GPLL (6)
7 25 R_MCH_3GPLL# 4 3
VDDPCI2 SRC3# CLK_MCH_3GPLL# (6)
ACB2012L_120 C453 C458 C464
26 R_PCIE_SATA RN32 2 1 *33_4P2R CLK_PCIE_SATA
SRC4_SATA CLK_PCIE_SATA# CLK_PCIE_SATA (11)
10u/6.3V_8 .01u_4 .01u_4 27 R_PCIE_SATA# 4 3 REV:B MODIFY
SRC4#_SATA# CLK_PCIE_SATA# (11)
PCLK_591 C463 *10p_4
48 31 R_PCIE_EZ1 RN31 4 3 33_4P2R CLK_PCIE_EZ1 PCLK_ICH C466 *10p_4
VDDREF SRC5 CLK_PCIE_EZ1# CLK_PCIE_EZ1 (21)
R362 1 VDDCKGREF 30 R_PCIE_EZ1# 2 1 PCLK_SIO C462 *10p_4
SRC5# CLK_PCIE_EZ1# (21)
PCLK_MINI C456 *10p_4
C469 .01u_4 33 R_PCIE_EZ2 RN29 4 3 33_4P2R CLK_PCIE_EZ2 PCLK_PCM C457 *10p_4
SRC6 CLK_PCIE_EZ2# CLK_PCIE_EZ2 (21)
32 R_PCIE_EZ2# 2 1 PCLK_LAN C461 *10p_4
SRC6# CLK_PCIE_EZ2# (21)
R361 2.2 VDDCKG48 11 CLK48_USB C467 *10p_4
VDD48 14M_SIO C197 *10p_4
ITPCLK/SRC7 36
C454 10u/6.3V_8 C470 .01u_4 35 14M_ICH C468 *10p_4
ITPCLK#/SRC7#
C L56 8 R_PCLK_591 R368 33_4 PCLK_591 C
ITP_EN/PCICLKF0 PCLK_ICH PCLK_591 (20)
VDDCKGCPU 21 9 R_PCLK_ICH R372 33_4
+3V VDDSRC1 SEL_96M#/PCICLKF1 PCLK_SIO PCLK_ICH (11)
28 56 R_PCLK_SIO R365 33_4
VDDSRC2 PCICLK2 PCLK_MINI PCLK_SIO (19)
ACB2012L_120 C484 C480 C481 C473 C479 34 3 R_PCLK_MINI R363 33_4
VDDSRC3 PCICLK3 PCLK_PCM PCLK_MINI (16)
42 4 R_PCLK_PCM R364 33_4
VDDCPU PCICLK4 PCLK_LAN PCLK_PCM (14)
10u/6.3V_8 .01u_4 .01u_4 .01u_4 .01u_4 5 R_PCLK_LAN R366 33_4
PCICLK5 PCLK_LAN (13)
SELPSB0_CLK R376 33_4 CLK48_USB
USB_48/FSA 12 CLK48_USB (11) 96MSS/SRC0 SELECT
R403 2.2 VDDACKG 37 2 0: 96MSS 1: SRC0
VDDA GND1 R_PCLK_ICH R375 1K_4
GND2 6
C483 C478 13
GND3 R_PCLK_591 R371 1K_4
GND4 29
10u/6.3V_8 .01u_4 45
GND5
38 GNDA GND6 51 ITP/SRC7 SELECT
ICS954206 0: SRC7 1: ITP




R399
+3V
2




8.2K_4
B SMBDT B
(11,21) PDAT_SMB 3 1 SMBDT (9)
Q26 2N7002

R400
+3V
2




8.2K_4

3 1 SMBCK
(11,21) PCLK_SMB SMBCK (9)
Q27 2N7002




+3V +VCCP REV:B MODIFY +VCCP
FSB SETTING
R385 R373
R379 FSC FSB FSA CPU SRC PCI
A
1K_4 1K_4 A
10K_4 FSA FSB FSC 1 0 1 100 100 33
R387 R369 0 0 1 133 100 33
SELPSB0_CLK SELPSB1_CLK SELPSB2_CLK
(4,5) BSEL1 (4,5) BSEL0
0 1 1 166 100 33
4.7K_4 4.7K_4 0 1 0 200 100 33
R377 R386 R367 0 0 0 266 100 33
1 0 0 333 100 33 PROJECT : ZH1
*1K_4 *1K_4 *1K_4 1 1 0 400 100 33
1 1 1 RSVD 100 33 Quanta Computer Inc.
Size Document Number Rev
CLOCK GENERATOR 2A

Date: Wednesday, January 19, 2005 Sheet 2 of 27
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+3V_S5


R417
HA#[31..3] U45A HD#[63..0]
(5) HA#[31..3] HD#[63..0] (5)
HA#3 P4 A19 HD#0 150/F_4
HA#4 A3# D0# HD#1 DBR#
U4 A25
HA#5
HA#6
V3
A4#
A5#
Dothan D1#
D2# A22 HD#2
HD#3
T126
R3 A6# D3# B21
HA#7 V2 A24 HD#4
HA#8 A7# D4# HD#5 +VCCP
D HA#9
W1
T4
A8# 1 OF 3 D5# B26
A21 HD#6 D
HA#10 A9# D6# HD#7
W2 A10# D7# B20
HA#11 Y4 C20 HD#8 IERR# R213 56_4
HA#12 A11# D8# HD#9
Y1 A12# D9# B24
HA#13 U1 D24 HD#10 CPUPWRGD R212 200/F_4
HA#14 A13# D10# HD#11
AA3 A14# D11# E24
HA#15 Y3 C26 HD#12
HA#16 A15# D12# HD#13
AA2 A16# D13# B23
HA#17 AF4 E23 HD#14
HA#18 A17# D14# HD#15
AC4 A18# D15# C25
HA#19 AC7 H23 HD#16
HA#20 A19# D16# HD#17 +VCCP
AC3 A20# D17# G25
HA#21 AD3 L23 HD#18
HA#22 A21# D18# HD#19
AE4 A22# D19# M26
HA#23 AD2 H24 HD#20 TDI R217 150/F_4
HA#24 A23# D20# HD#21
AB4 A24# D21# F25
HA#25 AC6 REQUEST DATA G24 HD#22 TMS R215 39.2/F_4
HA#26 A25# D22# HD#23
AD5 A26# PHASE PHASE D23# J23
HA#27 AE2 SIGNALS SIGNALS M23 HD#24 TDO R218 *54.9/F_4 REV:B MODIFY
HA#28 A27# D24# HD#25
AD6 A28# D25# J25
HA#29 AF3 L26 HD#26 CPURST# R216 54.9/F_4
HA#30 A29# D26# HD#27
AE1 A30# D27# N24
HA#31 AF1 M25 HD#28 TCK R220 27.4/F_4
A31# D28# HD#29
D29# H26
N25 HD#30 TRST# R219 680_4
D30# HD#31
D31# K25
HADSTB0# U3 Y26 HD#32
(5) HADSTB0# ADSTB0# D32#
HADSTB1# AE5 AA24 HD#33
(5) HADSTB1# ADSTB1# D33#
T25 HD#34
D34# HD#35
D35# U23
HREQ#0 R2 V23 HD#36
(5) HREQ#0 REQ0# D36# +VCCP +VCCP
C HREQ#1 P3 R24 HD#37 C
(5) HREQ#1 REQ1# D37#
HREQ#2 T2 R26 HD#38
(5) HREQ#2 REQ2# D38#
HREQ#3 P1 R23 HD#39
(5) HREQ#3 REQ3# D39#
HREQ#4 T1 AA23 HD#40 R418
(5) HREQ#4 REQ4# D40#
U26 HD#41