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2



Compal confidential 2




Schematics Document
Mobile Banias uFCBGA/uFCPGA with Intel
ODEM_MCH+ICH4-M core logic
3
2003-07-09 3



REV:2.0




4 4




Compal Electronics, Inc.
Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C
OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O THE COMPETENT DIVISION OF R&D
F
LA-1701 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE NOR THE INFORMATION IT CONTAINS
T
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIORWRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, July 09, 2003 Sheet 1 of 49
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Compal confidential
File Name : LA-1701 Fan Control
page 4
Mobile Banias Thermal Sensor Clock Generator
uFCBGA-479/uFCPGA-478 CPU ADM1032AR ICS 950810
page 4,5
1
page 4 page 12 1


CRT & TV-OUT Conn. PSB
H_A#(3..31) 400MHz H_D#(0..63)
page 14

Memory BUS(DDR)
DDR-SO-DIMM X2
Intel ODEM MCH-M BANK 0, 1, 2, 3 page 9,10,11


VGA Board Connector AGP BUS uFCBGA-593
2.5V DDR- 200/266
page 6,7,8
page 13

USB2.0
USB conn
page 27


Hub-Link Audio CKT AMP & Audio Jack
AD1981B
2
page 23 page 24 2




MDC & BT Conn
page 28 page 31
3.3V 33 MHz PCI BUS
IDSEL:AD17 IDSEL:AD20 Intel ICH4-M AC-LINK
Mini-PCI solt
(PIRQB#,GNT#1,REQ#1) (PIRQA#,GNT#2,REQ#2)
page 25
BGA-421
IEEE 1394 Mini PCI LAN CardBus Controller
VT6307S socket RTL 8139CL+ page 15,16,17 Primary IDE HDD
page 20 page 25 page 19 ENE CB1410 Connector
page 21 ATA-100 page 18
IDSEL:AD16 IDSEL:AD18,AD22
(PIRQA#,GNT#0,REQ#0) (PIRQC/D#,GNT#3/4,REQ#3/4)

Slot 0 Secondary IDE CDROM SPR CONN.
RJ45/11 CONN Connector page 33
page 19 page 21 ATA-100 page 18
3 *RJ45 CONN 3
RTC CKT. LPC BUS *PS2 x2 CONN
page 16 *CRT CONN
*LINE IN JACK
*LINE OUT JACK
Power OK CKT. SMsC LPC47N227 *1394 CONN
EC NS87591L SD Connector *SPDIF CONN
page 32 page 29 page 31 Super I/O
page 22
*DVI CONN
*DC JACK
*TVOUT CONN
Power On/Off CKT. Touch Pad Int.KBD *PRINTER PORT
page 28 page 28 page 28 PARALLEL FIR *COM PORT
page 26
*USB CONN x2
page 26
EC I/O Buffer BIOS
page 30
DC/DC Interface CKT. page 30
page 34
4 4




Power Circuit DC/DC
page
35,36,37,38,39,40,41,42 Compal Electronics, Inc.
Title
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C
OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O THE COMPETENT DIVISION OF R&D
F
LA-1701 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEE NOR THE INFORMATION IT CONTAINS
T
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIORWRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, July 09, 2003 Sheet 2 of 49
A B C D E
A




Voltage Rails Symbol note:
Power Plane Description S0-S1 S3 S5 :means digital ground.
VIN Adapter power supply (19V) N/A N/A N/A
B+ AC or battery power rail for power circuit N/A N/A N/A :means analog ground.
+CPU_CORE Core voltage for CPU ON OFF OFF
+VCCP 1.05V rail for Processor I/O ON OFF OFF
@ :means reserved.
+1.25VS 1.25V switched power rail for DDR Vtt ON OFF OFF
+1.2VS 1.2V switched power rail for MCH core power ON OFF OFF
+1.5VALW 1.5V always on power rail ON ON ON*
+1.5VS 1.5V switched power rail for AGP interface ON OFF OFF
+1.8VS 1.8V switched power rail for CPU PLL & Hub-Link ON OFF OFF
+2.5V 2.5V power rail for DDR ON ON OFF
+2.5VS 2.5V switched power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3V 3V power rail ON ON OFF
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
+5V 5V power rail ON ON OFF
+5VS 5V switched power rail ON OFF OFF
+12VALW 12V always on power rail ON ON ON*
+12V 12V power rail ON ON OFF
+12VS 12Vswitched power rail on power rail ON OFF OFF
RTCVCC RTC power ON ON ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.




1 Internal PCI Devices 1




DEVICE PCI Device ID
HUB D30
USB D29
AC97 MODEM D31
AC97 D31
ATA 100 D31
ETHERNET D8 (AD24)
LPC I/F D31
SMBUS D31



External PCI Devices
DEVICE PCI Device ID IDSEL # REQ/GNT # PIRQ
1394 D0 AD16 0 A
LAN D1 AD17 1 B
CARD BUS D4 AD20 2 C
Wireless LAN D2 AD18 3 D
Mini-PCI D6 AD22 4 D
AGP BUS N/A AGP_DEVSEL# N/A A




I2C / SMBUS ADDRESSING

DEVICE HEX ADDRESS
DDR SO-DIMM 0 A0 1010000X
DDR SO-DIMM 1 A2 1010001X
Compal Electronics, Inc.
Title
CLOCK GENERATOR (EXT.) D2 1101001X Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C
OMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY O THE COMPETENT DIVISION OF R&D
F
LA-1701 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHE NOR THE INFORMATION IT CONTAINS
ET
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R
Date: Wednesday, July 09, 2003 Sheet 3 of 49
A
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H_D#[0..63]
H_D#[0..63] <6>
H_A#[3..31]
<6> H_A#[3..31]
U9A

H_A#3
H_A#4
P4
U4
A3# Banias D0# A19
A25
H_D#0
H_D#1
ITP700FLEX FOR BANIAS +VCCP +VCCP
H_A#5 A4# D1# H_D#2 +VCCP
V3 A5# D2# A22
H_A#6 R3 B21 H_D#3 JP29 C145
A6# D3#




2




2
H_A#7 V2 A24 H_D#4 ITP_TDI 1 27 1 2
H_A#8 A7# D4# H_D#5 ITP_TMS TDI VTT0 R104 R149
W1 A8# D5# B26 2 TMS VTT1 28
H_A#9 T4 A21 H_D#6 ITP_TCK 5 26 @0.1U_0402_16V7K 54.9_0402_1% @54.9_0402_1%
H_A#10 A9# D6# H_D#7 ITP_TDO_R TCK VTAP
W2 A10# D7# B20 7 TDO
H_A#11 Y4 C20 H_D#8 ITP_TRST# 3 25 R138 ITP_DBRESET#
H_A#12 A11# D8# H_D#9 TRST# DBR# @0_0402_5%




1




1
Y1 A12# D9# B24 24
H_A#13 H_D#10 RESETITP# DBA# H_CPURST# RESETITP# ITP_TDO
U1 A13# D10# D24 12 2 1 2 1 ITP_TDO_R
4 H_A#14 H_D#11 RESET# ITP_BPM#0 4
AA3 A14# D11# E24 23
H_A#15 H_D#12 ITP_TCK BPM#0 ITP_BPM#1 R119 R153
Y3 A15# D12# C26 11 21
H_A#16 H_D#13 FBO BPM#1 ITP_BPM#2 22.6_0402_1% @22.6_0402_1%
AA2 A16# D13# B23 19
H_A#17 H_D#14 CLK_CPU_ITP# BPM#2 ITP_BPM#3
AF4 A17# D14# E23 8 17
H_A#18 H_D#15 CLK_CPU_ITP BCLK# BPM#3 ITP_BPM#4
AC4 A18# D15# C25 9 15
H_A#19 H_D#16 BCLK BPM#4 ITP_BPM#5
AC7 A19# D16# H23 13
H_A#20 H_D#17 BPM#5 +VCCP
AC3 A20# D17# G25 10
H_A#21 H_D#18 GND0
AD3 A21# D18# L23 14
H_A#22 H_D#19 GND1 ITP_TMS ITP_TRST#
AE4 A22# D19# M26 16 4 1 2 1 2
H_A#23 H_D#20 GND2 NC1 R135 39.2_0603_1% R129 680_0402_5%
AD2 A23# D20# H24 18 6
H_A#24 H_D#21 GND3 NC2 ITP_TDI ITP_TCK
AB4 A24# D21# F25 20 1 2 1 2
H_A#25 H_D#22 GND4 R134 150_0402_1% R154 27.4_0402_1%
AC6 A25# ADDR GROUP DATA GROUP D22# G24 22
GND5
H_A#26 AD5 J23 H_D#23
H_A#27 A26# D23# H_D#24
AE2 A27# D24# M23
H_A#28 AD6 J25 H_D#25 @ITP700-FLEXCON
H_REQ#[0..4] H_A#29 A28# D25# H_D#26
<6> H_REQ#[0:4] AF3 A29# D26# L26
H_A#30 AE1 N24 H_D#27
H_A#31 A30# D27# H_D#28
AF1 A31# D28# M25
H26 H_D#29
H_REQ#0 D29# H_D#30
R2 N25
H_REQ#1
H_REQ#2
P3
T2
REQ0#
REQ1#
D30#
D31# K25
Y26
H_D#31
H_D#32
Thermal Sensor ADM1032AR
H_REQ#3 REQ2# D32# H_D#33
P1 REQ3# D33# AA24
H_REQ#4 T1 T25 H_D#34 +3VS
REQ4# D34# H_D#35
D35# U23
U3 V23 H_D#36
<6> H_ADSTB#0 ADSTB0# D36#
AE5 R24 H_D#37
<6> H_ADSTB#1 ADSTB1# D37#
R26 H_D#38 W=15mil
R137 0_0402_5% D38# H_D#39
D39# R23 2
1 2 CLK_CPUITP A16 AA23 H_D#40 C131
<12> CLK_CPU_ITP ITP_CLK0 D40#
R136 1 20_0402_5% CLK_CPUITP# A15 U26 H_D#41
<12> CLK_CPU_ITP# ITP_CLK1 D41#
V24 H_D#42
D42#




1
3 H_D#43 1 0.1U_0402_10V6K 3
<12> CLK_CPU_BCLK B15 BCLK0 D43# U25
B14 HOST CLK V26 H_D#44 R114
<12> CLK_CPU_BCLK# BCLK1 D44#
Y23 H_D#45 U13
D45# H_D#46 @10K_0402_5%
D46# AA26 1 VDD SCLK 8 EC_SMC_2 <29>
Y25 H_D#47 1
D47# H_D#48 C129 H_THERMDA




2
<6> H_ADS# N2 ADS# D48# AB25 2 7 EC_SMD_2 <29>
H_D#49 D+ SDATA
<6> H_BNR# L1 BNR# D49# AC23
J3 AB24 H_D#50 2200P_0402_25V7K H_THERMDC 3 6
<6> H_BPRI# BPRI# D50# 2 D- ALERT#
N4 AC20 H_D#51
<6> H_BR0# BR0# D51#
L4 AC22 H_D#52 4 5
<6> H_DEFER# DEFER# D52# H_D#53 THERM# GND
<6> H_DRDY# H2 DRDY# D53# AC25
K3 AD23 H_D#54
<6> H_HIT# HIT# D54# H_D#55 ADM1032AR_SOP8
<6> H_HITM#
K4 HITM# CONTROL GROUP D55# AE22
1 2 H_IERR# A4 AF23 H_D#56
+VCCP R112 IERR# D56# H_D#57
<6> H_LOCK# J2 LOCK# D57# AD24 Address:1001_100X
56_0402_5% H_CPURST# B11 AF20 H_D#58
<6> H_CPURST# RESET# D58# H_D#59
D59# AE21
AD21 H_D#60
H_RS#0 D60# H_D#61
<6> H_RS#0 H1 RS0# D61# AF25
H_RS#1 K1 AF22 H_D#62
<6> H_RS#1 RS1# D62#
H_RS#2 L2 AF26 H_D#63
<6> H_RS#2 RS2# D63#
M3
<6> H_TRDY# TRDY#
D25
Fan Control circuit
DINV0# H_DINV#0 <6>
DINV1# J26 H_DINV#1 <6>
ITP_BPM#0 C8 T24
BPM0# DINV2# H_DINV#2 <6> +5VS
ITP_BPM#1 B8 AD20 +12VS
BPM1# DINV3# H_DINV#3 <6>
ITP_BPM#2 A9 BPM2#
+3VALW 1 R110 2 ITP_BPM#3 C9 BPM3#
150_0402_5% C23
DSTBN0# H_DSTBN#0 <6>
ITP_DBRESET# R111
1 2 0_0402_5% A7 K24 2
<16> ITP_DBRESET# DBR# DSTBN1# H_DSTBN#1 <6>
M2 W25 C140
2 <6> H_DBSY# DBSY# DSTBN2# H_DSTBN#2 <6> 2
<7,15> H_DPSLP# B7 DPSLP# DSTBN3# AE24 H_DSTBN#3 <6>
C19 C22 0.1U_0402_10V6K
<7> H_DPWR# DPWR# DSTBP0# H_DSTBP#0 <6> 1
ITP_BPM#4 A10 L24
PRDY# DSTBP1# H_DSTBP#1 <6>




1
2
5
6
1 2 ITP_BPM#5 B10 MISC W24
+VCCP PREQ# DSTBP2# H_DSTBP#2 <6>




5
R121 H_PROCHOT# B17 AE25 U14 D Q23
PROCHOT# DSTBP3# H_DSTBP#3 <6>
330_0402_5% 1 G