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2
Compal confidential 2
Schematics Document
ClawHammer AMD K8 with
3
nVIDIA Chrush K8 3
2003-10-15
REV:0.5
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Compal Electronics, Inc.
in
Title
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
Size Document Number Rev
he
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.5
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1851
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 16, 2003 Sheet 1 of 50
A B C D E
A B C D E
Compal confidential
File Name : LA-1811 Fan Control
page 4
Thermal Sensor
MAX6649
1 page 4 1
AMD K8
Memory BUS(DDR)
Claw Hammer Processor
DDR-SO-DIMM X2
CRT Connector page 4, 5, 6, 7 BANK 0, 1, 2, 3 page 8, 9,10
2.5V DDR- 200/266
page 18
HT 16x16 800 MHZ
TFT/HPA Panel
Interface USB2.0 USB conn
page 17 nVIDIA
MAP17 page 27
TV OUT
page 14, 15, 16 MDC & BT Conn
2
Connector
page 18 nVIDIA page 27 2
Crush K8 Audio CKT AMP & Audio Jack
AD1981B
IDSEL:AD18
(PIRQC#,GNT#3,REQ#3) 3.3V 33 MHz PCI BUS 708 BGA page 25 page 26
IDSEL:AD16 IDSEL:AD17 IDSEL:AD20 AC-LINK
(PIRQA#,GNT#0,REQ#0) (PIRQB#,GNT#1,REQ#1) (PIRQA#/B#,GNT#2,REQ#2)
ATA-100
Primary IDE
IEEE 1394 Mini PCI LAN CardBus Controller page 11, 12, 13
TSB43AB21A socket RTL 8101L Secondary IDE HDD
TI PCI1620 ATA-100
Connector
page 21 page 28 page 20 page 22
page 19
CDROM
RJ45/11 CONN Connector SPR CONN.
page 20
Slot 0/1 page 34
page 23 page 19
3 *RJ45 CONN 3
RTC CKT. LPC BUS *PS2 x2 CONN
*CRT CONN
*LINE IN JACK
*LINE OUT JACK
Power OK CKT. EC ENE VIA 1211 *1394 CONN
KB3910 Super I/O *SPDIF CONN
page 36
page 30 page 29 *DVI CONN
*DC JACK
*TVOUT CONN
Power On/Off CKT. Touch Pad Int.KBD PARALLEL FIR
*PRINTER PORT
page 33 page 33 page 33 page 32 page 33 *COM PORT
*USB CONN x2
EC I/O Buffer BIOS FDD
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DC/DC Interface CKT. page 31
page 31 page 32
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Power Circuit DC/DC
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page 38, 39, 40, 41, 42, 43, 44 Compal Electronics, Inc.
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Title
Block Diagram
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
he
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.5
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1851
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Thursday, October 16, 2003 Sheet 2 of 50
A B C D E
A
Voltage Rails
+1.2V_HT
power
+1.2VS
plane +1.2VALW +1.25V
+1.5VS
+3VALW +2.5V
+2.5VS
+5VALW +3V
+3VS
State 12VALW +5V
+5VS
S0 O O O
S1 O O O
S3 O O X
S5 S4/AC O X X
S5 S4/AC don't exist
X X X
O MEANS ON
X MEANS OFF
PCI Devices
1
DEVICE PCI Device ID IDSEL # REQ/GNT # PIRQ 1
INTERNAL
USB 2.0 2 AD13 N/A G
AC97 MODEM 6 AD17 N/A M
AC97 6 AD17 N/A L
ATA 100 8 AD20 N/A
ETHERNET 5 AD16 N/A K
LPC I/F 1 AD12 N/A
SMBUS 1 AD12 N/A F
EXTERNAL
VGA 0 AD16 N/A E
1394 0 AD16 0 A
LAN 1 AD17 1 B
CARD BUS 4 AD20 2 A, B
Wireless LAN 2 AD18 3 C
Mini-PCI (no use) 3 AD19 4 D
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Compal Electronics, Inc.
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Title
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Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
he
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.5
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-1851
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 16, 2003 Sheet 3 of 50
A
A B C D E
H_CADIP[0..15] H_CADOP[0..15]
<11> H_CADIP[0..15] H_CADOP[0..15] <11>
H_CADIN[0..15] H_CADON[0..15]
<11> H_CADIN[0..15] H_CADON[0..15] <11>
LA-1851
U1A
4 BDW00
LA-1452 REV 0
Claw Hammer-DTR Fan Control Circuit 1 +5VS
4
H_CADIP15 T25 N26 H_CADOP15
H_CADIN15 R25 L0_CADIN_H15 L0_CADOUT_H15 N27 H_CADON15
H_CADIP14 U27 L0_CADIN_L15 L0_CADOUT_L15 L25 H_CADOP14
1
H_CADIN14 U26 L0_CADIN_H14 L0_CADOUT_H14 M25 H_CADON14 Q1
H_CADIP13 V25 L0_CADIN_L14 L0_CADOUT_L14 L26 H_CADOP13 +12VALW FMMT619_SOT23
C
1
H_CADIN13 U25 L0_CADIN_H13 L0_CADOUT_H13 L27 H_CADON13 1
H_CADIP12 W27 L0_CADIN_L13 L0_CADOUT_L13 J25 H_CADOP12 D1 C1
8
H_CADIN12 W26 L0_CADIN_H12 L0_CADOUT_H12 K25 H_CADON12
HTT Interface
H_CADIP11 AA27 L0_CADIN_L12 L0_CADOUT_L12 G25 H_CADOP11 @1SS355_SOD323 10U_1206_10V4Z
P
B
E
H_CADIN11 AA26 L0_CADIN_H11 L0_CADOUT_H11 H25 H_CADON11 EN_FAN1 3 R1 2
<30> EN_FAN1
2
H_CADIP10 AB25 L0_CADIN_L11 L0_CADOUT_L11 G26 H_CADOP10 +IN 1FAN1_ON 1 2
2
3
H_CADIN10 AA25 L0_CADIN_H10 L0_CADOUT_H10 G27 H_CADON10 2 1 2 OUT
2
H_CADIP9 AC27 L0_CADIN_L10 L0_CADOUT_L10 E25 H_CADOP9 -IN U2A 100_0402_5% C2
G
H_CADIN9 AC26 L0_CADIN_H9 L0_CADOUT_H9 F25 H_CADON9 R2 LM358A_SO8
H_CADIP8 AD25 L0_CADIN_L9 L0_CADOUT_L9 E26 H_CADOP8 10K_0402_5% 0.1U_0402_16V4Z FAN1
4
H_CADIN8 AC25 L0_CADIN_H8 L0_CADOUT_H8 E27 H_CADON8 1
1
H_CADIP7 T27 L0_CADIN_L8 L0_CADOUT_L8 N29 H_CADOP7 JP1
1 1
H_CADIN7 T28 L0_CADIN_H7 L0_CADOUT_H7 P29 H_CADON7 1 2 D2 C3 C612
H_CADIP6 V29 L0_CADIN_L7 L0_CADOUT_L7 M28 H_CADOP6 R3 8.2K_0402_5% 1
H_CADIN6 U29 L0_CADIN_H6 L0_CADOUT_H6 M27 H_CADON6 1N4148_SOT23 100P_0402_50V8K 2
H_CADIP5 V27 L0_CADIN_L6 L0_CADOUT_L6 L29 H_CADOP5 2 2 3
2
H_CADIN5 V28 L0_CADIN_H5 L0_CADOUT_H5 M29 H_CADON5 +12VALW ACES_85205-0300
H_CADIP4 Y29 L0_CADIN_L5 L0_CADOUT_L5 K28 H_CADOP4 R4 0.1U_0402_16V4Z
H_CADIN4 W29 L0_CADIN_H4 L0_CADOUT_H4 K27 H_CADON4 1 2
L0_CADIN_L4 L0_CADOUT_L4 +3VS
H_CADIP3 AB29 H28 H_CADOP3 C775
H_CADIN3 AA29 L0_CADIN_H3 L0_CADOUT_H3 H27 H_CADON3 10K_0402_5%
H_CADIP2 AB27 L0_CADIN_L3 L0_CADOUT_L3 G29 H_CADOP2 0.1U_0402_25V4K
3 L0_CADIN_H2 L0_CADOUT_H2 <30> FAN_SPEED1 3
H_CADIN2 AB28 H29 H_CADON2 1
H_CADIP1 AD29 L0_CADIN_L2 L0_CADOUT_L2 F28 H_CADOP1 C613
H_CADIN1 AC29 L0_CADIN_H1 L0_CADOUT_H1 F27 H_CADON1
H_CADIP0 AD27 L0_CADIN_L1 L0_CADOUT_L1 E29 H_CADOP0 1000P_0402_50V7K
H_CADIN0 AD28 L0_CADIN_H0 L0_CADOUT_H0 F29 H_CADON0 2
L0_CADIN_L0 L0_CADOUT_L0
H_CLKIP1 Y25 J26 H_CLKOP1
<11> H_CLKIP1 L0_CLKIN_H1 L0_CLKOUT_H1 H_CLKOP1 <11>
+1.2V_HT H_CLKIN1 W25 J27 H_CLKON1
<11> H_CLKIN1 L0_CLKIN_L1 L0_CLKOUT_L1 H_CLKON1 <11>
H_CLKIP0 Y27 J29 H_CLKOP0
<11> H_CLKIP0 L0_CLKIN_H0 L0_CLKOUT_H0 H_CLKOP0 <11>
H_CLKIN0 Y28 K29 H_CLKON0
<11> H_CLKIN0 L0_CLKIN_L0 L0_CLKOUT_L0 H_CLKON0 <11>
R5 1 2 49.9_0402_1% H_CTLIP1 R27 N25
R6 1 2 49.9_0402_1% H_CTLIN1 R26 L0_CTLIN_H1 L0_CTLOUT_H1 P25
<11> H_CTLIP0
H_CTLIP0
H_CTLIN0
T29
R29
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLOUT_L1
L0_CTLOUT_H0
P28
P27
H_CTLOP0
H_CTLON0
H_CTLOP0 <11> Fan Control Circuit 2 +5VS
<11> H_CTLIN0 L0_CTLIN_L0 L0_CTLOUT_L0 H_CTLON0 <11>
AF27 AJ27 LDTSTOP#
L0_REF1 LDTSTOP_L LDTSTOP# <11>
AE26
1
+1.2V_HT L0_REF0 1 2 +2.5VS Q2
FOX_PZ75403-2941-42 R7 1K_0402_5% FMMT619_SOT23
C
R8 44.2_0603_1%
1
2 1 LVREF1 1
U2B D3 C4
LVREF0
B
E
1 EN_FAN2 5 R9 @1SS355_SOD323 10U_1206_10V4Z
<30> EN_FAN2
1
C5 +IN 7FAN2_ON 1 2 2
1
2
3
2
R10 C6 2 1 6 OUT
2
2
1000P_0402_50V7K -IN 100_0402_5% C7
2
2 44.2_0603_1% 1000P_0402_50V7K R11
2 10K_0402_5% LM358A_SO8 0.1U_0402_16V4Z FAN2
2
1
1
1 1 JP2
1 2 D4 C8 C614