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1 1




KSWAA/KTWAA
Liverpool 10M/10MG
2




Sunderland 10M/10MG 2




LA-4982P REV 1.0 Schematic
3

Intel Penryn/ Cantiga/ ICH9M 3




2009-07-27 Rev. 1.0


www.masteram.su


4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/07/22 Deciphered Date 2012/07/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A4982
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401791
Date: Wednesday, December 30, 2009 Sheet 1 of 45
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Compal Confidential
Model Name : KSWAA/KTWAA Fan Control Intel Penryn Processor Thermal Sensor Clock Generator
File Name : LA-4981P APL5607 EMC1402-1 SLG8SP556VTR
page 4 uPGA-478 Package page 4 page 16
1
(Socket P) page 4,5,6
1




CRT FSB
H_A#(3..35) 667/800/1066MHz H_D#(0..63)
page 19
Memory BUS(DDRIII) 204pin DDRIII-SO-DIMM X2
page 17
VGA MXM/B LCD Conn. Intel Cantiga Dual Channel
page 18 BANK 0, 1, 2, 3 page 14,15
ATI M92XT,64bit with 128M/256MB PCIE-Express 16X GM45/PM45/GL40 1.5V DDR3 800/1066
ATI M96,128bit with 256M/512MB GM47/GM49
EC HDMI CEC Controller HDMI Conn. Level Shifter uFCBGA-1329
SMBUS R5F211A4SP page 20 page 20
page 20 page 7,8,9,10,11,12,13
USB/B FP/B
PCIeMini Card USB port 0,1 USB port 8
WiMax page 25 page 26
2 2
USB port 7
page 27
DMI x 4 C-Link BT conn Int. Camera
PCIeMini Card USB USB port 5 USB port 11
WLAN 5V 480MHz USB page 26 page 18
PCIe port 4 PCIe 1x [2,4,5] 5V 480MHz
page 27
1.5V 2.5GHz(250MB/s)

Express Card SATA port 1 SATA HDD0
USB
USB port 4
5V 480MHz
Intel ICH9-M 5V 1.5GHz(150MB/s) page 25
Express Card PCIe 1x
PCIe port 1 page 25 1.5V 2.5GHz(250MB/s) SATA port 4 SATA ODD
5V 1.5GHz(150MB/s) page 25
RJ45 RTL8103EL 10/100M PCIe 1x
page 28 PCIe port 3 page 28 1.5V 2.5GHz(250MB/s) BGA-676
SATA port 5
USB 5V 1.5GHz(150MB/s)
RTS5159E 3IN1 5V 480MHz eSATA USB
USB port 10 page 32 page 21,22,23,24 USB port 3 USB port 3
3
page 25 page 25 3
PCI 5V 480MHz
PCMCIA 3V 33MHz
OZ601 page 31



3.3V 33 MHz
LPC BUS HD Audio 3.3V/1.5V 24.576MHz/48Mhz




RTC CKT. MDC 1.5 Conn HDA Codec AMP.
USB/B Debug Port ENE KB926 D2 ALC272 TPA6017
page 25 page 21 page 26 page 29 page 30
page 34 page 33

Power/B DC/DC Interface CKT.
page 26
page 35
Touch Pad Int.KBD SPI ROM Int.
page 26 page 34 page 33 MIC CONN MIC CONN HP CONN SPK CONN
ODD/B for 17" Power Circuit DC/DC page 30 page 30 page 30 page 30
4 page 25 4


page 36,37,38,39
FP/B for 17" 40,41,42
page 25 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/07/22 Deciphered Date 2012/07/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A4982
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401791
Date: Wednesday, December 30, 2009 Sheet 2 of 45
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A B C D E




Voltage Rails SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5#

Power Plane Description S1 S3 S5 G3 Full ON HIGH HIGH HIGH HIGH

VIN Adapter power supply (19V) ON ON ON OFF S1(Power On Suspend) LOW HIGH HIGH HIGH
1 1
B+ AC or battery power rail for power circuit. ON ON ON ON
S3 (Suspend to RAM) LOW LOW HIGH HIGH
+CPU_CORE Core voltage for CPU ON OFF OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH
+1.05VS 1.05V switched power rail ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW LOW
+1.5VS 1.5V switched power rail ON OFF OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF OFF G3 LOW LOW LOW LOW
+1.8VS 1.8V power rail for VRAM ON ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON OFF
+3VL 3.3V always on power rail ON ON ON ON
+3V_SB 3.3V power rail for LAN ON ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON OFF OFF BTO Option Table
+3VS 3.3V switched power rail ON OFF OFF OFF
+3VS_HDP 3.3V power rail for G-sensor ON OFF OFF OFF
Function Express Card/ PCMCIA Bluetooth RJ11 Camera 3D Sensor
+5VALW 5V always on power rail ON ON ON OFF
2 +5VL 5V always on power rail ON ON ON ON (E) (A) (B) (R) (X) (S) 2
description
+5V_SB 5V power rail for SB ON ON OFF OFF
explain Express Card PCMCIA Bluetooth MDC Camera 3D Sensor
+5VS 5V switched power rail ON OFF OFF OFF
+VSB VSB always on power rail ON ON ON OFF BTO NEW@ PCM@ BT@ MDC@ CAM@ GSENSOR@
+RTCVCC RTC power ON ON ON ON

Function HDMI
External PCI Devices
description (Y)
DEVICE PCI DEVICE ID IDSEL# REQ/GNT# PIRQ
CARD BUS D4 AD20 1 A/B explain Intel(UMA) ATI VGA/B COMMON

BTO IHDMI@ NIHDMI@ HDMI@ H@




3 3

EC SM Bus1 address EC SM Bus2 address
Power Device Address Power Device Address
+5VL EC KB926 D2 +3VS EC KB926 D2
+5VL Smart Battery 0001 011X b CPU THM Sen
+3VS SMSC SMC1402 1001 101Xb
+5VL HDMI-CEC 0011 010x b
VGA THM Sen 1001 100Xb
+3VS ADM1032ARMZ
VGA on die 1001 111Xb
thermal sensor (No used)


ICH9M SM Bus address
Power Device Address
+3V_SB ICH9M
Clock Generator 1101 001Xb
4 +3VS (SLG8SP556V) 4

+3VS DDR DIMM0 1001 000Xb
+3VS DDR DIMM1 1001 010Xb
+3VS Express Card Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/07/22 Deciphered Date 2012/07/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A4982
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401791
Date: Wednesday, December 30, 2009 Sheet 3 of 45
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@
7 H_A#[3..16] +3VS
JCPUA
H_A#3 J4 H1
A[3]# ADS# H_ADS# 7




ADDR GROUP_0
H_A#4 L5 E2
A[4]# BNR# H_BNR# 7
H_A#5 L4 G5
A[5]# BPRI# H_BPRI# 7
H_A#6




0.1U_0402_16V4Z
K5 A[6]# 1
H_A#7 M3 H5
A[7]# DEFER# H_DEFER# 7 C1
H_A#8 N2 F21
A[8]# DRDY# H_DRDY# 7
H_A#9 J1 E1 U1
A[9]# DBSY# H_DBSY# 7 2
H_A#10 N3
H_A#11 A[10]#
P5 A[11]# BR0# F1 H_BR0# 7
H_A#12 P2 1 8
A[12]# VDD SMCLK EC_SMB_CK2 17,33




CONTROL
D H_A#13 L2 D20 H_IERR# R1 1 2 56_0402_5% +1.05VS D
H_A#14 A[13]# IERR# H_INIT# H_THERMDA
P4 A[14]# INIT# B3 H_INIT# 22 2 DP SMDATA 7 EC_SMB_DA2 17,33
H_A#15 P1 C2
H_A#16 A[15]# H_THERMDC
R1 A[16]# LOCK# H4 H_LOCK# 7 1 2 3 DN ALERT# 6 1 2 +3VS
M1 2200P_0402_50V7K R2 10K_0402_5%
7 H_ADSTB#0 ADSTB[0]#
C1 H_RESET# CPU_THERM# 4 5 @ Reserve for source control
RESET# H_RESET# 7 THERM# GND
7 H_REQ#0 K3 REQ[0]# RS[0]# F3 H_RS#0 7
H2 F4 R3
7 H_REQ#1 REQ[1]# RS[1]# H_RS#1 7 if use XDP,these resistor are 51ohm
7 H_REQ#2 K2 REQ[2]# RS[2]# G3 H_RS#2 7 +3VS 1 2
J3 G2 +1.05VS 10K_0402_5% EMC1402-1-ACZL-TR_MSOP8
7 H_REQ#3 REQ[3]# TRDY# H_TRDY# 7
7 H_REQ#4 L1 REQ[4]#
Address:0100_1100 EMC1402-1
G6 XDP_TDO 1 2 Address:0100_1101 EMC1402-2
7 H_A#[17..35] HIT# H_HIT# 7
H_A#17 Y2 E4 R14 54.9_0402_1%
A[17]# HITM# H_HITM# 7
H_A#18 U5 XDP_TMS 1 2
H_A#19 A[18]# R4 54.9_0402_1%
R3 A[19]# BPM[0]# AD4



ADDR GROUP_1
H_A#20 W6 AD3 XDP_TDI 1 2
H_A#21 A[20]# BPM[1]# R5 54.9_0402_1%
U4 AD1
H_A#22 Y5
A[21]#
A[22]#
BPM[2]#
BPM[3]# AC4
+5VS
FAN Control Circuit

XDP/ITP SIGNALS
H_A#23 U1 AC2 XDP_TCK 1 2
H_A#24 A[23]# PRDY# R6 54.9_0402_1%
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK XDP_TRST# 1 2 1A
H_A#26 A[25]# TCK XDP_TDI R7 54.9_0402_1% 1SS355_SOD323-2
T3 A[26]# TDI AA6
H_A#27 W2 AB3 XDP_TDO
A[27]# TDO PAD T13




1
H_A#28 W5 AB5 XDP_TMS +1.05VS 1 2
H_A#29 A[28]# TMS XDP_TRST# R8 @ 56_0402_5%
Y4 A[29]# TRST# AB6
H_A#30 U2 C20 XDP_DBRESET# 1 2 2 D1
A[30]# DBR# XDP_DBRESET# 23
H_A#31 V4 R9 56_0402_5% @
A[31]#




2
JFAN




B
B
H_A#32 W3 C3




2
H_A#33 AA4 A[32]# 10U_0805_10V4Z +FAN1
A[33]# THERMAL 1
1 1




E
C H_A#34 AB2 H_PROCHOT# 3 1 2 C
A[34]# OCP# 23 2




1
C
H_A#35 AA3 D21 H_PROCHOT# Q6 2 3
A[35]# PROCHOT# H_THERMDA @ MMBT3904_SOT23 U2 3
7 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24
B25 H_THERMDC PROCHOT# PU: 68Ohm near CPU and MVP6. 1 8 D2 C4 4
H_A20M# THERMDC EN GND @ @ 1000P_0402_25V8J GND
22 H_A20M# A6 A20M# 56Ohm near CPU if no used. 2 VIN GND 7 5 GND
1
ICH




H_FERR# A5 C7 +FAN1 3 6
22 H_FERR# H_THERMTRIP# 8,22




2
H_IGNNE# FERR# THERMTRIP# VOUT GND
22 H_IGNNE# C4 IGNNE# 33 EN_DFAN1 4 VSET GND 5 ACES_85204-0300N
1 BAS16_SOT23-3 @
H_STPCLK# D5 10mil APL5607KI-TRG_SO8
22 H_STPCLK# STPCLK#
H_INTR C6 H CLK C5
22 H_INTR LINT0
H_NMI B4 A22 H_THERMDA, H_THERMDC routing together, 10U_0805_10V4Z R10 10K_0402_5%
22 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 16 2
H_SMI# A3 A21 2 1 +3VS
22 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 16 Trace width / Spacing = 10 / 10 mil
M4 RSVD[01] FAN_SPEED1 33
N5 RSVD[02] 2
T2 RSVD[03]
V3 C6
RSVD[04]
RESERVED




B2 RSVD[05] 0.01U_0402_16V7K
1 @
D2 RSVD[06]
D22 RSVD[07]
Reserve for D3 RSVD[08]
debug F6 RSVD[09]
close to South
Bridge
Penryn

H_FERR# 2 1
B C596 @ 180P_0402_50V8J B




H_SMI# 2 1
C597 @ 180P_0402_50V8J
H_INIT# 2 1
C598 @ 180P_0402_50V8J
H_NMI 2 1
C599 @ 180P_0402_50V8J
H_A20M# 2 1
C600 @ 180P_0402_50V8J
H_INTR 2 1
C601 @ 180P_0402_50V8J
H_IGNNE# 2 1
C602 @ 180P_0402_50V8J
H_STPCLK# 2 1
C603 @ 180P_0402_50V8J



Reserve for
debug
close to CPU
A A




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/07/22 Deciphered Date 2012/07/22 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A4982
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401791
Date: Wednesday, December 30, 2009 Sheet 4 of 45
5 4 3 2 1
5 4 3 2 1




@
JCPUD
A4 VSS[001] VSS[082] P6
A8 VSS[002] VSS[083] P21
A11 VSS[003] VSS[084] P24
A14 VSS[004] VSS[085] R2
7 H_D#[0..15] @ A16 R5
H_D#[32..47] 7 V