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Schematics Page Index (Title / Revision / Change Date)
Page Title of Schematics Page Rev. Date Page Title of Schematics Page Rev. Date
01 Schematics Page Index 1.0 07'06'22 36 ICH8-M( GND) 5/5 1.0 07'06'22
02 Block Diagram 1.0 07'06'22 37 SATA HDD/CD-ROM 1.0 07'06'22
03 Merom(HOST BUS) 1/3 1.0 07'06'22 38 EC+KBC 1.0 07'06'22
D
04 Merom(HOST BUS) 2/3 1.0 07'06'22 39 Flash ROM/XBUS 1.0 07'06'22 D

05 Merom(Power/Gnd) 3/3 1.0 07'06'22 40 Mini-PCIE Card 1.0 07'06'22
06 CLOCK GEN 1.0 07'06'22 41 Bluetooth/CAM/OIDE 1.0 07'06'22
07 Crestline (HOST) 1/7 1.0 07'06'22 42 EXPRESS 1.0 07'06'22
08 Crestline (DMI) 2/7 1.0 07'06'22 43 BTB to Audio/MDC 1.0 07'06'22
09 Crestline (GRAPHIC) 3/7 1.0 07'06'22 44 FAN/Thermal-Sensor 1.0 07'06'22
10 Crestline (DDRII) 4/7 1.0 07'06'22 45 PCI (PCI BUS) 1.0 07'06'22
11 Crestline (POWER,VCC) 5/7 1.0 07'06'22 46 PCI (i.LINK) 1.0 07'06'22
12 Crestline (VCC CORE) 6/7 1.0 07'06'22 47 PCI (SD/MS-DUO) 1.0 07'06'22
13 Crestline (VSS) 7/7 1.0 07'06'22 48 USB2.0 1.0 07'06'22
14 DDRII(SO-DIMM_0) 1/3 1.0 07'06'22 49 LAN (88E8036) 1.0 07'06'22
15 DDRII(SO-DIMM_1) 2/3 1.0 07'06'22 50 Power Design Diagram 1.0 07'06'22
16 DDRII(Termination) 3/3 1.0 07'06'22 51 DCIN&Charger 1.0 07'06'22
17 VGA(PCI-E) 1.0 07'06'22 52 SYS Power (+3_3V/+5V) 1.0 07'06'22
18 VGA(STRAP) 1.0 07'06'22 53 SYS Power(+1_5V/+1_05V) 1.0 07'06'22
C C
19 VGA(GDDR)# 1.0 07'06'22 54 DDR2 Power(+1_8V/+0_9V) 1.0 07'06'22
20 VGA(MULTIUSE) 1.0 07'06'22 55 CPU_Vcore---ISL6262A 1.0 07'06'22
21 VGA(LVDS/VDAC ) 1.0 07'06'22 56 Others power plane 1.0 07'06'22
22 VRAM(GDDR)# 1/2 1.0 07'06'22 57 OVP protection 1.0 07'06'22
23 VRAM(GDDR)# 2/2 1.0 07'06'22 58 VGA POWER(+1_1V/ +1_2V) 1.0 07'06'22
24 VGA(POWER) 1/3 1.0 07'06'22 59 GMCH power 1.0 07'06'22
25 VGA(POWER) 2/3 1.0 07'06'22 60 HOLE 1.0 07'06'22
26 VGA(POWER) 3/3 1.0 07'06'22 61 EC+KBC(3925) 1.0 07'06'22
27 VRAM(BYPASS) 1/2 1.0 07'06'22 62 HDMI 1.0 07'06'22
28 VRAM(BYPASS) 2/2 1.0 07'06'22 63 ROBSON B to B Connector. 1.0 07'06'22
29 TVIN and OUT/Semi-PnP# 1.0 07'06'22 64 LED/Touch/Lid 1.0 07'06'22
30 CRT 1.0 07'06'22 65 History ( 1 ) 1.0 07'06'22
31 LVDS 1.0 07'06'22 66 History ( 2 ) 1.0 07'06'22
32 ICH8-M( PCI/USB ) 1/5 1.0 07'06'22 67
B 33 ICH8-M( LPC,IDE,SATA )2/5 1.0 07'06'22 68 B

34 ICH8-M( GPIO) 3/5 1.0 07'06'22 69
35 ICH8-M( POWER) 4/5 1.0 07'06'22 70

BOM configuration
SKU Stuff No stuff Project Code & Schematics Subject: MS91 Main Board
NB8M-256MB-Samsung NV_,NVNB8M_,NV128bit_,NV16M_,NVH/S_,NVQ/S_ NC_*,NVNB8P_,NV64bit_,NV8M_,NVQ_,NVH_
NB8M-256MB-Qimonda NV_,NVNB8M_,NV128bit_,NV16M_,NVQ_,NVQ/S_ NC_*,NVNB8P_,NV64bit_,NV8M_,NVH/S_,NVH_ 1P-0076100-8010(FUBAI)
PCB P/N:
NB8M-256MB-Hynix NV_,NVNB8M_,NV128bit_,NV16M_,NVH/S_,NVH_ NC_*,NVNB8P_,NV64bit_,NV8M_,NVQ_,NVQ/S_ 1P-0076500-8010(HANNSTAR)
NB8M-128MB-Samsung NV_,NVNB8M_,NV64bit_,NV16M_,NVH/S_,NVQ/S_ NC_*,NVNB8P_,NV128bit_,NV8M_,NVQ_,NVH_ 1P-0076200-8010(NAN YA)
NB8M-128MB-Qimonda NV_,NVNB8M_,NV64bit_,NV16M_,NVQ_,NVQ/S_ NC_*,NVNB8P_,NV128bit_,NV8M_,NVH/S_,NVH_
NB8M-128MB-Hynix NV_,NVNB8M_,NV64bit_,NV16M_,NVH/S_,NVH_ NC_*,NVNB8P_,NV128bit_,NV8M_,NVQ_,NVQ/S_
NB8M-64MB-Hynix NV_,NVNB8M_,NV64bit_,NV8M_,NVH/S_,NVH_ NC_*,NVNB8P_,NV128bit_,NV16M_,NVQ/S_,NVQ_ P. Leader Check by Design by
The "NC_*" include "NC_CA_"and "NC_NV*",
NB8M-64MB-Samsung NV_,NVNB8M_,NV64bit_,NV8M_,NVH/S_,NVQ/S_ NC_*,NVNB8P_,NV128bit_,NV16M_,NVQ_,NVH_ the are prefix which comes from MS90
A NB8P-256MB-Samsung NV_,NVNB8P_,NV128bit_,NV16M_,NVH/S_,NVQ/S_ NC_*,NVNB8M_,NV64bit_,NV8M_,NVQ_,NVH_ schematic,it means NC also, but if the A
component is needed again, "NC_CA_" is
NB8P-256MB-Qimonda NV_,NVNB8P_,NV128bit_,NV16M_,NVQ_,NVQ/S_ NC_*,NVNB8M_,NV64bit_,NV8M_,NVH/S_,NVH_ only for Low module only and "NC_NV*"
NB8P-256MB-Hynix NV_,NVNB8P_,NV128bit_,NV16M_,NVH/S_,NVH_ NC_*,NVNB8M_,NV64bit_,NV8M_,NVQ_,NVQ/S_ only for HH/H/M module only.the rule is
GM965/GL960 CA_ No CA_ help to remind this.
HON HAI Precision Ind. Co., Ltd.
FOXCONN
Title
Index Page
CCPBG - R&D Division
"no CA_" means all of other prefix
Dropped the NB8P-SE/128MB and NB8P-SE/64M for MOR request Size Document Number Rev
including the "NC_" prefix. A3 MS91-1-01 1.0

Date: Thursday, June 21, 2007 Sheet 1 of 66
5 4 3 2 1
1 2 3 4 5 6 7 8




S-OUT
MS91(Crestline PM/GM+Gfx Block Diagram)
PAGE 29 nVIDIA
4
S-OUT/LVDS/VGA/HDMI NB8M-GT/NB8P-SE CPU Clock Gen.
LVDS GDDR3 Merom/Celeron X,TAL
SXGA+ ICS9LPR358YGLFT 14.318MHZ
A 16Mx32bx4pcs A
PAGE 31 Processor MLF64
PAGE 17~28
VGA Micro-FCBGA-478 PAGE 6
D-type-15p (478 -pin socket P)
PAGE 30
S-OUT/LVDS/VGA
PAGE 3~5 SO-DIMM 0
HDMI FSB
533/667 MHZ
*GL960 only
667/800 MHZ DDR(II)
PAGE 62 supports 533MHz
200 pin
Audio & USB PCIE X16
Board Ext. Mic In USB 2.0 PAGE 14
3
Jack CONN.X2 USB2.0 2
North Bridge *GL960 only
INTERNAL Mic Crestline 533/667 MHZ supports 533MHz SO-DIMM 1
PM965/GM965/GL960 533/667 MHZ
533/667 MHZ
HEAD DDR(II)
MIC Board FCBGA-1299
PHONE 200 pin
JACK CXD9872AK PAGE 7~13
PAGE 15
B
TPA6011A4 Codec AZALIA B

C-Link0 X4 DMI USB 2.0
Int. Speaker
(Direct Media Interface) CONN.X1
1.0 Walt x 2 USB2.0 1
PAGE 48
PAGE 43
PCIE + USB2.0
MDC 1.5 Express Card
RJ11 Modem South Bridge C-Link1 PAGE 42
12 pin
PAGE 43 ICH8-M PCIE
33MHZ, 3.3V PCI BUS 676 mBGA Mini-Card
USB2.0 3 PCIE
TI SPCI8402ZHK PCIE PAGE 40
PAGE 32~36
CardReader
MS/MS DUO
/SD i.LINK Robson
PAGE 47 LPC CONN
PAGE 63




IDE ATA 100




SATA 1.5Gb/s
C
i.LINK GHK 216 ENE KB3910SFC1 CAM(1.3M)
C


PAGE 46 PAGE 45~47
Marvell 10/100 EC+KBC PAGE 41
Ethernet +KB3925(co-lay)
Netswap 88E8036 LQFP-176 BGA-169 Bluetooth
RJ45
NS681601P QFN-64 PAGE 38 PATA SATA
PAGE 61 PAGE 41
PAGE 49
ODD HDD
PAGE 37 PAGE 37 Oide
XBUS




PAGE 41
PWM SMB Channel 1

PS/2 SMB Channel 2
Thermal Sensor Thermal Sensor Thermal Sensor
Switch FAN Lid Switch G781-1P8f G781P8f(HH/H/M) MAX6509HAUK-T+
Flash BIOS BATT CONN. (CPU/GMCH) G7811P81U(L/LL) (H/W)
Board & LED Touchpad 1MB
PAGE 44 PAGE 64 PAGE 64 PAGE 39 PAGE 51 MSOP-8 PAGE 44 MSOP8 PAGE 44 SOT-23 PAGE 44
D D
Switch Board



HON HAI Precision Ind. Co., Ltd.
FOXCONN
Title Block Diagram
CCPBG - R&D Division

Size Document Number Rev
Custom MS91-1-01 1.0

Date: Thursday, June 21, 2007 Sheet 2 of 66
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8




U109A +1_05VRUN
7 H_A#[3..35]
H_A#3 J4 H1
A[3]# ADS# H_ADS# 7




ADDR GROUP 0
H_A#4 L5 E2
A[4]# BNR# H_BNR# 7
H_A#5 L4 G5
A[5]# BPRI# H_BPRI# 7
H_A#6 K5 A[6]#




1
H_A#7 M3 H5
A[7]# DEFER# H_DEFER# 7
H_A#8 N2 F21 R1
A[8]# DRDY# H_DRDY# 7
H_A#9 J1 E1
A[9]# DBSY# H_DBSY# 7
A H_A#10 N3 56_J A
H_A#11 A[10]#
P5 F1 H_BREQ#0 7 0402




2
H_A#12 A[11]# BR0#
P2 A[12]#




CONTROL
H_A#13 L2 D20 H_IERR#
H_A#14 A[13]# IERR#
P4 A[14]# INIT# B3 H_INIT# 33
H_A#15 P1
H_A#16 A[15]#
R1 A[16]# LOCK# H4 H_LOCK# 7
7 H_ADSTB#0 M1 ADSTB[0]# H_CPURST# 7
C1 +1_05VRUN
7 H_REQ#[4..0] RESET# H_RS#[2..0] 7
H_REQ#0 K3 F3 H_RS#0
H_REQ#1 REQ[0]# RS[0]# H_RS#1
H2 REQ[1]# RS[1]# F4
H_REQ#2 K2 G3 H_RS#2
H_REQ#3 REQ[2]# RS[2]# R1463 150_J 0402
J3 REQ[3]# TRDY# G2 H_TRDY# 7
H_REQ#4 L1 XDP_TDI 1 2
REQ[4]#
7 H_A#[3..35] HIT# G6 H_HIT# 7
H_A#17 Y2 E4 R1464 39_D 0402
A[17]# HITM# H_HITM# 7
H_A#18 U5 XDP_TMS 1 2
H_A#19 A[18]# XDP_BPM#0
R3 A[19]# BPM[0]# AD4 1 30MIL TP1




ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 1 R1465 NC_54.9_F 0402
A[20]# BPM[1]# 30MIL TP2
H_A#21 U4 AD1 XDP_BPM#2 1 XDP_BPM#5 1 2
A[21]# BPM[2]# 30MIL TP3
H_A#22 XDP_BPM#3




XDP/ITP SIGNALS
Y5 A[22]# BPM[3]# AC4 1 30MIL TP4
H_A#23 U1 AC2 XDP_BPM#4 1 R1466 27_J 0402
A[23]# PRDY# 30MIL TP5
H_A#24 R4 AC1 XDP_BPM#5 XDP_TCK 1 2
H_A#25 A[24]# PREQ# XDP_TCK
T5 A[25]# TCK AC5
H_A#26 T3 AA6 XDP_TDI R1470 649_F 0402
H_A#27 A[26]# TDI XDP_TRST#
Layout note: W2 A[27]# TDO AB3 1 2
H_A#28 W5 AB5 XDP_TMS
no stub on H_STPCLK TP. H_A#29 Y4
A[28]# TMS
AB6 XDP_TRST#
H_A#30 A[29]# TRST# A0206
H_STPCLK# to be routed in daisy U2 A[30]# DBR# C20 1 30MIL TP568 Debug port not used .
B H_A#31 V4 B
chain fashion from ICH to LPC slot H_A#32 W3
A[31]# resistors close to CPU.
H_A#33 A[32]#
and then to CPU. AA4 A[33]# THERMAL
H_A#34 AB2
H_A#35 A[34]# PROCHOT#
AA3 A[35]# PROCHOT# D21
V1 A24 H_THERMDA
7 H_ADSTB#1 ADSTB[1]# THERMDA H_THERMDA 44
B25 H_THERMDC
THERMDC H_THERMDC 44
33 H_A20M# A6 A20M#




ICH
A5 C7 PM_THRMTRIP#
33 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 8
33 H_IGNNE# C4 IGNNE#
PM_THRMTRIP#
R7 1 0_J 2 0402 H_STPCLK#_R D5
33 H_STPCLK# STPCLK# should connect to
33 H_INTR C6 LINT0 H CLK
33 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 6 ICH8-M and GMCH
33 H_SMI# A3 A21 CLK_CPU_BCLK# 6
SMI# BCLK[1] without T-ing (No stub)
1 TP_CPU_RSVD01 M4
TP7 30MIL RSVD[01]
1 TP_CPU_RSVD02 N5
TP8 30MIL RSVD[02]
1 TP_CPU_RSVD03 T2
TP10 30MIL RSVD[03]
1 TP_CPU_RSVD04 V3
TP11 30MIL RSVD[04]
1 TP_CPU_RSVD05 B2




RESERVED
TP12 30MIL RSVD[05]
1 TP_CPU_RSVD06 C3
TP14 30MIL RSVD[06]
1 TP_CPU_RSVD07 D2
TP16 30MIL RSVD[07]
1 TP_CPU_RSVD08 D22
TP18 30MIL RSVD[08]
1 TP_CPU_RSVD09 D3
TP20 30MIL RSVD[09]
1 TP_CPU_RSVD10 F6
TP22 30MIL RSVD[10]


C +1_05VRUN CPU SOCKET_478P C

FOX_PZ4782A-274M-01
1




+3VRUN R1471

1K_F
1




0402
2




R1118 PROCHOT#
3




2.2K_J
0402 D
2




A0205 1 Q70 +ECVCC
G S When use U136, R2101 and C1733
3




Q71 2N7002
2




need change to NC.




1
OVT_EC# 2 B C
34,38,44,55,61 OVT_EC#
E R15
NC_S-80927CLMC-G6XT2G 47K_J




2
DTC144EUA U136 0402
1




VSS VDD
R2101




2
4 NC
OUT 1 1 2 ECRST# 38,61
3




Q3 5
D CD
NC_0_J
1



C1733




3




1
1