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8 7 6 5 4 3 2 1
Version 10B
MS-6710 07/10/2003 Update
Cover Sheet
Block Diagram
1
2
INTEL (R) Brookdale-G Chipset
Willamette/Northwood 478pin mPGA-B Processor Schematics Power Delivery Map 3
D D
GPIO Spec. 4
CPU:
Willamette/Northwood mPGA-478B Processor Clock CY28349 & ATA100 IDE CONNECTORS 5
mPGA478-B INTEL CPU Sockets 6-7
System Brookdale-GE Chipset: INTEL Brookdale-G MCH -- North Bridge 8 - 10
INTEL MCH (North Bridge) + INTEL ICH4 -- South Bridge 11-12
INTEL ICH4 (South Bridge)
LPC I/O W83627HF 13
On Board Chipset:
DDR DIMMM1,2 14
BIOS -- FWH
C C
DDR Termination 15
LPC Super I/O -- W83627HF
AGP Slot 16
Clock Generator -- CY283490C
VGA Connector 17
PCI SOUND -- C-MEDIA CMI8738MX
PCI Slot & FAN 18
PCI 1394 -- VIA 6386
PCI LAN 19
PCI LAN -- RealTek 8100BL
FWH 20
Expansion Slots:
USB & FAN Connectors 21
AGP2.0 SLOT * 1
PCI Audio - CMI8738 & Front Audio / 6 Channel / Game port 22-23
B
PCI2.2 SLOT * 1 B
KB/MS/COM/LPT/FDD IO Connectors & AP logic 24
ACPI Controller 25
ERP BOM Function Description L6719B CPU Power ( PWM )-VRM9.0 26
501/601-6710-030 Opt :IL W/1394, W/LAN
Front Panel & ATX Connector 27
501/601-6710-060 Opt :I W/1394, Wo/LAN
VT6306 1394 Chip 28
501/601-6710-040 Opt :L Wo/1394, W/LAN
Manual Part & Jumper Setting 29
501/601-6710-050 Opt :LV GV/Wo/1394, W/LAN
History I 30
A A
Title Rev
Micro-Star MS-6710 10B
Document Number
Cover Sheet
Last Revision Date:
Thursday, July 10, 2003 Sheet 1 of 30
8 7 6 5 4 3 2 1
1
Block Diagram
AGPCLK 66MHZ
X'TEL
VRM 14.318MHZ ICH_66 66MHZ
P4 478-Pin Processor
Clock 408
INT & PWR-MNG CPUCLK, CPUCLK# 100/133MHZ ICH_PCLK 33MHZ
FWH_PCLK 33MHZ
SIO_PCLK 33MHZ
ADDR
CTRL
DATA
MCHCLK, MCHCLK# 100/133MHZ
Generator
PCICLK0,1 33MHZ
AGTL+ BUS
MCH_66 66MHZ LAN_PCLK 33MHZ
ADDR
CTRL
DATA
SIO_48 48MHZ
DOT_CLK 48MHZ
AGPCLK 66MHZ ICH_48 48MHZ
ICH_14 14.318MHZ
AGP / ADD AGP BUS
Slot
845G / GL
BGA 760 Pin
DDR1
DDR2
DDR BUS
VGA BUS
VGA
Connector VCC_AGP 1.5V
VCCP
MEM_STR 2.5V
HUB LINK
BUS
PCI Slot 1
PCI Slot 2
PCICLK0,1,2,3 33MHZ
ICH_66 66MHZ
A A
IDE Primary UltraDMA 66/100 ICH_PCLK 33MHZ
ICH_48 48MHZ
IDE Secondary
ICH4 ICH_14 14.318MHZ
FW82801DB PCI BUS
VT6306
PCI BUS 1394 PORT
C_MEDIA VCC5_SB 5V VCCP
INT & PWR-MNG
8738 VCC3_SB 3.3V VCC3 3.3V 1394PCLK 33MHZ 1394 Chip
Audio chip AUDIO_PCLK 33MHZ VCC1_5SB 1.5V VCC_AGP 1.5V
LPC BUS
Realtek
FirmWare
8100BL LAN_PCLK 33MHZ Hub
FWH_PCLK 33MHZ
SIO_PCLK 33MHZ BIOS
USB 6 PORT
LPC SIO SIO_48 48MHZ
Audio port Game Port USB Port 5 USB Port 3 USB Port 1 Mouse Parallel
Title Rev
USB Port 6 USB Port 4 USB Port 2 Keyboard Serial1
Micro-Star MS-6710 10B
Document Number
LAN Block Diagram
Last Revision Date:
Thursday, July 10, 2003 Sheet 2 of 30
1
8 7 6 5 4 3 2 1
Power Delivery Map
D D
ATX 12V POWER Supply
3.3V 5V 5VSB 12V
1A
VRM9.0 Processor Core
Processor Vtt
Power
Translator
2.5V VREG 1.5V VREG MCH Core 1.5V
ACPI IC
MCH Vtt
MCH AGP
C OP 1.5VSB MCH Memory DDR 2.5V C
VREG
POWER CONSUMPTION
3.3V DDR System Memory 2.5V
DUAL VCCP VCC_AGP VCC1_8 VCC3_DIMM VCC3 VCC5 VCC5_SB +12V -12V
FET CPU 69.0A 0 0 0 0 0 0 NOTE4 0
3.3V VREG MCH 2.4A NOTE1 0.2A 2.0A 0 0 0 0 0
ICH4 0 0 NOTE3 0 NOTE3 0 NOTE3 0 0
ICH4 Core 1.5V CY283490C 0 0 0 0 0 0 0 0 0
FWH -SST 0 0 0 0 0
ICH4 VCCSUS 1.5VSB W83627HF 0 0 0 0 0 0 0 0
DIMM 0 0 0 NOTE2 0 NOTE2 0 0
ICH4 I/O 3.3V PCI 0 0 0 0 0 0 0 0
USB 0 0 0 0 0 0
ICH4 Resume 3.3V AGP 0 8.0A 0 0 6.0A 2.0A ? 1.0A 0
1.8V VREG ICH4 Resume I/O 1.8V
5V TO 3.3V ICH4 RTC 3.3V
RESISTOR
ICH4 5V
B B
FWH 3.3V
NOTE1 --- MCH
VCC_AGP = VCC1_5 (1.5A) + VCC_AGP (0.37A)
LPC Super I/O 3.3V
NOTE2 --- DIMM
S0 STATE --- 2.0A * 2 = 4.0A ---> V_DIMM
S1/S3 STATE --- 200mA * 2 = 400mA ---> V_DIMM
CLOCK GEN 3.3V V_DIMM -->400mA*2.5V/3.3V=303mA --> VCC3_SB
NOTE3 --- ICH4
Power S0 S1 S3/S4/S5
HARDWARE AUDIO 3.3V 1.8V 132mA 99mA N/A
VCC_AGP 550mA 266mA N/A
VCC1_5SB 82mA 52mA 25mA
VCC3(I/O) 528mA 0.76mA N/A
PCI LAN 3.3V/2.5V VCC3_SB 167mA 1mA 0.8mA / N/A
VCC3_SB =
VCC1_8SB =
5VDual For USB and K/B VCC5_SB = VCC3_SB + VCC1_8SB
A A
Title Rev
Micro-Star MS-6710
Document Number
Power Delivery Map
Last Revision Date:
Thursday, July 10, 2003 Sheet 3 of 30
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General Purpose I/O Spec.
FWH
D D
GPIO Pin Type Function
ICH4
GPI 0 I ATA IDE 1 Detect
GPIO Pin Type Function
GPI 1 I ATA IDE 2 Detect
GPIO 0 I REQ#A
GPI 2 I Reserved
GPIO 1 I REQ#5
GPI 3 I Reserved
GPIO 2 I IRQE#
GPIO 3 I IRQF#
GPIO 4 I IRQG#
DEVICE ICH INT Pin IDSEL CLOCK
GPIO 5 I IRQH#
C
PCI Slot 1 INTA# AD16 PCICLK0 C
GPIO 6~7 I Not Implemented
INTB#
GPIO 8 I SIO_PME# INTC#
INTD#
GPIO 9~10 I Not Implemented
GPIO 11 I External SMI PCI Slot 2 INTB# AD17 PCICLK1
INTC#
GPIO 12~13 I Not Implemented
INTD#
GPIO 14~15 I Not Implemented INTA#
GPIO 16 O Non Connect
PCI LAN INTC# AD26 LANPCLK
GPIO 17 O GNT#5
GPIO 18~21 O Non Connect
PCI AUDIO INTF# AD25 AUDPCLK
B GPIO 22 O/D Non Connect B
GPIO 23 O BIOS Protect
PCI 1394 INTH# AD23 1394PCLK
GPIO 24~27 I/O Non Connect
GPIO 28 I/O LAN DISABLED(ICH4)
GPIO 29~47 I/O Non Connect
A A
Title Rev
Micro-Star MS-6710 10B
Document Number
GPIO Spec.
Last Revision Date:
Thursday, July 10, 2003 Sheet 4 of 30
5 4 3 2 1
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CLOCK GENERATOR BLOCK *Trace < 0.5"
Shut Source Termination Resistors Pull-Down Capacitors
FB1 U1 CPUCLK R1 49.9 1%
VCC3V 39 41 CPU0 R2 27.4RST CPUCLK CPUCLK# R3 49.9 1% CPUCLK C1 X_10p
VCC3 CPU_VDD CPUCLK0 CPUCLK 6
30S/0805 40 CPU0# R4 27.4RST CPUCLK# MCHCLK R5 49.9 1%
CPUCLK0# CPUCLK# 6
CB1 CB2 CB3 CB4 CB5 MCHCLK# R6 49.9 1% CPUCLK# C2 X_10p
104P X_104P X_106P/0805 X_104P 104P 36 38 CPU1 R7 27.4RST MCHCLK
CPU_GND CPUCLK1 MCHCLK 8
37 CPU1# R8 27.4RST MCHCLK# MCHCLK C3 X_10p
CPUCLK1# MCHCLK# 8
filtering from 10K~1M Trace less 0.2"
46 MCHCLK# C4 X_10p
D
MREF_VDD D
* Put GND copper under Clock Gen. CPUCLK2 45
RN1 49.9ohm for 50ohm M/B impedance
CB6 44 8P4R-33 CN1
connect to every GND pin 104P CPUCLK2# MCH_66
43 MREF_GND 1 2 MCH_66 8 2 1
* 40 mils Trace on Layer 4 3 4 ICH_66 CLOCK STRAPPING RESISTORS AGPCLK 4 3
ICH_66 12
32 31 5 6 AGPCLK ICH_66 6 5
with GND copper around 3V66_VDD 3V66_0 AGPCLK 16
30 7 8 MCH_66 8 7
CB7 3V66_1 FS0 R9 1K VCC3V
it 3V66_2 28
104P 29 27 SEL48_2 R10 33 X_8P4C-10P
3V66_GND 3V66_48/SEL66_48# DOT_CLK 8
* put close to every power pin FS2 VCC3V R11 1.5K CN2
* FS2/PCI0 6
FS3 R12 I_33
Trace Width 7mils. 9 PCI_VDD FS3/PCI1 7
SEL48_1
1394PCLK 28
FS1 R13 8.2K PCICLK0
7 8
* CB8 SEL48_24#/PCI2 8 BSEL0 6
PCICLK1
5 6
Same Group spacing 15mils 104P FS4
7 8
PCICLK0 LANPCLK
3 4
* 5 PCI_GND FS4/PCI3 10
RN2
5 6
PCICLK1 PCICLK0 18 1 2
Different Group spacing 30mils PCI4 11 3
8P4R-33 1
4
LANPCLK
PCICLK1 18
X_8P4C-10P
* 18 PCI_VDD PCI5 12 2
AUDPCLK
LANPCLK 19
Differentical mode spacing 7mils on itself CB9 PCI6 14
RN3
7 8
SIO_PCLK
AUDPCLK 22
RN4 CN3
PCI7 15 5 6 SIO_PCLK 13
104P 13 16 8P4R-33 3 4 FWH_PCLK SEL48_1 1 2 VCC3V AUDPCLK 2 1
PCI_GND PCI8 FWH_PCLK 20
17 1 2 ICH_PCLK FS3 3 4 SIO_PCLK 4 3
PCI9 ICH_PCLK 11
FB2 FS2 5 6 FWH_PCLK 6 5
VDDA3V 24 FS4 7 8 ICH_PCLK 8 7
VCC3 48_VDD
X_80_0805 C5 22 FS0 R14 33 ICH_48
FS0/48MHz ICH_48 12
0.01u 23 FS1 R15 47 SIO_48 8P4R-10K X_8P4C-10P
FS1/24_48MHz SIO_48 13
CP1 21 48_GND SEL48_2 R16 10K 1394PCLK C6 X_10P
2 REF_VDD
X_COPPER C7 48 MUL0 R17 33 ICH_14
MUL0/REF0 ICH_14 12
C CB10 CB11 0.01u 1 MUL1 R18 33 AUDIO_14 MUL0 R19 10K MUL0=0 ICH_14 C8 10P C
MUL1/REF1 AUDIO_14 22
X_104P X_476P/0805 47 MUL1=1
REF_GND MUL1 R20 X_10K AUDIO_14 C9 10P
34 3 X1 C10 22P
C12 CORE_VDD X1 SIO_48 C11 10P
0.01u X1 14M-32pf-HC49S-D
33 4 X2 C13 22P MUL1 R21 X_10K VCC3V ICH_48 C14 10P
CORE_GND X2
SMBCLK_ISO 26 35 R22 475RST Iref = 2.32mA SEL48_2 C261 10P
12,13,14,18,25 SMBCLK_ISO SCLK IREF
SMBDATA_ISO 25
12,13,14,18,25 SMBDATA_ISO SDATA
RESET# 20 FS4 FS3 FS2 FS1 FS0 FSB (MHz)
R23 1K 19 42 PWR_DN# R24 1K VCC3V
VCC3 VTT_GD# PWR_DN#
1 1 1 0 1 100 MHz
C
CY28349
R25 Q1 R26
VCCP B 1 1 1 1 1 133 MHz Ioh=6*Iref
220 3904 VCC3 VCC3 VCC3 VCC3
X_1K Voh=0.71V
E
R27 X_10K
C
VCC3
R28
Q2 CB12 CB13 CB14 CB15 SMBCLK_ISO R29 4.7K
used only for EMI issue
6 SKTOCC# B VCC3
X_3904 104P X_104P X_104P X_104P SMBDATA_ISO R30 4.7K Trace less 0.2"
X_220
E
SECONDARY IDE BLOCK
B
PRIMARY IDE BLOCK B
IDE2
IDE1 YJ220-CW-1
SDD[8..15] 12
YJ220-CB-1 HD_RST# R31 33 1 2
HD_RST# R32 33 1 2 SDD7 3 4 SDD8
25 HD_RST# 12 SDD[0..7]
PDD7 3 4 PDD8 SDD6 5 6 SDD9
12 PDD[0..7]
PDD6 5 6 PDD9 SDD5 7 8 SDD10
PDD5 7 8 PDD10 SDD4 9 10 SDD11
PDD4 9 10 PDD11 SDD3 11 12 SDD12
PDD3 11 12 PDD12 SDD2 13 14 SDD13
PDD2 13 14 PDD13 SDD1 15 16 SDD14
PDD1 15 16 PDD14 SDD0 17 18 SDD15
PDD0 17 18 PDD15 19
19 PDD[8..15] 12 12 SD_DREQ 21 22
12 PD_DREQ 21 22 12 SD_IOW# 23 24
12 PD_IOW# 23 24 12 SD_IOR#