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HP-DIO FOUR CHANNEL TERMINAL MULTIPLEXER
FIRMWARE INTERNAL MAINTENANCE SPECIFICATION (IMS)




HEWLETT PACKARD COMPANY MAY 9, 1986
Roseville Networks Division
8000 Foothills Boulevard Elizabeth Poteet
Roseville, California 95678




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ones; BITS a, BITS 1, BITS 2, BITS 3. Each of these is set with
the bits to strip on incomIng characters according to the data in
the most recent configuration change interrupt for that port.

FILES CHANGED -
MX VAR - Took out declaration for BITS_MSK; added BITS_a, BITS_1,
- BITS_2, and BITS_3.
MX4INIT - Took out initialization for BITS MSK. Initialized BITS_a,
BITS_l, BITS_2, and BITS_3 instead.
MX4RX - Added parameter to RX macro for the bits mask variable.
RXERR - Same as MX4RX; added parameter to RX macro for bits mask
variable.
MX4TX - Took BITS MSK out of the extrn area. I don't know where it
was used or why it was there in the first place. Probably
an oversight.
MXSBR - The routine, HSTCON, now passes the bits per character mask
value back to. the calling routine instead of setting the
value in the BITS MSK variable as before.
MXPTO, MXPT1, MXPT2, MXPT3 - These routines now receive the bits per
character mask value in the A register after HSTCON has
finished execution and returned. They then save the mask
value in the appropriate variable location for that port.
MX4EQUS - The RX macro was changed to include the bit mask variable.

RELIABILITY IMPROVEMENT (1/89 - Randy stout - Production Engineer)
BRIEF DESCRIPTION - INTERMITTENT BUG IN SELF TEST
SYMPTOM - The 98642 would occasionally (frequency ranging from 1
failure in 10 passes to 1 failure in 800 passes) fail it's on-board
Self Test.
REASON - Contrary to the published information, Zilog's CTC chip
requires a Reset before interrupts are enabled. Issuing the Reset and
the Enable Interrupt in the same control word can lead to a race
condition on the chip. If there is an interrupt pending AND the
Interrupt Enable occurs before the RESET, the CTC will issue a Z80
Interrupt. This combination occurred during the SIO Test portion of
the Self Test, leading technicians to believe the SIO was at fault.
The board would often pass Self Test with the new SIO - at least



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during the first few cycles through the test.

4C)LUTION - Since the fault occurred because there was an interrupt
pending during the signal race on the CTC, it proved cleaner to remove
the pending interrupt than to change the CTC initialization. The
pending interrupt resulted from setting all four channels of CTC 1 as
19.2 KBaud generators (at the beginning of the SIO Test). Only the
first two channels were actually used as baud rate generators. The
third channel was not required until later in the SIO test. There, it
is used as a "dead man" timer. By changing
LD B,4 to
LD B,2 at line 0304 (hex) in MX4ST, the intermittent interrupt
was eliminated.
OTHER CHANGES - In addition to this one bug the code was cleaned up in
other places. Redundant code was removed and the SIOs were
initialized according to Zilog's latest recommendations. The source
listing is clearly commented at each change.




SECTION SCOPE

This document describes the internal structure of the firmware
implemented for the HP-DIO RS-232 4 channel terminal multiplexer
card (98642A). Specifically, this document'describes:
1. All symbols used by the firmware except for symbols
used as labels in the instruction sequence

2. The firmware data structure

3. The function of each firmware module


4. Any other information pertinent to the understanding
of the firmware

The reader is referred to the following related documents:

1. HP-DIO FOUR CHANNEL TERMINAL MULTIPLEXER FIRMWARE
EXTERNAL REFERENCE SPECIFICATION (ERS)
by Elizabeth Poteet

2. HP-DIO FOUR CHANNEL TERMINAL MULTIPLEXER HARDWARE
EXTERNAL REFERENCE SPECIFICATION (ERS)
by Bob Bortolotto

3. Zilog Z80 CPU.Technical Manual




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4. zilog Z80-SIO Technical Manual
5. Zilog Z80-CTC Technical Manual

This document assumes the reader has the full understanding of all
the information given in the Hardware and Firmware ERS.
COMMONLY USED ABBREVIATIONS
The following is a list of the abbreviations used in this document.
RX - This is used for Receive, most commonly used to describe the
characters which are entering the card from the frontplane.
TX - Transmit; most commonly used to describe the characters that
the host is sending to the card to be sent out one of the ports.
ISR - Interrupt Service Routine
OVERVIEW OF FIRMWARE

The purpose of this chapter is to give an overview of the basic
structure of the firmware on the FORDYCE card. Except for the Self
Test and Initialization routines (see next section), all of the
firmware on the card is completely interrupt driven. The interrupts
can come from
either the host via the INT-COND register in the card, the UARTs
(SIO's) or the CTC's. The first portion of this chapter gives a
somewhat external explanation of all the possible interrupts the
card may get. The second portion of this chapter will give an
overview of the possible interrupts the card may send to the host
(via the COMMAND register) with an explanation of the circumstances
which cause the card to send them.

The firmware on the 98642A card can be accessed in three ways:
1. System power-up - This causes a card reset and a jump to
location 0 in the ROM (the beginning of Self Test). Self
Test is executed and, if successful, is followed by Init
(card initialization routine). The end of Init is an
idle loop that is in essence the main routine of the
firmware. All the other firmware on the card is interrupt
driven.




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2. Soft Reset - A soft reset is triggered by the host writing
a SOH to the RESET/I.D register (Z-SO address SOOOH). This
causes a NMI interrupt to the Z-SO causing a jump to location
66H in the ROM. This location contains a jump to the Init
routine described above.
3. Z-80 Interrupt - The Z-80 may be interrupted by either the
UARTs (SIO) or the counter Timer Chips (CTC). The following
illustrates the types of interrupts associated with each
type of chip.
SIO - Receive interrupt: Incoming data to card
Transmit interrupt: Outgoing data from the host
External status interrupt: Modem line changes *(put note
about ST RTS line)
CTC - Host interrupt via the COMMAND register
Timer interrupts (16 millsec.)

In the following sections, the CTC and SIO interrupt service routines
will be identified and briefly described.

SIO - RECEIVE INTERRUPT ROUTINES

_ there are four ports on the card, there is a Receive Interrupt
sociated with each port. An incoming character causes a jump to
the routine associated with the port which received the character.
These routines are functionally identical.
The Receive Interrupt routine basically retrieves the character from
the port the interrupt was received on, strips any parity bits,
checks the Bit Map location for the character, sends the host a
Special Character interrupt if the Bit Map location is set, and
places the character in the Receive buffer along with a status
byte.
There are also four Receive Error routines which are called instead
of the four described above when there is an error (parity, overflow,
or framing) associated with a Receive character. These routines are
also functionally identical.

The Receive Error routines only differ from the Receive routines in
that they first retrieve the type of error from the SIO, and set the
appropriate bits in the status byte to indicate the type of error.
After this, the rest of the Receive Error routine is the same as the



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Receive routine.
SIO - TRANSMIT INTERRUPT ROUTINES
As with Receive Interrupts, there is a Transmit routine associated
with each port. These interrupts occur when the SIO has already
transmitted a character and is ready to transmit another. These
routines are also functionally identical.
The Transmit routine first checks that the Transmit buffer is not
empty. If not, a character is retrieved and sent to the SIO to be
transmitted.

SIO - EXTERNAL STATUS INTERRUPT ROUTINES
These interrupt service routines are called when one of the SIO
channels has a transition on either one of the modem lines or
a Break has occurred. There is an External Status routine for
each port to determine which condition caused the interrupt.
There is also a Break subroutine which all four External status
routines call if the reason for the interrupt was a incoming
Break.
eTC - 16 MILLISECOND TIMER INTERRUPT

When the 16 millisecond timer in the eTC times out the Z-80 is
interrupted and the Timer Interrupt Service routine is invoked.
The purpose of this routine is to send an interrupt to the host
to inform it to check the Receive buffers for characters.

eTC - HOST INTERRUPTS
Whenever the host writes a value to the COMMAND register, a Host
Interrupt service routine is invoked via CTC 1. The interrupt
service routine accesses the COMMAND register to determine the
type of host interrupt called. As described in the ERS, the bits
in the COMMAND register represent the types of host interrupts
available. They are:
Port 0 Transmit Buffer Not Empty
Port 1 Transmit Buffer Not Empty
Port 2 Transmit Buffer Not Empty
Port 3 Transmit Buffer Not Empty
Port 0 Configuration Change
Port 1 Configuration Change



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Port 2 Configuration Change
a rt 3 Configuration Change
rt 0 Send Break
Port 1 Send Break
Port 2 Send Break
Port 3 Send Break
Modem Ouput Change
Timer On/Off
Self Test On
EQUATE & VARIABLE SYMBOLS DICTIONARY

This chapter defines all the symbols which are not used as a label or
subprogram name. All equates and variables used in the firmware are
-contained in two files: &MX-VAR and &MX4EQUS. The labels defined
in &MX-VAR are all of the variables used in the firmware. They will
be defined in two section; those that are a'ccessed by both the card
and the host and those that are only accessed by the card. The labels
defined in &MX4EQUS are equates used throughout the firmware. This
file is copied to almost every other file. The labels defined in
&MX4EQUS are cross referenced by the files which use each in the
individual file descriptions further in this document. This chapter
will merely give a description of the usage of each without specifying
which firmware module uses them.
SHARED VARIABLES IN &MX-VAR
_-0