Text preview for : MBX-159 MS60-1-01 0.3.pdf part of Sony MBX-159 MS60-1-01 0.3 Sony Notebook MBX-159 MS60-1-01 0.3.pdf



Back to : MBX-159 MS60-1-01 0.3.pdf | Home

5 4 3 2 1



Schematics Page Index (Title / Revision / Change Date)
Page Title of Schematics Page Rev. Date Page Title of Schematics Page Rev. Date
01 Schematics Page Index 0.30 06/6/21 36 EXPRESS/OIDE/TP 0.30 06/6/21
02 Block Diagram 0.30 06/6/21 37 PCI (PCI BUS) 0.30 06/6/21
D
03 Yonah(HOST BUS) 1/2 0.30 06/6/21 38 PCI ( ILINK) 0.30 06/6/21 D
04 Yonah(HOST BUS) 2/3 0.30 06/6/21 39 PCI (MS) 0.30 06/6/21
05 Yonah(Power/Gnd) 3/3 0.30 06/6/21 40 PCI ( PCMCIA) 0.30 06/6/21
06 CALISTOGA (HOST) 1/7 0.30 06/6/21 41 USB2.0 0.30 06/6/21
07 CALISTOG (DMI) 2/7 0.30 06/6/21 42 CRT 0.30 06/6/21
08 CALIST (GRAPHIC) 3/7 0.30 06/6/21 43 DB CONNS & LED 0.30 06/6/21
09 CALISTOGA (DDRII) 4/7 0.30 06/6/21 44 Power Design Diagram 0.30 06/6/21
10 CALIST (POWER,VCC) 5/7 0.30 06/6/21 45 DC_IN/Charger (MAX1909) 0.30 06/6/21
11 CALIST (VCC CORE) 6/7 0.30 06/6/21 46 SYSPWR(+3VALW/+5VALW) 0.30 06/6/21
12 CALIST (VSS) 7/7 0.30 06/6/21 47 SYSPWR(+1_5VRUN/+1_05VRUN) 0.30 06/6/21
13 DDRII(SO-DIMM_0) 1/3 0.30 06/6/21 48 VHCORE(ISL6262) 0.30 06/6/21
14 DDRII(SO-DIMM_1) 2/3 0.30 06/6/21 49 Others power plan 0.30 06/6/21
C
15 DDRII(Termination) 3/3 0.30 06/6/21 50 OVP protection 0.30 06/6/21 C

16 VGA(PCI-E/STRAP) 1/7 0.30 06/6/21 51 VGAPWR(VGACORE&IO) 0.30 06/6/21
17 VGA(PCI-E/STRAP) 2/7 0.30 06/6/21 52 DDR2PWR(+1_8V_SUS/+0_9VRUN) 0.30 06/6/21
18 VGA(GDDR3) 3/7 0.30 06/6/21 53 CLOCK GEN 0.30 06/6/21
19 VGA(TMDS/LVDS) 4/7 0.30 06/6/21 54 HOLE 0.30 06/6/21
20 VGA(SS) 5/7 0.30 06/6/21 55 POWER SEQUENCE 0.30 06/6/21
21 VGA(MULTIUSE) 6/7 0.30 06/6/21 56 History 0.30 06/6/21
22 VGA(TV/CRT) 7/7 0.30 06/6/21
23 VRAM(GDDR3) 0.30 06/6/21
24 VRAM(POWERBYPASS) 0.30 06/6/21
25 LVDS / S_VIDEO 0.30 06/6/21
26 ICH7-M( PCI/USB ) 1/5 0.30 06/6/21
B 27 ICH7-M( LPC,IDE,SATA )2/5 0.30 06/6/21 B

28 ICH7-M( GPIO) 3/5 0.30 06/6/21
29 ICH7-M( POWER) 4/5 0.30 06/6/21
30 ICH7-M( GND) 5/5 0.30 06/6/21
31 SATA HDD/CD-ROM 0.30 06/6/21
32 EC+KBC 0.30 06/6/21
33 Flash ROM/XBUS 0.30 06/6/21
34 Mini_Card/BT 0.30 06/6/21
35 FAN/HW THERMAL PROTECT 0.30 06/6/21 P. Leader Check by Design by




A 1P-0066700-8010 - Unimicro A
PCB P/N:
HON HAI PRECISION IND. CO., LTD.
1P-0066201-8010 - NANYA
FOXCONN
Title
CPBG - R&D Division

Index Page
Size Document Number Rev
Project Code & Schematics Subject: MS60 Main Board Custom 0.30
MS60-1-01 (MBX-159)
Date: Wednesday, October 04, 2006 Sheet 1 of 56
5 4 3 2 1
5 4 3 2 1




SYSTEM DC/DC
MS60 (CALISTOGA PM/GM+Gfx Block Diagram) INPUTS
MAX8734 P.46
OUTPUTS
+5VALW

CPU Processor DCBATOUT
+5VALW_LDO
+3VALW
Yonah +ECVCC


D GDDR3 Video RAM Celeron-M Clock Gen. SYSTEM DC/DC D
P.3~5
8Mx32bx2pcs n-VIDIA 9LPR321BKLF MAX8743 P.47
/16MX32bx2pcs G72M FSB INPUTS OUTPUTS
P.23~24 P.53
23x23 mm 533/667 MHz +1_5VRUN
DCBATOUT +1_05VRUN
PCIE X16
P.16~22

13.3"WXGA
. LVDS
North Bridge DCBATOUT
SC486 P.52
+1_8V_S3_SUS



.
P.25 +0_9VRUN


CRT Conn
CRT Calistoga SO-DIMM
533/667 MHz
P.42 945GM / PM CPU DC/DC
533/667 MHz DDRII RAM
TV OUT 940 GML ISL6262 P.48
S-Video Conn P.13~15
FUNCTION BD P.25




TMDS
INPUTS OUTPUTS
P.6~12
DCBATOUT VHCORE
HP JACK
X4 DMI
To Docking FUNCTION BD
(Direct Media Interface)
Mic In Jack Mini-CARD
C ALC262 PCIE X 1 AMP DC/DC C

HD Audio WLAN 802.11a/b/g MAX1616 P.49
APA2068 Audio Codec
Int. Speaker Amplifier EXPRESS CARD BD INPUTS OUTPUTS
1.5W/8ohm x 2 WWAN USB PCIE X 1 TPS2231 DCBATOUT +8VRUN
P.34 Express Card Power SW
USB2.0
INT Mic
MS60_L ONLY OIDE
USB 2.0
SC411
MIC BD P.36 P.51
CONN.X2
PCI BUS INPUTS OUTPUTS
P.41
MS_DUO/PRO DCBATOUT NV_VDD
Slot P.39 TI PCI8402
CardBus 2.5" SATA SATA
PS/2 Touch Pad GMT966 P.51
CardReader HDD P.36
i-Link P.31 South Bridge +1_5VRUN PEX_VDD
1394 i.LINK SMB Channel 2
P.38 BATT CONN
ICH7-M P.45
PATA ODD IDE ATA
LPC MAXIM CHARGER
MDC 1.5
P.37~40 P.31 Thermal Sensor MAX1909 P.45
RJ11
HD Audio ENE KB3910SFC1 SMB Channel 1
G781-1P8f
Modem CPU & SYS INPUTS OUTPUTS
B

FUNCTION BD EC+KBC P.35
B



AD+
BT+
DCBATOUT
Thermal Sensor
Marvell 10/100 G781P8f
Ethernet PCIE X 1 (VGA&DDR So-DIMM)
RJ45 NS681601P
88E8036 P.21
USB2.0 EXPRESS CARD BD

Lid Switch
From System PCIE

P.26~30 P.32
Pure H/W Thermal Shutdown




PWM
XBUS
USB M6509
P.35
CRT DVI-D HUB
7 Pin 14 Pin
BT
Flash BIOS CPU FAN
PORT REPLICATOR GLAN 8Mbits
50 Pin + PWR + GND P.33 P.35
EXPRESS CARD BD
A A




PORT REPLICATOR


CRT DVI-D USB*3 RJ45
FOXCONN HON HAI PRECISION IND. CO., LTD.
Title
CPBG - R&D Division

Block Diagram (All)
Size Document Number Rev
0.30
Custom MS60-1-01 (MBX-159)
Date: Wednesday, October 04, 2006 Sheet 2 of 56
5 4 3 2 1
1 2 3 4 5 6 7 8




1 30MIL TP41
U24A
H_A#3 J4 H1 +1_05VRUN
H_A#4 A[3]# ADS# H_ADS# 6
L4 E2 H_BNR# 6
H_A#5 A[4]# BNR#
M3 G5 H_BPRI# 6
H_A#6 A[5]# BPRI#
K5
A[6]#




1
ADDR GROUP 0
H_A#7 M1 H5
H_A#8 A[7]# DEFER# H_DEFER# 6
N2 F21 R15
6 H_A#[31..3] H_A#9 A[8]# DRDY# H_DRDY# 6
J1 E1 H_DBSY# 6
H_A#10 A[9]# DBSY# 56_J
N3
H_A#11 A[10]#
A P5 F1 0402 A




2
H_A#12 A[11]# BR0# H_BREQ#0 6
P2
H_A#13 A[12]# H_IERR#
L1 D20




CONTROL
H_A#14 A[13]# IERR#
P4 B3 H_INIT# 27
H_A#15 A[14]# INIT#
P1
H_A#16 A[15]#
R1 H4 H_LOCK# 6
A[16]# LOCK#
6 H_ADSTB#0 L2 H_CPURST# 6
ADSTB[0]#
6 H_REQ#[4..0] B1 H_RS#[2..0] 6
H_REQ#0 RESET# H_RS#0
K3 F3
H_REQ#1 REQ[0]# RS[0]# H_RS#1
H2 F4
H_REQ#2 REQ[1]# RS[1]# H_RS#2 +1_05VRUN
K2 G3
H_REQ#3 REQ[2]# RS[2]#
J3 G2 H_TRDY# 6
H_REQ#4 REQ[3]# TRDY# 0402 150_J R30
L5
REQ[4]# XDP_TDI
G6 H_HIT# 6 2 1
H_A#17 HIT#
Y2 E4 H_HITM# 6
H_A#18 A[17]# HITM# 0402 39_J R31
U5
H_A#19 A[18]# XDP_TMS
R3 AD4 2 1
A[19]# BPM[0]#




ADDR GROUP 1
H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]#
U4 AD1
H_A#22 A[21]# BPM[2]#
Y5 AC4
A[22]# BPM[3]#




XDP/ITP SIGNALS
H_A#23 U2 AC2
H_A#24 A[23]# PRDY# H_THERMDA
R4 AC1
H_A#25 A[24]# PREQ# XDP_TCK 0402 27_J R33
T5 AC5
H_A#26 A[25]# TCK XDP_TDI XDP_TCK
T3 AA6 1 2
A[26]# TDI




1
H_A#27 W3 AB3 C401
H_A#28 A[27]# TDO XDP_TMS NC_2200P_50V_K_B 0402 680_J R32
W5 AB5
H_A#29 A[28]# TMS XDP_TRST# 0402 XDP_TRST#
Y4 AB6 2 1




2
H_A#30 A[29]# TRST#
W2 C20
H_A#31 A[30]# DBR# H_THERMDC
Y1
A[31]# close to cpu
B
6 H_ADSTB#1 V4
ADSTB[1]# PROCHOT#
D21 PROCHOT# Debug port not used . B




THERM
A24 H_THERMDA
A6
THERMDA
A25 H_THERMDC H_THERMDA 35 resistors close to CPU.
27 H_A20M# A20M# THERMDC H_THERMDC 35
27 H_FERR# A5
FERR# PM_THRMTRIP#
27 H_IGNNE# C4 C7 PM_THRMTRIP# 7
IGNNE# THERMTRIP#
Layout note: R34
1 0_J 2 H_STPCLK#_R D5
no stub on 27 H_STPCLK#
0402 C6
STPCLK#
27 H_INTR LINT0




H CLK
H_STPCLK# 27 H_NMI B4
LINT1 BCLK[0]
A22 CLK_CPU_BCLK 53
27 H_SMI# A3 A21 CLK_CPU_BCLK# 53
SMI# BCLK[1]
AA1
RSVD[01]
AA4 T22
RSVD[02] RSVD[12]
AB2
RSVD[03]
AA3
RSVD[04]
M4 D2




RESERVED
RSVD[05] RSVD[13]
N5 F6
RSVD[06] RSVD[14]
T2 D3
RSVD[07] RSVD[15]
V3 C1
RSVD[08] RSVD[16]
B2 AF1
RSVD[09] RSVD[17]
C3 D22
RSVD[10] RSVD[18]
C23
RSVD[19] +ECVCC
B25 C24
RSVD[11] RSVD[20]
CPU_478P FOX_PZ47823-2743-01




1
A#[32-39], APM#[0-1]: R466
Leave escape routing 47K_J
C on for future 0402 C




2
functionality
RESET#_KBC 32




3
D
Q17




1
C544
ICH7M's GPIO12: VIL---> -0.5V ~ 0.8V 7,16,26,28,31,32,33,43 PLT_RST# 1
G
0.1U_16V_M_B
VIH---> 2.0V ~ 3.3+0.5V S
0402




2
YONAH's PROCHOT#: VIL---> -0.1V ~ 0.3*VCCP 2N7002EPT




2
+1_05VRUN
VIH---> 0.7*VCCP ~ VCCP+0.1 A0202
+3VRUN +1_05VRUN
1




3
Q18
R14 If PROCHOT# is routed between