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1
F9J SCHEMATIC Revision 2.0 1
PAGE Content PAGE Content
SYSTEM PAGE REF.
47 DC & BAT IN
4 YONAH CPU (1) 48 History(1)
5 YONAH CPU (2) 49 History(2)
6 FAN CTRL&Thernal protection
7 CLK GEN-ICS954310
8 Calistoga--CPU
9 Calistoga--PCIE POWER PAGE REF.
10 Calistoga--DDR2
2 11 Calistoga--POWER 50_POWER_VCORE 2
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12 Calistoga--GND 51_POWER_SYSTEM
13 Calistoga--Strap 52_POWER_I/O_1.8V & 1.05VS
14 DDR2 SO-DIMM_0 53_POWER_I/O_DDR & VTT
15 DDR2 SO-DIMM_1 54_POWER_I/O_VTT & +2.5VS
16 DDR2 ADDRESS TERMINATION 55_POWER_VGA_CORE
17 LVDS & INVERTER CONN 56_POWER_+1.2VSP
18 CRT & TV OUT 57_POWER_CHARGER
19 ICH7M--CPU,IDE,AUDIO 58_POWER_PIC(Empty)
20 ICH7M--GPIO 59_POWER_DETECT
21 ICH7M--PCI,PCI-E,USB 60_POWER_PROTECT
22 ICH7M--VCC,GND 61_POWER_LOAD SWITCH
3 23 HDD & CD-ROM CONN 62_POWER_FLOWCHART 3
24 USB PORT 63_POWER_SIGNAL
25 B/T,F/P& TPM
26 B TO B CONN(M)
27 EMPTY Digitally signed by dd
28 EMPTY
29 PCI-E--LAN_RTL8101E DN: cn=dd, o=dd,
30 EMPTY
31 EMPTY ou=dd,
32 EMPTY
33 NEWCARD email=dddd@yahoo.
com, c=US
34 EC-IT8510E
4
35 ISA ROM & Touch Pad & KB& FP 4
Date: 2009.11.28
36 CARD READER_RST5117
37 DISCHARGE
07:21:19 +07'00'
38 Instant Key & Touch Pad
39 LEDs
40 G72M--PCIE (1)
41 G72M--FB (2)
42 G72M--VRAM (3)
43 G72M--RGB/LCD/ROM/GPIO (4)
44 G72M--MIOB/CRYSTAL/TMDS (5)
45 G72M--VRAM_TERMINATOR (6)
46 SREW HOLE
5 5
Title : PAGE REF.
ASUSTeK COMPUTER INC Engineer:
Size Project Name Rev
Custom F9J 2.0
Date: Thursday, November 23, 2006 Sheet 1 of 63
A B C D E
A B C D E
F9J BLOCK DIAGRAM
1 1
BATTERY
TYPE
3S1P Internal IO CON with Cable
3S2P
3S3P
SPEAKER TP CON F/P CON MDC CON BT CON INVERTER LVDS
+INT. MIC CON CON
Yonah
GDDR2 16Mx16 x4 CPU
2 479 .... CAP
POWER
RESET SM_BUS
2
DDR2 16M*16-2.5 1.8V SEQENCE
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INFINEON
AGTL
HOST BUS
1.468V,167MHZ
DCIN
LVDS & INV PCI-E DDR2 533/667
DDR2 SDRAM 533/667MHz DDR RTC
CON
G72M-V X8
945PM
SODIMM X2
+1.8V
.... CAP/RES FAN
CON.
CRT & TV G3-64(A3) +0.9VS
CON
THERMAL
DMI
SENSOR
3 X2 3
(MAX6657)
USB
USB2.0
PCI EXPRESS X1
PATA BUS ICH7-M
SATA BUS 652 USB2.0
B/T
ODD
BGA ACZ
Slave SATA HDD LAN 10/100 AC & BAT CON
NEWCARD FAN CTRL
Camera RTL8101E
4
TPM LPC, 33MHz 4
Connector
F/P
Azalia USB x2
RJ11,RJ45
ALC660 MINI CARD
CON
EC(IT8510E)
RTS5117
AUDIO AMP MDC Daughter Board
G1420 CON
ISA INTERNAL
4 IN 1 CON
ROM KEYBOARD HP CLOCK
5 GEN. 5
ICS954310 Title : BLOCK DIAGRAM
ASUSTeK COMPUTER INC Engineer:
MIC AMP MIC_IN
Size Project Name Rev
MAX4490AXK Custom F9J 2.0
Date: Thursday, November 23, 2006 Sheet 2 of 63
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A B C D E
EC GPIO SETTING
Pin Pin Name Signal Name Type Pin Pin Name Signal Name Type PCI Device IDSEL# REQ/GNT# Interrupts
32 PWM0/GPA0 N/A 48 GPH0 VSUS_ON O
33 PWM1/GPA1 FAN_PWM 54 GPH1 VSUS_GD# O
1 36 PWM2/GPA2 N/A 55 GPH2 CPUPWR_GD# O 1
37 PWM3/GPA3 N/A 69 GPH3 PM_PWRBTN# O
38 PWM4/GPA4 CHG_LED_UP# O 70 GPH4 SUSC_ON O
ICH7M_GPIO
39 PWM5/GPA5 PWR_LED_UP# O 75 GPH5 SUSB_ON O Pin Use As Signal Name Power
40 PWM6/GPA6 BATSEL_3S# O 76 GPH6 CPU_VRON O GPIO 00 i GPI PM_BMBUSY# +3VS
43 PWM7/GPA7 LCD_BACKOFF# O 105 GPH7 PM_RSMRST# O GPIO 01 i GPI PCI_REQ#5 +3VS
153 RXD/GPB0 NUM_LED O 148 GPI0 ICH7_PWROK O GPIO [5:2] i GPI PCI_INT[E:H]# +3VS
154 TXD/GPB1 CAP_LED O 149 GPI1 WATCH_DOG# O GPIO 06 i GPO BT_LED_EN +3VS
162 GPB2 N/A O 152 GPI2 N/A GPIO 07 i GPI RF_ON_SW# +3VS
163 SMCLK0/GPB3 SMB0_CLK I/0 155 GPI3 CHG_EN# O GPIO 08 i GPI EXTSMI# +3VSUS
164 SMDAT0GPB4 SMB0_DAT I/0 156 GPI4 PRECHG O GPIO 09 i GPI N/A +3VSUS
5 GA20/GPB5 A20GATE O 168 GPI5 BAT_LL# O GPIO 10 i GPI N/A +3VSUS
2 6 KBRST#/GPB6 RCIN# O 174 GPI6 BAT_LEARN O GPIO 11 i Native SMB_ALERT# +3VSUS 2
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165 GPB7 N/A I 81 ADC0 BAT_AD I GPIO 12 i GPI KBC_SCI# +3VSUS
47 CLKOUT/GPC0 N/A O 82 ADC1 ADP_ERR# I GPIO 13 i GPI N/A +3VSUS
169 SMCLK1/GPC1 SMB1_CLK I/0 83 ADC2 AC_AD I GPIO 14 i GPI N/A +3VSUS
170 SMDAT1/GPC2 SMB1_DAT I/0 84 ADC3 N/A GPIO 15 i GPO 802_LED_EN +3VSUS
171 GPC3 N/A 93 ADC8 KID0 GPIO 16 O 0 GPO PM_DPRSLPVR +3VS
172 TMRI0/WUI2/GPC4 ACIN_OC# I 94 ADC9 KID1 GPIO 17 O 1 GPO PCI_GNT#5 +3VS
175 GPC5 OP_SD# O 99 DAC0 N/A GPIO 18 O 1 GPO STP_PCI# +3VS
176 TMRI1/WUI3/GPC6 BAT_IN_OC# I 100 DAC1 N/A GPIO 19 i 1 GPI N/A +3VS
1 CK32KOUT/GPC7 EC_IDE_RST# O 101 DAC2 INVTER_DA O GPIO 20 O 1 GPO STP_CPU# +3VS
26 RI1#/WUI0/GPD0 SUSB# I 102 DAC3 BATSEL_2P# O GPIO 21 i 1 GPO N/A +3VS
29 RI2#/WUI1/GPD1 SUSC# I GPIO 22 i 1 Native PCI_REQ#4 +3VS
3
30 LPCRST#/WUI4//GPD2 PCI_RST# I GPIO 23 i 1 Native N/A +3VS 3
31 ECSCI#/GPD3 EXT_SCI# O GPIO 24 O 0 GPO MSK_PCIRST +3VSUS
41 GPD4 N/A GPIO 25 O 1 GPO N/A +3VSUS
42 GINT/GPD5 N/A GPIO 26 O 0 GPO BT_ON# +3VSUS
62 TACH0/GPD6 FAN0_TACH I ICH7M_PCI EXPRESS GPIO 27 O 0 GPO WLAN_ON# +3VSUS
63 TACH1/GPD7 N/A PCI-E Device PAIR GPIO 28 O 0 GPO N/A +3VSUS
87 ADC4/GPE0 WLAN_SW# I GPIO 29 i 0 Native USB_OC#5 +3VSUS
RTL8101E 1
88 ADC5/GPE1 BT_SW# I GPIO 30 i 0 Native USB_OC#6 +3VSUS
89 ADC6/GPE2 N/A GOLAN 2 GPIO 31 i 0 Native USB_OC#7 +3VSUS
90 ADC7/GPE3 N/A GPIO 32 O 1 GPO PM_CLKRUN# +3VS
NEWCARD 3
2 PWRSW/GPE4 PWR_SW# I GPIO 33 O 1 GPO N/A +3VS
44 WUI5/GPE5 N/A GPIO 34 O 0 GPO N/A +3VS
24 LPCPD#/WUI6/GPE6 LID_EC# I GPIO 35 O 0 GPO N/A +3VS
4
25 CLKRUN#/WUI7/GPE7 N/A SM_BUS ADDRESS : GPIO 36 i 0 GPO N/A +3VS
4
110 PS2CLK0/GPF0 / SM-Bus Device SM-Bus Address GPIO 37 i 0 GPI PCB_ID0 +3VS
111 PS2DAT0/GPF1 / Clock Generator 1101001x ( D2 ) GPIO 38 i 0 GPI PCB_ID1 +3VS
114 PS2CLK1/GPF2 / SO-DIMM 0 1010000x ( A0 ) GPIO 39 i 0 GPI PCB_ID2 +3VS
115 PS2DAT1/GPF3 / SO-DIMM 1 1010001x ( A4 ) GPIO [40:47] NA NA NA
116 PS2CLK2/GPF4 TP_CLK I/0 Thermal Sensor( MAX6657)--CPU 1001100x ( 98 ) GPIO 48 Native PCI_GNT#4 +3VS
117 PS2DAT2/GPF5 TP_DAT I/0 Thermal Sensor( G781-1)--VGA 1001101x ( 9A) GPIO 49 Native H_PWRGD +VCORE
118 PS2CLK3/GPF6 /
119 PS2DAT3/GPF7 / I
113 FA16/GPG0 FA16
112 FA17/GPG1 FA17
104 FA18/GPG2 FA18
5 5
103 FA19/GPG3 /
3 FA20/GPG4 THRM_CPU# I Title : Schematic data
4 FA21/GPG5 N/A Engineer:
ASUSTeK COMPUTER INC
27 LPC80HL/GPG6 PMTHERM# O Size Project Name Rev
28 LPC80LL/GPG7 AC_APR_UC# I Custom F9J 2.0
Date: Thursday, November 23, 2006 Sheet 3 of 63
A B C D E
5 4 3 2 1
D D
T411 T401
U401A H_D#[63:0]
8 H_A#[16:3] H_D#[63:0] 8
H_A#3 J4 H1
A[3]# ADS# H_ADS# 8 U401B
H_A#4 L4 E2
A[4]# BNR# H_BNR# 8
H_A#5 M3 G5 H_D#0 E22 AA23 H_D#32
A[5]# BPRI# H_BPRI# 8 D[0]# D[32]#
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_D#2 D[1]# D[33]# H_D#34
M1 A[7]# DEFER# H5 H_DEFER# 8 E26 D[2]# D[34]# V24
ADDR GROUP 0
H_A#8 N2 F21 H_D#3 H22 V26 H_D#35
A[8]# DRDY# H_DRDY# 8 D[3]# D[35]#
H_A#9 J1 E1 H_D#4 F23 W25 H_D#36
DATA GRP 2
A[9]# DBSY# H_DBSY# 8 D[4]# D[36]#
DATA GRP 0
H_A#10 N3 H_D#5 G25 U23 H_D#37
H_A#11 A[10]# H_D#6 D[5]# D[37]# H_D#38
P5 A[11]# BR0# F1 H_BR0# 8 E25 D[6]# D[38]# U25
H_A#12 P2 H_D#7 E23 U22 H_D#39
H_A#13 A[12]# D[7]# D[39]#
L1 D20 H_IERR# R401 56 H_D#8 K24 AB25 H_D#40
CONTROL
A[13]# IERR# +VCCP_AGTL+ D[8]# D[40]#
H_A#14 P4 B3 H_D#9 G24 W22 H_D#41
A[14]# INIT# H_INIT# 19 D[9]# D[41]#
H_A#15 P1 H_D#10 J24 Y23 H_D#42
A[15]# D[10]# D[42]#
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H_A#16 R1 H4 H_D#11 J23 AA26 H_D#43
A[16]# LOCK# H_LOCK# 8 D[11]# D[43]#
L2 H_D#12 H26 Y26 H_D#44
8 H_ADSTB#0 ADSTB[0]# D[12]# D[44]#
B1 H_D#13 F26 Y22 H_D#45
8 H_REQ#[4:0] RESET# H_CPURST# 8 D[13]# D[45]#
H_REQ#0 K3 F3 H_RS#0 H_D#14 K22 AC26 H_D#46
REQ[0]# RS[0]# H_RS#0 8 D[14]# D[46]#
H_REQ#1 H2 F4 H_RS#1 H_D#15 H25 AA24 H_D#47
REQ[1]# RS[1]# H_RS#1 8 D[15]# D[47]#
H_REQ#2 K2 G3 H_RS#2 H23 W24
REQ[2]# RS[2]# H_RS#2 8 8 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 8
H_REQ#3 J3 G2 G22 Y25
REQ[3]# TRDY# H_TRDY# 8 8 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 8
H_REQ#4 L5 J26 V23
REQ[4]# 8 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 8
C 8 H_A#[31:17] HIT# G6 H_HIT# 8 C
H_A#17 Y2 E4 +VCCP_AGTL+
A[17]# HITM# H_HITM# 8
H_A#18 U5 H_D#16 N22 AC22 H_D#48
H_A#19 A[18]# T402 H_D#17 D[16]# D[48]# H_D#49
R3 A[19]# BPM[0]# AD4 K25 D[17]# D[49]# AC23
2
ADDR GROUP 1
H_A#20 W6 AD3 T403 H_D#18 P26 AB22 H_D#50
A[20]# BPM[1]# D[18]# D[50]#
XDP/ITP SIGNALS
H_A#21 U4 AD1 T404 R409 H_D#19 R23 AA21 H_D#51
H_A#22 A[21]# BPM[2]# T405 1KOhm H_D#20 D[19]# D[51]# H_D#52
Y5 A[22]# BPM[3]# AC4 L25 D[20]# D[52]# AB21
DATA GRP 1
H_A#23 U2 AC2 T406 H_D#21 L22 AC25 H_D#53
DATA GRP 3
H_A#24 A[23]# PRDY# R402 @ 56 H_D#22 D[21]# D[53]# H_D#54
R4 AC1 +VCCP_AGTL+ L23 AD20
1
H_A#25 A[24]# PREQ# R403 56 GTLREF0 H_D#23 D[22]# D[54]# H_D#55
T5 A[25]# TCK AC5 M23 D[23]# D[55]# AE22
H_A#26 T3 AA6 R404 56 <500 mil (55 Ohm) H_D#24 P25 AF23 H_D#56
H_A#27 A[26]# TDI R405 @ 56 T/B trace 4.5 , H_D#25 D[24]# D[56]# H_D#57
W3 A[27]# TDO AB3 P22 D[25]# D[57]# AD24
H_A#28 W5 AB5 R406 56 R415 Space 25 H_D#26 P23 AE21 H_D#58
H_A#29 A[28]# TMS R407 56 2K H_D#27 D[26]# D[58]# H_D#59
Y4 A[29]# TRST# AB6 GND T24 D[27]# D[59]# AD21
H_A#30 W2 C20 T407 1% H_D#28 R24 AE25 H_D#60
H_A#31 A[30]# DBR# H_D#29 D[28]# D[60]# H_D#61
Y1 A[31]# L26 D[29]# D[61]# AF25
V4 D21 PWRLMT# H_D#30 T25 AF22 H_D#62
8 H_ADSTB#1 ADSTB[1]# PROCHOT# PWRLMT# 34,35,57 D[30]# D[62]#
A24 H_D#31 N24 AF26 H_D#63
THERMDA H_THERMDA 6 D[31]# D[63]#
THERM
A6 A25 GND M24 AD23
19 H_A20M# A20M# THERMDC H_THERMDC 6 8 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 8
A5 R408 56 N25 AE24
19 H_FERR# FERR# +VCCP_AGTL+ 8 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 8
19 H_IGNNE# C4 IGNNE# THERMTRIP# C7 H_THRMTRIP# 6 8 H_DINV#1 M26 DINV[1]# DINV[3]# AC20 H_DINV#3 8
D5 T408 GTLREF0 AD26 R26 H_COMP0 R410 27.4 1%
19 H_STPCLK# STPCLK# GTLREF COMP[0] GND
C6 MISC U26 H_COMP1 R411 54.9 1%
HCLK
19 H_INTR LINT0 COMP[1]
B4 A22 1KOhm U1 H_COMP2 R412 27.4 1%
19 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 7 COMP[2]
A3 A21 R416 2 1 C26 V1 H_COMP3 R413 54.9 1%
19 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 7 TEST1 COMP[3]
@
AA1 T410 R414 51 D25 E5
RSVD[1] TEST2 DPRSTP# H_DPRSTP# 19,50
AA4 RSVD[2] RSVD[12] T22 DPSLP# B5 H_DPSLP# 19
AB2 A2 GND D24
RSVD[3] RSVD[A2] DPWR# H_DPWR# 8
AA3 RSVD[4] 7 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 19
B M4 D2 7 CPU_BSEL1 B23 D7 H_CPUSLP# 8,19 B
RESERVED
RSVD[5] RSVD[13] BSEL[1] SLP#
N5 RSVD[6] RSVD[14] F6 7 CPU_BSEL2 C21 BSEL[2] PSI# AE6 POWER PM_PSI# 50
T2 RSVD[7] RSVD[15] D3
V3 RSVD[8] RSVD[16] C1 SOCKET479P
B2 RSVD[9] RSVD[17] AF1 BCLK FSB BSEL2BSEL1BSEL0
C3 RSVD[10] RSVD[18] D22
RSVD[19] C23 133 533 L L H
B25 RSVD[11] RSVD[20] C24
166 667 L H H
SOCKET479P
A A
Title : YONAH CPU (1)
ASUSTeK COMPUTER INC Engineer:
Size Project Name Rev
Custom F9J 2.0
Date: Thursday, November 23, 2006 Sheet 4 of 63
5 4 3 2 1
5 4 3 2 1
U401D
+VCORE A4 P6
VSS[1] VSS[82]
A8 VSS[2] VSS[83] P21
A11 VSS[3] VSS[84] P24
A14 VSS[4] VSS[85] R2
D C502 C503 C504 C505 C506 C507 C508 C509 C510 C511 A16 R5 D
VSS[5] VSS[86]
A19 VSS[6] VSS[87] R22
+VCORE +VCORE 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V A23 R25
VSS[7] VSS[88]
U401C CPU +VCORE A26 VSS[8] VSS[89] T1
B6 T4
A7 AB20
Mid-Frequency B8
VSS[9] VSS[90]
T23
VCC[1] VCC[68] +VCORE VSS[10] VSS[91]
A9 VCC[2] VCC[69] AB7 Capacitors GND B11 VSS[11] VSS[92] T26
A10 VCC[3] VCC[70] AC7 B13 VSS[12] VSS[93] U3
A12 VCC[4] VCC[71] AC9 B16 VSS[13] VSS[94] U6
A13 VCC[5] VCC[72] AC12 Intel:22UF*32 B19 VSS[14] VSS[95] U21
A15 AC13 C512 C513 C514 C515 C516 C517 C518 C519 C520 C521 B21 U24
A17
VCC[6] VCC[73]
AC15
F9F:10UF*20 B24
VSS[15] VSS[96]
V2
VCC[7] VCC[74] 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V VSS[16] VSS[97]
A18 VCC[8] VCC[75] AC17