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Pulse Testing Of Laser Diodes
By: Paul Meyer
Keithley Instruments, Inc.

Thermal management is critical during the testing of laser diodes at the
semiconductor wafer, bar, and chip-on-carrier (submount) production stages.
This has led to pulse testing of laser diodes to minimize power dissipation. Still,
pulse mode testing requires careful selection and configuration of test equipment
to avoid measurement errors and achieve the most cost-effective results.

L-I-V Testing
Basic Light intensity-Current-Voltage (L-I-V) testing is an I-V test with the addition
of optical power measurements. This test is primarily used to sort laser diodes or
weed out bad devices before they become part of an assembly. The device
under test (DUT) is subjected to a current sweep while the forward voltage drop
is recorded for each step in the sweep. Simultaneously, instrumentation is used
to monitor the optical power output of the laser's front facet and rear facet. The
resulting data is then analyzed to determine laser characteristics, including lasing
threshold current, quantum efficiency, and "kink" detection (localized negative
slope in the first derivative optical power output vs. injection current curve).

L-I-V characteristics are a function of laser temperature, which must be tightly
controlled during the test, just as in normal operation. The principal reasons for
performing low duty cycle pulsed L-I-V testing are thermal management, thermal
response, and transient response. Typically, these issues arise because of the
need to perform DC testing of laser diodes prior to mounting on a thermal
management device, such as a heat sink or TEC (thermoelectric cooler - also
called a Peltier device).

Vertical cavity surface emitting lasers (VCSELs) can be tested at the wafer stage
prior to dicing because they radiate optical power perpendicular to the wafer
plane. Although many VCSELs can be tested in non-pulse mode due to their high
efficiency, higher power devices require pulse testing in the early stages of
production. This avoids high thermal gradients that would induce mechanical
stresses if non-pulse DC testing were performed.

The first opportunity to test an edge emitting laser diode is at the bar stage,
where a linear array of diodes is cut from the wafer to expose the sides where
light exits. After the wafer has been cut into bars, the edges of the bar are
polished to form a suitable optical interface. The individual diodes on the bar then
undergo L-I-V testing before further processing. The data from these tests are
used to correlate optical performance characteristics, electrical characteristics,
and semiconductor process information.

After a laser diode has passed the bar stage tests, it is diced into chips, which
are mounted on sub-carriers. These are small metallic or ceramic mounts
designed to ease handling of tiny laser chips during final assembly of the laser
diode modules (LDMs) in which they are used. Chip-on-carrier or chip-on-
submount testing is performed to ensure that performance characteristics have
not changed during the dicing and mounting steps.

Thermal Effects
When a laser diode is properly mounted on a TEC and operated in an LDM, its
temperature is maintained within