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Tonga & Tyler (T2)
01
VER : 1A
A A




AC/BATT
PG 31 DC/DC Thermal
CONNECTOR CPU VR RESET CKT CLOCKS
+3V_SRC
RUN POWER /FAN CTRL
SW Dothan +5VSUS

PG 35 PG 32 PG 30 PG 15 PG 27
PG 36 (478 Micro-FCPGA)
PG 2,3
BATT CHARGER PG 31


4X133MHZ


LVDS Panel Connector
PG 16
B 333 MHZ DDR Alviso B
On Board DDR
PG 9,11 CRT Control
1257 PCBGA
VGA PG 16
333 MHZ DDR
PG 4,5,6,7,8
DDR-SODIMM
PG 10,11
DMI interface
USB2.0 (P0-P2) 3 port USB conn
PG 26

33MHz PCI
ODD HDD
ATA 66/100 ATA 66/100
(Slave) (Master)
PG 24 PG 24 ICH6-M CARDBUS PCMCIA MINI-PCI
609 BGA PCI1510GVF Conn.
PG 17 PG 18 PG 19
PG 12,13,14 USB2.0 (P3)
C C

AC97
LPC

LAN Interface RJ45 & Magnetic
AUDIO MDC 82562ET
PG 22 PG 23
PG 20,21 PG 19



Audio Tip/Ring
Jacks Connector
PG 19,20 PG 23 SIO(Macallan III)
256 Pins LBGA
PG 25,26
D D




om
QUANTA




l.c
PS/2 X-Bus




ai
COMPUTER




tm
ho
Title
Keyboard Touchpad Flash Schematic Block Diagram




f@
PG 27 PG 22 PG 26




in
Size Document Number Rev




xa
VM7 1A




he
D ate: Tuesday, August 17, 2004 Sheet 1 of 40
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1 2 3 4 5 6 7 8




4 HA#[3..31]
HA#[3..31]
HA#3 P4
U4A

A3# D0# A19 H D#0
HD#[0. .63]
HD#[0..63] 4
+VCCP 02
HA#4 U4 A25 H D#1 -THERMTRIP 1 2
HA#5
HA#6
V3
A4#
A5#
Dothan D1#
D2# A22 H D#2
H D#3 R60
R3 A6# D3# B21
HA#7 V2 A24 H D#4 56_0402
HA#8 A7# D4# H D#5 IERR#
HA#9
W1
T4
A8# 1 OF 3 D5#
B26
A21 H D#6
1 2
A HA#10 A9# D6# H D#7 R71 A
W2 B20
HA#11 A10# D7# H D#8 56_0402
Y4 C20
HA#12 A11# D8# H D#9 CPUPW RGD
Y1 B24 1 2
HA#13 A12# D9# HD#10 +3VRUN +3VALW
U1 D24
HA#14 A13# D10# HD#11 R52
AA3 E24
HA#15 A14# D11# HD#12 200_0402
Y3 C26
HA#16 A15# D12# HD#13
AA2 B23
A16# D13#




2




2
HA#17 AF4 E23 HD#14
HA#18 A17# D14# HD#15 R56 R 72
AC4 C25
HA#19 A18# D15# HD#16 1.5K_NC 330_NC
AC7 H23
HA#20 A19# D16# HD#17 +VCCP
AC3 G25
HA#21 A20# D17# HD#18
AD3 L23




1




1
HA#22 A21# D18# HD#19
AE4 M26 PROCHOT# 26
A22# D19#




1
HA#23 AD2 H24 HD#20
A23# D20#




3
HA#24 AB4 F25 HD#21 R59
HA#25 A24# REQUEST DATA D21# HD#22 56_0402
AC6 G24 2
HA#26 A25# PHASE PHASE D22# HD#23
AD5 J23
A26# D23#




3
HA#27 AE2 SIGNALS SIGNALS M23 HD#24 Q9




2




1
HA#28 A27# D24# HD#25 CPU_PROCHOT# Q10 RHU002N06_NC
AD6 J25 2 1 2
HA#29 A28# D25# HD#26 3904_NC
AF3 L26
HA#30 A29# D26# HD#27 R58
AE1 N24




1
HA#31 A30# D27# HD#28 330_NC
AF1 M25
A31# D28# HD#29
H26
D29# HD#30
N25
D30# HD#31
K25
D31# HD#32
4 HADSTB0# U3 Y26
ADSTB0# D32# HD#33
4 HADSTB1# AE5 AA24
ADSTB1# D33#
D34#
T25 HD#34 ITP disable guidelines
U23 HD#35
D35# HD#36 Signal Resistor Value Connect To Resistor Placement
4 HREQ#0 R2 V23
REQ0# D36# HD#37
4 HREQ#1 P3 R24
REQ1# D37# HD#38 TDI 150 ohm +/- 5% VCCP Within 2.0" of the CPU
4 HREQ#2 T2 R26
B REQ2# D38# HD#39 B
4 HREQ#3 P1 R23
REQ3# D39# HD#40 TMS 39 ohm +/- 5% VCCP Within 2.0" of the CPU
4 HREQ#4 T1 AA23
REQ4# D40# HD#41
U26
D41# HD#42 TRST# 680 ohm +/- 5% GND Within 2.0" of the CPU
V24
E RROR D42# HD#43
4 ADS# N2 U25
ADS# SIGNALS D43# HD#44 TCK 27 ohm +/- 5% GND Within 2.0" of the CPU
V26
D44# HD#45
Y23
D45# HD#46 TDO Open VCCP Within 2.0" of the CPU
AA26
IERR# D46# HD#47
A4 Y25
IERR# D47# HD#48 Note: Populate R178, R176, C339 when ITP connector is populated.
AB25
D48# HD#49
4 HBREQ0# N4 AC23
BREQ0# ARBITRATION D49# HD#50
4 BPRI# J3 AB24
BPRI# PHASE D50# HD#51
4 BNR# L1 AC20
BNR# SIGNALS D51# HD#52 +VCCP +VCCP
4 HLOCK# J2 AC22
LOCK# D52# HD#53
AC25
D53# HD#54
4 HIT# K3 AD23
HIT# SNOOP PHASE D54# HD#55
4 HITM# K4 AE22
HITM# D55#




1




1




1




1
L4 SIGNALS AF23 HD#56
4 DEFER# DEFER# D56#
AD24 HD#57
D57# HD#58 R68 R66 R67 R65
C8 AF20
BPM0# RESPONSE D58# HD#59 54.9/F_0402 54.9/F_0402 39.2/F_0402 150_0402
B8 AE21
BPM1# PHASE D59# HD#60
A9 AD21




2




2




2




2
BPM2# SIGNALS D60# HD#61
C9 AF25
BPM3# D61# HD#62 TDI
4 HT RDY# M3 AF22
TRDY# D62# HD#63 TMS
4 RS#0 H1 AF26
RS0# D63#
4 RS#1 K1
RS1# TDO
4 RS#2 L2 RS2#
A20M# C2 C23
12 A20M# A20M# DSTBN0# HDSTBN0# 4
F ERR# D3 PC C22
12 F ERR# FERR# DSTBP0# HDSTBP0# 4
IGNNE# A3 COMPATIBILITY K24
12 IGNNE# IGNNE# DSTBN1# HDSTBN1# 4
CPUPW RGD E4 SIGNALS L24 CPURST#
C 12 CPUPW RGD PWRGOOD DSTBP1# HDSTBP1# 4 C
SMI# B4 W25
12 SMI# SMI# DSTBN2# HDSTBN2# 4
DSTBP2# W24 HDSTBP2# 4
2 1 TCK A13 AE24
TCK DSTBN3# HDSTBN3# 4
R 63 27.4/F_0402 TDO A12 DIAGNOSTIC AE25
TDO DSTBP3# HDSTBP3# 4
TDI C12 & TEST
TMS TDI SIGNALS
C11
TRST# TMS +3VSUS
2 1 B13 TRST# DINV0# D25 HDBI0# 4
R64 680_0402 T9 PAD A16 J26
ITP_CLK0 DINV1# HDBI1# 4
T6 PAD A15 ITP_CLK1 DINV2# T24 HDBI2# 4
B10 AD20 HDBI3# 4
PREQ# DINV3#




1
A10
D BR# PRDY# R 69
30 D BR# A7 DBR# DBSY# M2 DBSY# 4
H2 D RDY# 4 150_0402
DRDY#
12 INTR D1 LINT0
D4 EXECUTION
12 NMI




2
STPCLK# LINT1 CONTROL
12 STPCLK# C6 B14 HCLK_CPU# 15
CPUSLP# STPCLK# SIGNALS BCLK1 D BR#
4,12 CPUSLP# A6 SLP# BCLK0 B15 HCLK_CPU 15
DPSLP# B7
G1: NC for Dothan and 12 DPSLP# DPSLP#
12 DPRSTP# G1 DPRSTP#
DPRSTP# for Yonah
THERMDA B18 B5 CPUI NIT#
27 THERMDA THERMDA INIT# CPUINIT# 12
THERMDC A18
27 THERMDC THERMDC
B11 CPURST#
RESET# CPURST# 4
-THERMTRIP C17
27 -THERMTRIP THERMTRIP# THERMAL DIODE C19
DPWR# DPW R# 4
CPU_PROCHOT# B17
PROCHOT#

Dothan Processor



D D




QUANTA
Title
COMPUTER
Dothan Processor (Host BUS)

Size Document Number Rev
VM7 1A

D ate: Tuesday, August 17, 2004 Sheet 2 of 40
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8




COMP0
+VCCP



COMP0 P25
U4B

COMP0 VSS00 A2
+VCCP
U 4C
03



2
COMP1 R37 COMP1 P26 A5 W23
COMP2 1K/F_0402 COMP2 COMP1 VSS01 VSS120
AB2 COMP2 VSS02 A8 D10 VCCP0 VSS121 W26
COMP3 COMP3 AB1 A11 D12 Y2
COMP3 VSS03 VCCP1 VSS122
2



A14 D14 Y5
Dothan VSS04 VCCP2 VSS123
2




2




2
R 40 R39 R213 R214 A17 D16 Y21




1
27.4/F_0402 54.9/F_0402 27.4/F_0402 54.9/F_0402 GTLREF0 AD26 VSS05 VCCP3 VSS124
A20 E11 Y24
A GTLREF0
2 OF 3
VSS06
VSS07
A23 E13
VCCP4
VCCP5
Dothan VSS125
VSS126
AA1 A




2
R36 Place voltage A26 E15 AA4
1




2K/F_0402 divider within TEST1 C5 VSS08 VCCP6 VSS127
B3 F10 3 OF 3 AA6
1




1




1
0.5" of GTLREF TEST2 F23 TEST1 VSS09 VCCP7 VSS128
B6 F12 AA8
pin TEST2 VSS10 VCCP8 VSS129