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1 1




Compal Confidential
2


NTV00 2




LA-5662 Rev 0.2 Schematics


3 Intel PineView Processor/ Tiger point 3




2010-05-10 REV : 1.0



4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/02/02 Deciphered Date 2011/02/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A5662
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401898
Date: Friday, June 04, 2010 Sheet 1 of 36
A B C D E
A B C D E




Compal Confidential
Model Name : NTV00
File Name : LA-5661P
1

Fan Control Thermal Sensor Clock Generator 1



page 23
EMC1402 SLG8SP556VTR
Intel Pineview-M page 5 page 8



CRT Conn.
page 10
(22x22mm) Memory BUS(DDRIII) 204pin DDRIII-SO-DIMM
page 7

LCD Conn. LVDS
page 9 ONE CHANNEL 1.5V DDRIII 667
page 4,5,6




2
DMI x 2 USB Conn X3 2

PCIeMini Card USB port 0,1,4
WiMax page 16
USB port 6 PCIeMini Card USB USB
page 15
3G 5V 480MHz 5V 480MHz BT conn
PCIeMini Card USB port 5
USB port 2
PCIe 1x [2,4]
WLAN
PCIe port 2
page 15
1.5V 2.5GHz(250MB/s)
Tiger Pointer page 17

page 15


PCIe 1x
(17x17mm)
RJ45 RTL8103EL 10/100M 1.5V 2.5GHz(250MB/s)
page 20
SATA port 0 SATA HDD
PCIe port 3 page 20 5V 1.5GHz(150MB/s)
page 17

USB page 11,12,13,14
3
Card Reader 3
RTS5159 2IN1 5V 480MHz
RTC CKT.
page 13
USB port 3 page 21 3.3V 24.576MHz/48Mhz
HD Audio




3.3V 33 MHz
LPC BUS
DC/DC Interface CKT. HDA Codec
page 25 ALC272-GR
page 18

Debug Port ENE KB926 D3
Power Circuit DC/DC page 23 page 22

AMP.
page 27~35 TPA6017
MIC CONN HP CONN
page 18 page 18 page 19
Touch Pad Int.KBD SPI ROM
page 24 page 23 page 23
4 SPK CONN 4
page 19



Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/02/02 Deciphered Date 2011/02/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A5662
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401898
Date: Friday, June 04, 2010 Sheet 2 of 36
A B C D E
A B C D E




Voltage Rails
1 SIGNAL 1
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Power Plane Description S1 S3 S5 G3
Full ON HIGH HIGH HIGH ON ON ON ON
VIN Adapter power supply (19V) ON ON ON OFF
B+ AC or battery power rail for power circuit. ON ON ON ON S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
+CPU_CORE Core voltage for CPU ON OFF OFF OFF
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
+0.89VS 0.89VS GFX support voltage ON OFF OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF OFF S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
+1.05VS VCCP switched power rail ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF OFF
+1.5V 1.5V power rail for DDR ON ON OFF OFF
+1.8VS 1.8VS switched power rail ON OFF OFF OFF
+3VALW 3.3V always on power rail ON ON ON OFF
+3V_SB 3.3V power rail for LAN ON ON OFF OFF
BTO Option Table
+3V_LAN 3.3V power rail for LAN ON ON OFF OFF
2 +RTCVCC RTC power ON ON ON ON 2


+3VS 3.3V switched power rail ON OFF OFF OFF Function Mini PCI-E SLOT STAR
+5VALW 5V always on power rail ON ON ON OFF
+5V_SB 5V power rail for SB ON ON OFF OFF
description
+5VS 5V switched power rail ON OFF OFF OFF explain Wi-Fi WiMax 3G POWER SAVING
+VSB VSB always on power rail ON ON ON OFF
BTO WLAN@ WIMAX@ 3G@ STAR@



Function
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
description
explain
BTO
3 3

EC SM Bus1 address EC SM Bus2 address
Device Address Device Address
Smart Battery 0001 011X b EMC1402 1001 010X b




Tiger point SM Bus address
Device Address

Clock Generator 1101 001Xb
(SLG8SP556VTR)
DDR DIMMA 1010 000Xb




4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/02/02 Deciphered Date 2011/02/02 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A5662
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401898
Date: Friday, June 04, 2010 Sheet 3 of 36
A B C D E
5 4 3 2 1


7 DDR_A_DQS#[0..7]
PINEVIEW_M
7 DDR_A_D[0..63]
PINEVIEW_M
U71A N455R1@ U71B N455R1@ REV = 1.1
7 DDR_A_DM[0..7]
REV = 1.1 DDR_A_MA0 AH19 AD3 DDR_A_DQS0
DMI_RXP0_C 7 DDR_A_DQS[0..7] DDR_A_MA1 DDR_A_MA_0 DDR_A_DQS_0 DDR_A_DQS#0
F3 DMI_RXP_0 DMI_TXP_0 G2 DMI_TXP0 12 AJ18 DDR_A_MA_1 DDR_A_DQS#_0 AD2
DMI_RXN0_C F2 G1 DMI_TXN0 12 DDR_A_MA2 AK18 AD4 DDR_A_DM0
DMI_RXP1_C DMI_RXN_0 DMI_TXN_0 7 DDR_A_MA[0..14] DDR_A_MA3 DDR_A_MA_2 DDR_A_DM_0
H4 DMI_RXP_1 DMI_TXP_1 H3 DMI_TXP1 12 AK16 DDR_A_MA_3
DMI_RXN1_C G3 J2 DMI_TXN1 12 DDR_A_MA4 AJ14 AC4 DDR_A_D0
DMI_RXN_1 DMI_TXN_1 DDR_A_MA5 DDR_A_MA_4 DDR_A_DQ_0 DDR_A_D1
AH14 DDR_A_MA_5 DDR_A_DQ_1 AC1
DMI DDR_A_MA6 AK14 AF4 DDR_A_D2
DDR_A_MA7 DDR_A_MA_6 DDR_A_DQ_2 DDR_A_D3
AJ12 DDR_A_MA_7 DDR_A_DQ_3 AG2
DDR_A_MA8 AH13 AB2 DDR_A_D4
D DDR_A_MA9 DDR_A_MA_8 DDR_A_DQ_4 DDR_A_D5 D
AK12 DDR_A_MA_9 DDR_A_DQ_5 AB3
8 CLK_CPU_EXP# N7 L10 DDR_A_MA10 AK20 AE2 DDR_A_D6
EXP_CLKINN EXP_RCOMPO DMI_IRCOMP R162 DDR_A_MA11 DDR_A_MA_10 DDR_A_DQ_6 DDR_A_D7
8 CLK_CPU_EXP N6 EXP_CLKINP EXP_ICOMPI L9 AH12 DDR_A_MA_11 DDR_A_DQ_7 AE3
L8 R378 49.9_0402_1% DDR_A_MA12 AJ11
EXP_RBIAS 750_0402_1% DDR_A_MA13 DDR_A_MA_12 DDR_A_DQS1
R10 EXP_TCLKINN AJ24 DDR_A_MA_13 DDR_A_DQS_1 AB8
R9 N11 DDR_A_MA14 AJ10 AD7 DDR_A_DQS#1
EXP_TCLKINP RSVD_TP T38 DDR_A_MA_14 DDR_A_DQS#_1
N10 P11 Pull-down must be placed AA9 DDR_A_DM1
RSVD RSVD_TP T39 DDR_A_DM_1
N9 RSVD within 500 mils from Pineview-M DDR_A_WE# AK22 AB6 DDR_A_D8
7 DDR_A_WE# DDR_A_WE# DDR_A_DQ_8
DDR_A_CAS# AJ22 AB7 DDR_A_D9
7 DDR_A_CAS# DDR_A_CAS# DDR_A_DQ_9
DDR_A_RAS# AK21 AE5 DDR_A_D10
7 DDR_A_RAS# DDR_A_RAS# DDR_A_DQ_10
K2 K3 AG5 DDR_A_D11
RSVD RSVD DDR_A_BS0 DDR_A_DQ_11 DDR_A_D12
J1 RSVD RSVD L2 7 DDR_A_BS0 AJ20 DDR_A_BS_0 DDR_A_DQ_12 AA5
M4 M2 DDR_A_BS1 AH20 AB5 DDR_A_D13
RSVD RSVD 7 DDR_A_BS1 DDR_A_BS_1 DDR_A_DQ_13
L3 N2 DDR_A_BS2 AK11 AB9 DDR_A_D14
RSVD RSVD 7 DDR_A_BS2 DDR_A_BS_2 DDR_A_DQ_14
AD6 DDR_A_D15
DDR_A_DQ_15
1 OF 6 DDR_A_DQS2
AD8
PINEVIEW-M_FCBGA8559 DDR_CS0# AH22
DDR_A_DQS_2
AD10 DDR_A_DQS#2
7 DDR_CS0# DDR_A_CS#_0 DDR_A_DQS#_2
DDR_CS1# AK25 AE8 DDR_A_DM2
7 DDR_CS1# DDR_A_CS#_1 DDR_A_DM_2
AJ21 DDR_A_CS#_2
AJ25 AG8 DDR_A_D16
DDR_A_CS#_3 DDR_A_DQ_16 DDR_A_D17
C253 DDR_A_DQ_17 AG7
12 DMI_RXP0 1 2 DMI_RXP0_C DDR_CKE0 AH10 AF10 DDR_A_D18
7 DDR_CKE0 DDR_A_CKE_0 DDR_A_DQ_18
0.1U_0402_10V7K DDR_CKE1 AH9 AG11 DDR_A_D19
7 DDR_CKE1 DDR_A_CKE_1 DDR_A_DQ_19
AK10 AF7 DDR_A_D20
C254 DMI_RXN0_C DDR_A_CKE_2 DDR_A_DQ_20 DDR_A_D21
12 DMI_RXN0 1 2 AJ8 DDR_A_CKE_3 DDR_A_DQ_21 AF8
0.1U_0402_10V7K AD11 DDR_A_D22
M_ODT0 DDR_A_DQ_22 DDR_A_D23
C255 7 M_ODT0 AK24 DDR_A_ODT_0 DDR_A_DQ_23 AE10
12 DMI_RXP1 1 2 DMI_RXP1_C M_ODT1 AH26
7 M_ODT1 DDR_A_ODT_1
0.1U_0402_10V7K AH24 AK5 DDR_A_DQS3
DDR_A_ODT_2 DDR_A_DQS_3 DDR_A_DQS#3
C256 AK27 DDR_A_ODT_3 DDR_A_DQS#_3 AK3
C
12 DMI_RXN1 1 2 DMI_RXN1_C AJ3 DDR_A_DM3 C
DDR_A_DM_3
0.1U_0402_10V7K
AH1 DDR_A_D24
M_CLK_DDR0 DDR_A_DQ_24 DDR_A_D25
Middle at CPU and SB 7 M_CLK_DDR0 AG15 DDR_A_CK_0 DDR_A_DQ_25 AJ2
M_CLK_DDR#0 AF15 AK6 DDR_A_D26
+1.5V 7 M_CLK_DDR#0 DDR_A_CK_0# DDR_A_DQ_26
M_CLK_DDR1 AD13 AJ7 DDR_A_D27
7 M_CLK_DDR1 DDR_A_CK_1 DDR_A_DQ_27
M_CLK_DDR#1 AC13 AF3 DDR_A_D28
+1.5V 7 M_CLK_DDR#1 DDR_A_CK_1# DDR_A_DQ_28
AH2 DDR_A_D29
DDR_A_DQ_29
1




AL5 DDR_A_D30
R50 DDR_A_DQ_30 DDR_A_D31
31 1P5_POK AC15 DDR_A_CK_3 DDR_A_DQ_31 AJ6
AD15 DDR_A_CK_3#




1
1K_0402_1% AF13 AG22 DDR_A_DQS4
DDR_A_CK_4 DDR_A_DQS_4




2
AG13 AG21 DDR_A_DQS#4
2




DDR_REF R904 10K_0402_5% R903 DDR_A_CK_4# DDR_A_DQS#_4 DDR_A_DM4
DDR_A_DM_4 AD19
0_0402_5%
1




1 AE19 DDR_A_D32
2
R142 C50 DRAM_PWROK DDR_A_DQ_32 DDR_A_D33
AD17 AG19




1
RSVD DDR_A_DQ_33 DDR_A_D34
AC17 RSVD DDR_A_DQ_34 AF22
2



1




2
1K_0402_1% 0.1U_0402_16V4Z C914 +1.5V AB15 AD22 DDR_A_D35
2 +5VALW R917 RSVD DDR_A_DQ_35 DDR_A_D36