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UPI41ATM
USER'S MANUAL
APRIL 1980
Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which
may appear in this document nor does it make a commitment to update the information contained herein.
Intel software products are copyrighted by and shall remain the property of Intel Corporation. Use, duplication or
disclosure is subject to restrictions stated in Intel's software license, or as defined in ASPR 7-104.9 (a) (9).
No part of this document may be copied or reproduced in any form or by any means without the prior written consent
of the Intel Corporation.
The following are trademarks of Intel Corporation and may only be used to describe Intel products:
i Intellec Multimodule
ICE iSBC PROMPT
ICS Library Manager Promware
im MCS RMX
Insite Megachassis UPI
Intel Micromap ~Scope
Intelevision
and the combinations of ICE, iCS, MCS or RMX and a numerical suffix.
Additional copies of this manual or other Intel literature may be obtained from:
Literature Department
Intel Corporation
3065 Bowers Avenue
Santa Clara, CA 95051
Table of Contents
CHAPTER 1
Introduction ............................................................................... 1-1
CHAPTER 2
Functional Description .......................................... '........................... 2-1
Basic Features ............................................................................. 2-1
Pin Description ............................................................................. 2-1
CPU Section ............................................................................... 2-4
Program Memory ........................................................................... 2-4
Data Memory .............................................................................. 2-5
Program Counter ............................................................................ 2-6
Program Status Word ........................................................................ 2-6
Conditional Branch Logic ..................................................................... 2-7
Oscillator and Timing Circuits .................................................................. 2-7
Internal Timer / Event Counter .................................................................. 2-9
Test Inputs ................................................................................ 2-11
Interrupts and DMA ........................................................................ 2-11
Reset .................................................................................... 2-12
Data Bus Buffer ........................................................................... 2-13
System Interface ........................................................................... 2-14
Input/Output Interface ...................................................................... 2-15
110 Ports ............................................................................ 2-15
110 Port Expansion .................................................................... 2-16
CHAPTER 3
Instruction Set ............................................................................ 3-1
Introduction ................................................................................. 3-1
Instruction Set Description .................................................................... 3-3
Instruction Set Summary ................................................................. 3-3
Alphabetic Listing ...................................................................... 3-5
CHAPTER 4
Single-step, Programming and Power-down Modes ............................................ 4-1
8741 A Single-Step ........................................................................... 4-1
Programming and Verification .................................................................. 4-3
External Access ............................................................................. 4-4
8041A Power Down Mode .................................................................... 4-4
CHAPTER 5
System Operation ......................................................................... 5-1
Bus Interface ............................................................................... 5-1
Design Examples ........................................................................... 5-2
General Handshaking Protocol ................................................................. 5-4
CHAPTER 6
Application Notes .......................................................................... 6-1
Abstracts ................................................................................. 6-1
Application Notes ...........................................................................6-5
Introduction to the UPI41ATM ............................................................. 6-5
Keyboard Scanning Application .......................................................... 6-47
iii
CHAPTER 7
Data Sheets ........................................ . . .................... ~1
8041 A 18641 A 18741 A, Universal Peripheral Interface 8-bit Microcomputer .. . .................... ~1
8243 MCS-48TM Input/Output Expander .7-11
8292 GPIB Controller .................... . . .7-17
8294 Data Encryption Unit ........ . .7-31
8295 Dot Matrix Printer Controller ..... 7-43
CHAPTER 8
System Support. . . . . . . . . . . . . . . .. . ............ . . .8-1
ICE 41 A TM UPI 41 ATM In-Circuit Emulator .............. . .8-1
Multi ICE Software, Multiple-In-Circuit-Emulator ......... . . ... 8-5
MCS-48TM Diskette-Based Software Support Package .. 8-9
Model 230 Intellec@ Series II Microcomputer Development System .... 8-11
UPP-103 Universal PROM Programmer ......... . . ... 8-15
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CHAPTER 1
INTRODUCTION
Accompanying the introduction of microprocessors designed for communication disciplines, parallel
such as the 8080, 8085, and 8086 there has been a I/O, keyboard encoding, interval timing, CRT con-
rapid proliferation of intelligent peripheral devices. trol, etc. Yet, in spite of the large number of devices
These special purpose peripherals extend CPU per- available and the increased flexibility built into
formance and flexibility in a number of important these chips, there is still a large number of micro-
ways. computer peripheral control tasks which are not
satisfied.
Table 1-1. Intelligent Peripheral Devices
With the introduction of the Universal Peripheral
8255 (GPIO) Programmable Peripheral Interface (UP!) microcomputer, Intel has taken the
Interface intelligent peripheral concept a step further by
8251 (USART) Programmable providing an intelligent controller that is fully user
Communication Interface programmable. It is a complete single-chip micro-
8253 (TIMER) Programmable Interval Timer computer which can connect directly to a master
8257 (DMA) Programmable DMA Controller
processor data bus. It has the same advantages of in-
telligence and flexibility which previous peripheral
8259 Programmable Interrupt chips offered. In addition, the UPI is user-program-
Controller mable: it has 1K bytes of ROM or EPROM memory
8272 (DDFDC) Programmable Floppy Disk for program storage plus 64 bytes of RAM memory
Controller for data storage or initialization from the master
8273 (SDLC) Programmable Synchronous processor. The UPI device allows a designer to fully
Data Link Controller specify his control algorithm in the peripheral chip
8275 (CRT) Programmable CRT without relying on the master processor. Devices like
Controller printer controllers and keyboard scanners can be
8279 (PKD) Programmable completely self-contained, relying on the master
Keyboard/Display Controller processor only for data transfer.
8291,8292,8293 Programmable GPIB System
Talker, Listener, Controller The UPI family consists of three components:
Intelligent devices like the 8272 floppy disk control-