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1 1




2
Blue Moutain KIWB1/B2 2




Schematics Document
Mobile Penryn uFCPGA with Intel
3

Cantiga_GM/PM+ICH9-M core logic 3




REV:0.1



4 4




Security Classification Compal Secret Data Compal Electronics,Ltd.
Issued Date 2008/03/25 Deciphered Date 2008/04/ Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KIWB1/B2_LA4601P
Date: Thursday, June 26, 2008 Sheet 1 of 52
A B C D E
A B C D E

ZZZ1
Compal confidential POWER BD Slide Bar LED X 10 (B) RIGHT BD
File Name : Power on X1 USER-DEFINED (W) VOLUME UP X1
LED X1 (G) DOLBY (W) VOLUME DOWN X1
15.6W_PCB_LA4601P
:POWER LED X 3 MUTE X1
NOVO X1 WIRELESS LED (G) MUTE LED X1(G)
VRAM 32*32
GDDR3*4 Mobile Penryn BLUETOOTH LED (G)
3G LED (G)
Clock Gen.
1 1
page20
uFCPGA-478 CPU HDD LED (G) USB_Board
PCI-E X16
NVidia NB9M SLG8SP556VTR
ICS9LPRS387AKLFT POWER ON (G)
USB CONN X 2
TV CONN X1
NVidia NB9P page5,6,7 page25
BATTERY CHARG(G/A)
page16~24 WIRELESS SWITCH (G)
H_A#(3..35) FSB ON/OFF
H_D#(0..63) 667/800/1066MHz
Double check ME
HDMI PS8101T PCI-E DDR3-800(1.5V)
CONN
DDR3-SO-DIMM X2
Intel Cantiga GMCH DDR3-1067(1.5V)
page26
page26
BANK 0, 1, 2, 3 page 14,15

CRT cable PCBGA 1329 Dual Channel UP TO 8G
LVDS I/F
page28
page 8,9,10,11,12,13
SPK amplifier 2Channel Speaker
2
page36 page37 2
LVDS
Connector page27 DMI C-Line WOOFER amplifier 1Channel Speaker
page37
page37

PCI Express AZALIA Audio Codec
HP X 1+
Mini card Slot 1
page31
6*PCI-E BUS
Intel ICH9-M 12*USB2.0
Realtek ALC272
page36
MIC_Ext X1 page37
None mBGA-676
PCI Express PCI BUS 2Channel MIC_Int
CMOS Camera
4*SATA serial page36
New Card
Mini card Slot 2 page31 3.3V / 33 MHz page27,28,29,30
page41
page31


PCI Express BlueTooth CONN
LPC BUS page41
Mini card Slot 3
3
page31 USB CONN X1 3

page41

BCM5906/BCM5784M
EC
ENE KB926D New Card X1
SIM Card 10/100/1G LAN page38 page31
page32
page31 Realtek 5158E
M-PCIE CONN X 3 MS/MS
page31
pro/SD/SD
RJ45 CONN Int.KBD pro/mmc/XD page36
page33 page39

Touch Pad BIOS
page39
page40 REPEATER ESATA HDD AND USB CONN
page35 page35


HDD/ODD,SCL & T/L LED on MB SATA HDD CONN
4 CAPS and NUM on KBD page35 4




SATA ODD CONN
page35
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/03/24 Deciphered Date 2008/04/ Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MB Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KIWB1/B2_LA4601P
Date: Thursday, June 26, 2008 Sheet 2 of 52
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DDR3 Voltage Rails

+5VS
+3VS
+1.5VS
power
plane +1.1VS SMBUS, SPI and I2C Control Table
+VCCP
1 1
+5VALW +1.5V +CPU_CORE SERIAL NEW CLK CAP Mini Mini THERMAL THERMAL
SOURCE HDMI LVDS CRT HDCP EEPROM BATT SENSOR SENSOR
+B +1.8V +VGA_CORE CARD GEN sensor CARD1 CARD2 (VGA) (CPU)
+3VALW +0.75V +1.8VS
EC_SMB_CK1
EC_SMB_DA1
KB926 X X X X V X X X X X V V X
State
EC_SMB_CK2
EC_SMB_DA2
KB926 X X X X X X X V X X X V V
ICH_SMBCLK
ICH_SMBDAT ICH9 X X X X X V V X V V X X X
LVDS_SCL
S0
O O O O
LVDS_SDA Cantiga
X V X X X X X X X X X X X
GMCH_CRT_CLK
S1
O O O O GMCH_CRT_DAT Cantiga
X X V X X X X X X X X X X
HDMICLK_NB
S3
O O O X HDMIDAT_NB Cantiga
V X X X X X X X X X X X X
2
S5 S4/AC
O O X X
VGA_DDCCLK
VGA_DDCDATA VGA X X V X X X X X X X X X X 2




S5 S4/ Battery only
O X X X
VGA_LVDS_SCL
VGA_LVDS_DAT VGA X V X X X X X X X X X X X
VGA_HDMI_SCL
S5 S4/AC & Battery
don't exist X X X X VGA_HDMI_DAT VGA
V X X X X X X X X X X X X
HDCP_SMB_CK1
HDCP_SMB_DA1 VGA X X X X V X X X X X X X X
FSEL#SPICS#_SB
FRD#SPI_SO_SB
SPI_CLK_SB
FWR#SPI_SI_SB
ICH9 X X X X V X X X X X X X X
FSEL#SPICS#
FRD#SPI_SO
SPI_CLK
FWR#SPI_SI
KB926 X X X X V X X X X X X X X

3 3




4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/03/24 Deciphered Date 2008/04/ Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MB Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KIWB1/B2_LA4601P
Date: Thursday, June 26, 2008 Sheet 3 of 52
A B C D E
A B C D E




VGA and DDR2 Voltage Rails (NB9M-GS) EDP at Tj = 97C*
Power Supply Rail NB9P-GS NB9P-GE2
VRAM POWER SQUENCE (V) GDDR3 DDR2 GDDR3 DDR2
power +3VS
plane GDDR3 FOR 4 UNIT = 5.4A NVVDD Variable 20.65A 16.96A 18.47A 16.06A
State +1.8V +VGA_CORE
FB_DLLAVDD 1.1 10mA
+1.1VS
FB_PLLAVDD 1.1 10mA
S0
1
O O O O IFPC_IOVDD 1.1 80mA 1
S1
O O O O IFPD_IOVDD 1.1 80mA
S3
O O O X IFPE_IOVDD 1.1 160mA
S5 S4/AC
O O X X IFPF_IOVDD 1.1 160mA
S5 S4/ Battery only
O X X X PEX_IOVDD/Q 1.1 1550mA
S5 S4/AC & Battery
don't exist X X X X PEX_PLLVDD 1.1 90mA
PLLVDD 1.1 45mA
SP_PLLVDD 1.1 45mA
VID_PLLVDD 1.1 45mA
GPIO I/O ACTIVE Function Description
TOTAL 1.1 2.3A
GPIO0 N/A N/A Available
FBVDD/Q 1.8 3.37A 2.02A 3.21A 2.25A
GPIO1 IN - Hot plug detect for IFP link C IFPA_IOVDD 1.8 95mA
IFPB_IOVDD 1.8 95mA
GPIO2 OUT H Panel Back-Light brightness(PWM)
IFPAB_PLLVDD 1.8 70mA
GPIO3 OUT H Panel Power Enable IFPCD_PLLVDD 1.8 25mA
IFPEF_PLLVDD 1.8 85mA
2
GPIO4 OUT H Panel Back-Light On/Off (PWM) 2
TOTAL 1.8 5.76A 3.69A 5.47A 3.96A
GPIO5 OUT - GPU VID0
DACA_VDD 3.3 110mA
GPIO6 OUT - GPU VID1 DACB_VDD 3.3 120mA
DACC_VDD 3.3 110mA
GPIO7 OUT - GPU VID2 or MEM VID
MIOA_VDDQ 3.3 10mA
GPIO8 I/O L Thermal Catastrophic Overtemp MIOB_VDDQ 3.3 10mA
VDD33 3.3 150mA
GPIO9 OUT L FAN control and/or Thermal Alert (PWM)
TOTAL 3.3 0.51A
GPIO10 OUT Memory VREF switch

GPIO11 I/O L SLI raster sync

GPIO12 IN - AC power detect pin POWER SQUENCE
The ramp time for any rail must be more than 40us
GPIO13 OUT - Power supply control

GPIO14 OUT - Power supply control
3 3
GPIO15 IN - Hot plug detect for IFP link E

GPIO16 IN - Dongle DVI Mode control for Primary Displayport (+3VS) VDD33
GPIO17 IN - Dongle HDMI Mode control for Primary Displayport

GPIO18 IN - Dongle DVI Mode control for Secondary Displayport PEX_VDD can ramp up any time

GPIO19 IN - Dongle HDMI Mode control for Secondary Displayport (1.1VS) PEX_VDD
GPIO20 IN - Hot plug detect for IFP link D
tNVVDD>=0
GPIO21 IN - Hot plug detect for IFP link E

GPIO22 IN - SLI swap ready signal (+VGA_CORE) NVVDD
tNV-FB
GPIO23 N/A N/A Available
tFBVDDQ>=0



4
(1.8VS) FBVDDQ 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/03/24 Deciphered Date 2008/04/ Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VGA Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KIWB1/B2_LA4601P
Date: Thursday, June 26, 2008 Sheet 4 of 52
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5 4 3 2 1




USE->56,NOT USE->50 XDP Reserve
+VCCP +3VS

H_IERR# R1 1 2 49.9_0402_1% XDP_DBRESET# R2 1 2 @ 1K_0402_5%

H_PROCHOT# R3 1 2 56_0402_5%
+VCCP


USE->68,NOT USE-->56 XDP_TDI R4 1 2 54.9_0402_1%

D XDP_TMS R5 1 2 54.9_0402_1% D
[email protected]
JCPU1A XDP_TDO R6 1 2 @ 54.9_0402_1%
H_A#3 J4 H1 H_ADS#
<8> H_A#[3..16] A[3]# ADS# H_ADS# <8>




ADDR GROUP_0
H_A#4 L5 E2 H_BNR# XDP_TRST# R7 1 2 54.9_0402_1%
A[4]# BNR# H_BNR# <8>
H_A#5 L4 G5 H_BPRI#
A[5]# BPRI# H_BPRI# <8>
H_A#6 K5 XDP_TCK R8 1 2 54.9_0402_1%
H_A#7 A[6]# H_DEFER#
M3 A[7]# DEFER# H5 H_DEFER# <8>
H_A#8 N2 F21 H_DRD Y#
A[8]# DRDY# H_DRDY# <8>
H_A#9 J1 E1 H_DBSY#
A[9]# DBSY# H_DBSY# <8>
H_A#10 N3
H_A#11 A[10]# H_BR0#
P5 A[11]# BR0# F1 H_BR0# <8>
H_A#12 P2
H_A#13 A[12]# H_IERR#




CONTROL
L2 A[13]# IERR# D20
H_A#14 P4 B3 H_INIT#
A[14]# INIT# H_INIT# <28>
H_A#15 P1
H_A#16 A[15]# H_LOCK#
R1 A[16]# LOCK# H4 H_LOCK# <8>
H_ADSTB#0 M1
<8> H_ADSTB#0 ADSTB[0]#
C1 H_RESET#
RESET# H_RESET# <8>
H_REQ#0 K3 F3 H_RS#0
<8> H_REQ#0 REQ[0]# RS[0]# H_RS#0 <8>
H_REQ#1 H2 F4 H_RS#1
<8> H_REQ#1 REQ[1]# RS[1]# H_RS#1 <8>
H_REQ#2 K2 G3 H_RS#2
<8> H_REQ#2 REQ[2]# RS[2]# H_RS#2 <8>
H_REQ#3 J3 G2 H_TRDY#
<8> H_REQ#3 REQ[3]# TRDY# H_TRDY# <8>
H_REQ#4 L1
<8> H_REQ#4 REQ[4]#
G6 H_HIT#
HIT# H_HIT# <8>
H_A#17 Y2 E4 H_HITM#
<8> H_A#[17..35] A[17]# HITM# H_HITM# <8>
H_A#18 U5
H_A#19 A[18]# XDP_BPM#0
R3 A[19]# BPM[0]# AD4
+3VS +3VS
ADDR GROUP_1



H_A#20 W6 AD3 XDP_BPM#1
C H_A#21 A[20]# BPM[1]# XDP_BPM#2 C
U4 A[21]# BPM[2]# AD1
H_A#22 Y5 AC4 XDP_BPM#3
A[22]# BPM[3]#




1
H_A#23 XDP_BPM#4
XDP/ITP SIGNALS



U1 A[23]# PRDY# AC2 1
H_A#24 R4 AC1 XDP_BPM#5
H_A#25 A[24]# PREQ# XDP_TCK C1 U1 @ R9
T5 A[25]# TCK AC5
H_A#26 T3 AA6 XDP_TDI 0.1U_0402_16V4Z 10K_0402_5%
H_A#27 A[26]# TDI XDP_TDO 2
W2 AB3




2
H_A#28 A[27]# TDO XDP_TMS EC_SMB_CK2
W5 A[28]# TMS AB5 1 VDD SMCLK 8 EC_SMB_CK2 <16,38,42>
H_A#29 Y4 AB6 XDP_TRST#
H_A#30 A[29]# TRST# XDP_DBRESET# H_THERMDA EC_SMB_DA2
U2 A[30]# DBR# C20 XDP_DBRESET# <29> 2 DP SMDATA 7 EC_SMB_DA2 <16,38,42>
H_A#31 V4
H_A#32 A[31]# H_THERMDC
W3 A[32]# 1 2 3 DN ALERT# 6
H_A#33 AA4 THERMAL C2 2200P_0402_50V7K
H_A#34 A[33]# H_PROCHOT# THERM#
AB2 A[34]# 4 THERM# GND 5
H_A#35 AA3 D21
H_ADSTB#1 A[35]# PROCHOT# H_THERMDA
<8> H_ADSTB#1 V1 ADSTB[1]# THERMDA A24
B25 H_THERMDC +3VS 1 2
H_A20M# THERMDC R10 10K_0402_5% EMC1402-1-ACZL-TR_MSOP8
<28> H_A20M# A6 A20M#
ICH




H_FERR# A5 C7 H_THERMTRIP#
<28> H_FERR# FERR# THERMTRIP# H_THERMTRIP# <8,28>