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06J0537 S30H-2433-02

Note Before using this information and the product it supports, be sure to read the general information under Appendix C, "Notices" on page C-1.

Third Edition (July 1997)
The following paragraph does not apply to the United Kingdom or any country where such provisions are inconsistent with local law: INTERNATIONAL BUSINESS MACHINES CORPORATION PROVIDES THIS PUBLICATION "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Some states do not allow disclaimer of express or implied warranties in certain transactions; therefore, this statement may not apply to you. This publication could include technical inaccuracies or typographical errors. Changes are periodically made to the information herein; these changes will be incorporated in new editions of the publication. IBM may make improvements or changes in the products or the programs described in this publication at any time. Requests for technical information about IBM products should be made to your IBM Authorized Dealer or your IBM Marketing Representative. Copyright International Business Machines Corporation 1996, 1997. All rights reserved. Note to U.S. Government Users -- Documentation related to restricted rights -- Use, duplication or disclosure is subject to restrictions set forth in GSA ADP Schedule Contract with IBM Corp.

Contents
Figures Preface
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vii ix

Section 1. System Overview . . . . . . . . . . . . . . . . . Description System Board Devices and Features System Board I/O Address Map . . Specifications . . . . . . . . . . . . . Power Supply . . . . . . . . . . . . . Voltages . . . . . . . . . . . . . . Output Protection . . . . . . . . . Voltage Sequencing . . . . . . . . Power Supply Connector . . . . . Battery Pack . . . . . . . . . . . . .

1-1 1-2 1-3 1-5 1-7 1-10 1-10 1-11 1-11 1-11 1-12 2-1 2-2 2-2 2-3 2-3 3-1 3-2 3-2 3-2 3-3 3-4 3-5 3-5 3-5 3-6 3-7 3-8 3-9 3-10 3-13 3-20 3-21 3-21 3-21

Section 2. Programmable Option Select (POS) Description . . . . . . . . . . . . . . . . . . . . . . . System Board POS I/O Address Map . . . . . . . . System Board and Subsystem Setup . . . . . . . . System Board Enable/Setup Register (Hex 0094) Section 3. System Board . . . . . . . Description . . . . . . . . . . . . . . . . Microprocessor . . . . . . . . . . . . . . Cache Memory Operation . . . . . . Cacheable Address Space . . . . . . Bus Adapter . . . . . . . . . . . . . . . . Keyboard/Mouse Connector . . . . . . . Signals . . . . . . . . . . . . . . . . . Connector . . . . . . . . . . . . . . . Scan Codes . . . . . . . . . . . . . . Keyboard ID . . . . . . . . . . . . . . Displayable Characters and Symbols Hard Disk Drive Connector . . . . . . . External Bus Connector . . . . . . . . . Diskette Drive Connector (UltraBay) . . Diskette Drive and Controller . . . . . . Memory . . . . . . . . . . . . . . . . . . ROM Subsystem . . . . . . . . . . . RAM Subsystem . . . . . . . . . . . .
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Copyright IBM Corp. 1996, 1997

iii

System Memory Map . . . . . . . . . . . . . . . . . . . . . System Board Memory Connector for DIMM Adapter Card RT/CMOS RAM . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous System Functions and Ports . . . . . . . . . Nonmaskable Interrupt (NMI) . . . . . . . . . . . . . . . . System Control Port B (Hex 0061) . . . . . . . . . . . . . System Control Port A (Hex 0092) . . . . . . . . . . . . . Power-On Password . . . . . . . . . . . . . . . . . . . . . Other Passwords . . . . . . . . . . . . . . . . . . . . . . . Selectable Drive-Startup Sequence . . . . . . . . . . . . . Hardware Compatibility . . . . . . . . . . . . . . . . . . . . . Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . Section 4. Subsystems . . . . . . . . . . . . . Video Subsystem . . . . . . . . . . . . . . . . . . Video Modes . . . . . . . . . . . . . . . . . . . DSP Subsystem . . . . . . . . . . . . . . . . . . System Settings . . . . . . . . . . . . . . . . . Audio Subsystem . . . . . . . . . . . . . . . . . . System Settings . . . . . . . . . . . . . . . . . Infrared (IR) Subsystem . . . . . . . . . . . . . . System Settings . . . . . . . . . . . . . . . . . Enhanced Video Subsystem (760XD and 765D) Video Port Specification . . . . . . . . . . . . PCMCIA Subsystem . . . . . . . . . . . . . . . . Pin Assignments . . . . . . . . . . . . . . . . . Programmable Option Select (POS) . . . . . . . DSP Subsystem Setup . . . . . . . . . . . . . IR Subsystem Setup . . . . . . . . . . . . . . IDE Channel on the UltraBay . . . . . . . . . . . MIDI/Joystick Port . . . . . . . . . . . . . . . . . MIDI Interface . . . . . . . . . . . . . . . . . . Joystick Interface . . . . . . . . . . . . . . . . Appendix A. System Resources
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3-22 3-22 3-23 3-34 3-34 3-35 3-36 3-37 3-38 3-38 3-39 3-40 4-1 4-2 4-3 4-5 4-5 4-8 4-8 4-10 4-10 4-11 4-11 4-12 4-14 4-16 4-16 4-17 4-18 4-18 4-18 4-18 A-1

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Appendix B. System Management API (SMAPI) BIOS Overview . . . . . . . . . . . . . . . . . . . . . . . . . . Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . Header Image . . . . . . . . . . . . . . . . . . . . . . . . . Calling Convention . . . . . . . . . . . . . . . . . . . . . . Parameter Structure . . . . . . . . . . . . . . . . . . . Calling Convention Pseudo Code . . . . . . . . . . . . Return Codes . . . . . . . . . . . . . . . . . . . . . . . . . Function Description . . . . . . . . . . . . . . . . . . . . . iv

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B-1 B-3 B-4 B-6 B-6 B-10 B-11 B-12

System Information Service System Configuration Service Power Management Service Event Bit Definition . . . . . Samples . . . . . . . . . . . Function Declaration . . . . Installation Check . . . . . . BIOS Call . . . . . . . . . . . Appendix C. Notices Trademarks . . . . . . Index

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B-12 B-21 B-28 B-33 B-54 B-58 B-59 B-62 C-1 C-2 X-1

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v

vi

Figures
1-1. 1-2. 1-3. 1-4. 1-5. 1-6. 1-7. 1-8. 1-9. 1-10. 1-11. 1-12. 2-1. 2-2. 3-1. 3-2. 3-3. 3-4. 3-5. 3-6. 3-7. 3-8. 3-9. 3-10. 3-11. 3-12. 3-13. 3-14. 3-15. 3-16. 3-17. 3-18. 3-19. 3-20. Model and Submodel Bytes . . . . . . . . . . . . . . . System Board Devices and Features . . . . . . . . . . System Board I/O Address Map . . . . . . . . . . . . . Performance Specifications . . . . . . . . . . . . . . . . Physical Specifications . . . . . . . . . . . . . . . . . . Electrical Specifications . . . . . . . . . . . . . . . . . . Acoustical Readings . . . . . . . . . . . . . . . . . . . . Power Supply Maximum Current . . . . . . . . . . . Voltage Pin Assignments for the 40W AC Adapter and Car Battery Adapter . . . . . . . . . . . . . . . . . . . Voltage Pin Assignments for the 35W or 56W AC Adapter . . . . . . . . . . . . . . . . . . . . . . . . . . Li-ion Battery Pack Specifications . . . . . . . . . . . NiMH Battery Pack Specifications . . . . . . . . . . . System Board POS I/O Address Map . . . . . . . . . . System Board Enable/Setup Register (Hex 0094) . . . Keyboard and Mouse Signals . . . . . . . . . . . . . . Keyboard/Mouse Connector Pin Assignments . . . . . Key Numbers for the 84-Key Keyboard . . . . . . . . . Key Numbers for the 85-Key Keyboard . . . . . . . . . Key Numbers for the External Numeric Keypad . . . . Hard Disk Drive Connector Pin Assignments . . . . . 240-Pin External Bus Connector Pin Assignments . Pin Assignments for Diskette Drive Connector--Type A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignments for Diskette Drive Connector--Type B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignments for Diskette Drive Connector--Type C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diskette Drive Read, Write, and Format Capabilities System Memory Map . . . . . . . . . . . . . . . . . . DIMM Adapter Card Memory Connector Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . RT/CMOS RAM Address Map . . . . . . . . . . . . . RT/CMOS Address and NMI Mask Register (Hex 0070) . . . . . . . . . . . . . . . . . . . . . . . . . . . RT/CMOS Data Register (Hex 0071) . . . . . . . . . Real-Time Clock Bytes (Hex 00000D) . . . . . . . . Status Register A (Hex 00A) . . . . . . . . . . . . . . Status Register B (Hex 00B) . . . . . . . . . . . . . . Status Register C (Hex 00C) . . . . . . . . . . . . . . 1-2 1-3 1-5 1-7 1-8 1-9 1-9 1-10 1-11 1-12 1-12 1-12 2-2 2-3 3-5 3-5 3-6 3-7 3-8 3-9 3-10 3-14 3-16 3-18 3-20 3-22 3-23 3-24 3-25 3-25 3-27 3-27 3-28 3-29

Copyright IBM Corp. 1996, 1997

vii

3-21. 3-22. 3-23. 3-24. 3-25. 3-26. 3-27. 3-28. 3-29. 3-30. 3-31. 3-32. 3-33. 3-34. 3-35. 4-1. 4-2. 4-3. 4-4. 4-5. 4-6.

Status Register D (Hex 00D) . . . . . . . . . . . . . . Diagnostic Status Byte (Hex 00E) . . . . . . . . . . . Diskette Drive Type Byte (Hex 010) . . . . . . . . . . Diskette Drive Type Bits 74 . . . . . . . . . . . . . . Hard Disk Type Byte (Hex 011) . . . . . . . . . . . . Hard Disk Drive Type 2 (Bits 74) . . . . . . . . . . . Hard Disk Drive Type 3 (Bits 30) . . . . . . . . . . . Hard Disk Drive Type Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Equipment Byte Installed Diskette Drive Bits . . . . . . . . . . . . . . Display Operating Mode Bits . . . . . . . . . . . . . . System Control Port B (Hex 0061, Write) . . . . . . . . . . . . System Control Port B (Hex 0061, Read) System Control Port A (Hex 0092) . . . . . . . . . . Error Codes . . . . . . . . . . . . . . . . . . . . . . . . BIOS Video VGA Modes . . . . . . . . . . . . . . . . BIOS Video Extended Modes--Trident 9385 . . . . . PCMCIA Standards and Specifications . . . . . . . . PCMCIA PC Card Slot Pin Assignments . . . . . . . System Board DSP Subsystem POS Register 2 (Hex 0102) . . . . . . . . . . . . . . . . . . . . . . . . . . . System Board IR Subsystem POS Register 2 (Hex . . . . . . . . . . . . . . . . . . . . . . . . . . . 0102)

. .

3-29 3-30 3-31 3-31 3-31 3-31 3-31 3-32 3-32 3-32 3-32 3-35 3-35 3-36 3-40 4-3 4-4 4-13 4-14 4-16 4-17

viii

Preface
This technical reference contains hardware and software interface information specific to the IBM ThinkPad 760XD, 760XL, 765D, and 765L computers. This technical reference is intended for those who develop hardware and software products for the computer. Users should understand computer architecture and programming concepts. This publication consists of the following sections and appendixes: Section 1, "System Overview," describes the system, features, and specifications. Section 2, "Programmable Option Select (POS)," describes the registers used for configuration. Section 3, "System Board," describes the system-specific hardware implementations. Section 4, "Subsystems," describes the hardware functions specific to the ThinkPad 760XD, 760XL, 765D, and 765L computers. Appendix A, "System Resources," describes the available system resources for the computer and docking stations. Appendix B, "System Management API (SMAPI) BIOS Overview," describes the system software interface built into the system, called the System Management Application Program Interface (SMAPI) BIOS, which controls the system information, system configuration, and power management features of the ThinkPad computer. Appendix C, "Notices," contains special notices and trademark information. An index is also included. This technical reference should be used with the following publications:

IBM Personal System/2 Hardware Interface Technical Reference IBM Personal System/2 and Personal Computer BIOS Interface
These publications contain additional information on many of the subjects discussed in this technical reference. Information about

Copyright IBM Corp. 1996, 1997

ix

diskette drives, hard disk drives, adapters, and external options are in separate technical references. Attention The term Reserved describes certain signals, bits, and registers that should not be changed. Use of reserved areas can cause compatibility problems, loss of data, or permanent damage to the hardware. When the contents of a register are changed, the state of the reserved bits must be preserved. Read the register first and change only the bits that must be changed.

x

Preface

Section 1. System Overview
Description . . . . . . . . . . . . . . System Board Devices and Features System Board I/O Address Map . . Specifications . . . . . . . . . . . . . Performance Specifications . . . . . . Physical Specifications Electrical Specifications . . . . Acoustical Readings . . . . . . Power Supply . . . . . . . . . . . . . Voltages . . . . . . . . . . . . . . Output Protection . . . . . . . . . Voltage Sequencing . . . . . . . . Power Supply Connector . . . . . Battery Pack . . . . . . . . . . . . .
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1-2 1-3 1-5 1-7 1-7 1-8 1-9 1-9 1-10 1-10 1-11 1-11 1-11 1-12

Copyright IBM Corp. 1996, 1997

1-1

Description
The IBM Personal System/2 Hardware Interface Technical Reference describes devices common to the PS/2 AT-bus system family. The IBM ThinkPad 760XD, 760XL, 765D, or 765L computers (hereafter called the ThinkPad computer or the computer) are notebook-size computers that feature the AT bus architecture. Each computer supports one internal diskette drive and one internal hard disk drive. The 760XD or 765D also supports an internal CD-ROM drive. Programs can distinguish the foregoing models of computers from other ThinkPad models by reading the system ID: Interrupt 15H Function code (AH)=23H and (AL)=10H. Returns (AL)=18H (for the model with 800x600 LCD containing the video chip Trident 9385) (AL)=21H (for the model with 1024x768 LCD containing the video chip Trident 9385) The system microprocessor contains an internal cache and cache controller. Figure 1-1 lists the model bytes, submodel bytes, and system clock speed of the system board for each model.
Model 760XD or 760XL 765D or 765L Model Byte (Hex) FC FC Submodel Byte (Hex) 01 01 System Clock 33 MHz 33 MHz

Figure 1-1. Model and Submodel Bytes

For a listing of the other systems, refer to the IBM Personal System/2 and Personal Computer BIOS Interface.

1-2

System Overview

System Board Devices and Features
Figure 1-2 lists the system board devices and their features. The IBM Personal System/2 Hardware Interface Technical Reference describes devices common to PS/2 products by type number.
Device Microprocessor Type Features Intel** Pentium** processor with the MMX technology 166MHz 32KB on-chip cache External cache System timers 1 256KB (write back) (for not all models) Channel 0: system timer Channel 1: refresh generation Channel 2: tone generator for speaker 128KB by 4 banks (1KB equals 1024 bytes) 8 to 104MB (1MB equals 1,048,576 bytes) 128 bytes CMOS RAM with real-time clock/calendar + 4K byte NVRAM 1K bits SVGA or XGA video functions: ThinkPad 760XL Up to 262,144 colors on the TFT SVGA (800x600) LCD ThinkPad 760XD, 765D, or 765L Up to 65,536 colors on the TFT XGA (1024x768) LCD Up to 16,777,216 colors on an external display See "Video Subsystem" on page 4-2 for more details of the video subsystem. DMA controller 1 Seven DMA channels (AT compatible) Four 8-bit channels and three 16-bit channels

ROM subsystem RAM subsystem CMOS RAM subsystem EEPROM subsystem Video subsystem



Figure 1-2 (Part 1 of 2). System Board Devices and Features

System Overview

1-3

Device Interrupt controller Keyboard/auxiliary device controller

Type 1 1

Features 15 levels of system interrupts (interrupts are edge-triggered) Internal keyboard TrackPoint III Auxiliary device connector Password security Supports: 3.5-in. 3.5-in. 3.5-in. 3.5-in. diskette diskette diskette diskette (2.88MB ) (1.44MB) (1.2MB) (720KB)

Diskette drive controller

2

Serial controller port Parallel controller port

2

1

Expansion bus adapter (AT-bus and PCI-bus)



EIA-232-E interface (16550 compatible) Programmable as serial port 1, 2, 3, or 4 One 9-pin, D-sub connector Programmable as parallel port 1, 2, or 3 IEEE P1284-A compatible Supports bidirectional input and output Enhanced Parallel Port (EPP) compatible Extended Capabilities Port (ECP) compatible Supports externally attached devices: ThinkPad Dock I and Dock II with AT-bus I/O channel (760XD or 760XL only) SelectaDock Port replicator

PCMCIA** slots



Conforms to the standards and specifications listed in Figure 4-3 on page 4-13. CardBus Two Type I or II PC cards One Type III PC card

DSP subsystem



Is driven by: Mwave DSP; MDSP 2780 Mwave SRAM 32 Kb by 40 bits 44 KHz, 16-bit audio CODEC Voice band CODEC for modem Internal DAA for some countries Internal omnidirectional microphone

Infrared subsystem



Supports: ThinkPad IR/SIR/D-ASK (500 KHz) IR

The 2.88MB format size is available as an option. Personal Computer Memory Card International Association

Figure 1-2 (Part 2 of 2). System Board Devices and Features

1-4

System Overview

System Board I/O Address Map
Figure 1-3 shows the I/O address map.
Address (Hex) 0000001F 0020, 0021 0022002F 0030003F 00400043 0048004B 0060 0061 0064 0070, 0071 0074, 0075, 0076 0078007C 00810083, 0087 0089008B, 008F 0092 0094 0096 0098 00A0, 00A1 00C000DF 00F000FF 01020107 01700177 01A001AF 01B001BF 01C001CF 01D001DF 01F001F7 0201 02200233 02400253 026E, 026F 0278027A 027B027F 02E802EF 02F802FF 03000302 03300332 0376, 0377 0378037A 037B037F 0388038B 03980399 Device DMA Controller (03) Interrupt Controller (Master) Reserved Audio Subsystem 2 (DCR 3006) System Timer 1 Reserved Keyboard, Auxiliary Device System Control Port B Keyboard, Auxiliary Device RT/CMOS and NMI Mask Reserved EEPROM for Security DMA Page Registers (03) DMA Page Registers (47) System Control Port A System Board Enable/Setup Register Reserved System Flash ROM Control Register (DCR 2282) Interrupt Controller (slave) DMA Controller (47) Reserved Programmable Option Select Secondary IDE Registers IR Controller 1 IR Controller 2 IR Controller 3 IR Controller 4 Primary IDE Registers Joystick Port Audio Subsystem - Sound Blaster 1 Audio Subsystem - Sound Blaster 2 Super I/O Configuration Registers Parallel Port 3 Reserved Serial Port 4 Serial Port 2 MIDI Port 1 EVD model MIDI Port 2 EVD model Secondary IDE Registers Parallel Port 2 Reserved Audio Subsystem - FM synthesizer Reserved

Figure 1-3 (Part 1 of 2). System Board I/O Address Map

System Overview

1-5

Address (Hex) 03B4, 03B5, 03BA 03BC03BE 03C003C5 03C603C9 03CA, 03CC, 03CE, 03CF 03D4, 03D5, 03DA, 03D803DA 03E003E1 03E803EF 03F003F5, 03F7 03F6, 03F7 03F803FF 0CF8 0CFC 0D00, 0D01 15E815EF 212021FF 23C023C7 43C643C9 46E8 4E304E3F 83C683C8 8E308E3F CE30CE3F F104

Device Video Subsystem Parallel Port 1 Video Subsystem Video DAC Video Subsystem Video Subsystem PCMCIA Interface (DCR 2959) Serial Port 3 Diskette-Drive Controller Primary IDE Registers Serial Port 1 PCI Configuration Address Register PCI Configuration Data Register Flat Panel Controller Power Management Register Reserved Reserved Video Subsystem Video Subsystem Enable Audio Subsystem 1 (DCR 3006) Video Subsystem Audio Subsystem 3 (DCR 3006) Audio Subsystem 4 (DCR 3006) Reserved

Figure 1-3 (Part 2 of 2). System Board I/O Address Map

1-6

System Overview

Specifications
Figure 1-4 to Figure 1-7 on page 1-9 list the specifications for the computers. Performance Specifications
Device/Cycle Microprocessor L1 cache (64bit) read/write hit L2 cache (64bit) (for not all models) read hit (back-to-back) write hit (back-to-back) Memory (64bit) (*1) read, page hit read, raw miss read, page miss posted write write retire rate from write buffer Note: * The cycle times shown for access to system board RAM are based on 70ns EDO memory. Clock Counts (66MHz) 66/166MHz 1 CPUCLK 90ns (60ns) 90ns (60ns)

240ns 285ns 345ns 90ns 135ns

Figure 1-4. Performance Specifications

System Overview

1-7

Physical Specifications
Size 297 mm (11.7 in.) ThinkPad 760XD and 760XL: 210 mm (8.3 in.) ThinkPad 765D and 765L: 236 mm (9.3 in.) Height: ThinkPad 760XD: 50.7 mm (2.00 in.) ThinkPad 760XL: 54.3 mm (2.14 in.) ThinkPad 765D and 765L: 56.2 mm (2.2 in.) Weight (approximate value) ThinkPad 760XD: 3.18 kg (7.0 lb) ThinkPad 760XL: 3.05 kg (6.7 lb) ThinkPad 765D: 3.49 kg (7.7 lb) ThinkPad 765L: 3.34 kg (7.4 lb) Air Temperature System on (without diskette) 5.0C to 35.0C (41F to 95F) System on (with diskette) 10.0C to 35.0C (50F to 95F) System off 5.0C to 43.0C (41F to 110F) Humidity System (without diskette) 8% to 95% System (with diskette) 8% to 80% Maximum altitude : 3,048 m (10,000 ft) in unpressurized conditions Heat output: 40 W (136.5 BTUs/hour) at maximum configuration Acoustical readings (see Figure 1-7 on page 1-9) Electrical (see Figure 1-6 on page 1-9) Electromagnetic compatibility: FCC class B With battery pack installed. This is the maximum altitude at which the specified air temperatures apply. At higher altitudes, the maximum air temperatures are lower than those specified. (with Li ion battery & CD-ROM) (with Li ion battery & FDD) (with Li ion battery & CD-ROM) (with Li ion battery & FDD) Width: Depth:

Figure 1-5. Physical Specifications

1-8

System Overview

Electrical Specifications
(35 W) Input voltage (V ac) Frequency (Hz) Input (kVA) 100240 50/60 0.12 (40 W) 100240 50/60 0.12 (56 W) 100240 50/60 0.17

Range is automatically selected; sine wave input is required. At maximum configuration.

Figure 1-6. Electrical Specifications

Acoustical Readings
LWAd in bels Operate 760XL or 765L 760XD or 765D (with SelectaDock I) Notes: LWAd LpAm m Operate Is the declared sound power level for the random sample of machines. Is the mean value of the A-weighted sound pressure levels at the operator position (if any) for the random sample of machines. Is the mean value of the A-weighted sound pressure levels at the one-meter position for the random sample of machines. Shows the value while using the hard disk drive. 4.0 4.4 Idle 3.4 4.4 LpAm in dB Operate 34 35.5 Idle 30 35.5 m in dB Operate 27 29.5 Idle 22 29

All measurements made in accordance with ANSI S12.10 and reported in conformance with ISO 9296.

Figure 1-7. Acoustical Readings

System Overview

1-9

Power Supply
The power supply converts the ac voltage to dc voltage and provides power for the following: System board set Diskette drive Hard disk drive CD-ROM drive Auxiliary devices Keyboard LCD panel PCMCIA cards

Voltages
The power supply generates six different dc voltages: VCCCPU, VCC3A, VCC5M, AVCC, VCCSW, and VCC12M. Figure 1-8 shows the maximum current for each voltage.
Output VCCCPU VCC3A VCC5M AVCC VCCSW VCC12M Voltage (V dc) +2.5 +3.3 +5.0 +5.0 +5.0 +12.0 Current (A) 4.2 3.80 5.80 0.01 0.01 0.12

Figure 1-8. Power Supply Maximum Current

1-10

System Overview

Output Protection
A short circuit placed on any dc output (between two outputs or between an output and a dc return) latches all dc outputs into a shutdown state, with no hazardous condition to the power supply. If an overvoltage fault occurs in the power supply, the power supply latches all dc outputs into a shutdown state before any output exceeds 135% of the nominal value of the power supply.

Voltage Sequencing
When power is turned on, the output voltages reach their operational voltages within 2 seconds.

Power Supply Connector
The following connector is used with the AC adapters and the Car Battery Adapter. The total power capacity of this connector must not exceed 4.0 A.

4 2 3 1

Refer to Figure 1-9 and Figure 1-10 on page 1-12 for the appropriate adapter pin assignments.
Pin 1 2 3 4 Voltage +8.0 V dc to +20.0 V dc (depending on charging conditions) Charge mode select signal Ground Communication ground

Figure 1-9. Voltage Pin Assignments for the 40W AC Adapter and Car Battery Adapter

System Overview

1-11

Pin 1 2 3 4

Voltage +7.0 V dc to +16.0 V dc (depending on charging conditions) N/C Ground Ground

Figure 1-10. Voltage Pin Assignments for the 35W or 56W AC Adapter

Battery Pack
The ThinkPad computer uses a lithium-ion (Li-ion) or nickel metal hydride (NiMH) battery pack that meets the following electrical specifications:
Nominal Voltage Capacity (average) Protection +10.8 V dc 3.0 ampere hours (AH) Overcurrent protection Overvoltage protection Overdischarge protection Thermal protection

Figure 1-11. Li-ion Battery Pack Specifications

Nominal Voltage Capacity (average) Protection

+8.4 V dc 3.5 ampere hours (AH) Overcurrent protection Overvoltage protection Thermal protection

Figure 1-12. NiMH Battery Pack Specifications

1-12

System Overview

Section 2. Programmable Option Select (POS)
Description . . . . . . . . . . . . . . . . . . . . . . . System Board POS I/O Address Map . . . . . . . . System Board and Subsystem Setup . . . . . . . . System Board Enable/Setup Register (Hex 0094)
. . . . . . . . . . . . . . . . . . . . . . . . . . .

2-2 2-2 2-3 2-3

Copyright IBM Corp. 1996, 1997

2-1

Description
Programmable Option Select (POS) uses programmable registers rather than switches. This section describes the POS information used on the system board. For additional POS information, refer to the setup information in IBM Personal System/2 Hardware Interface Technical Reference. Attention Set programmable options only through the system configuration utilities. Directly setting the POS registers or CMOS RAM POS parameters may cause multiple assignments of the same system resource, improper operation of the feature, loss of data, or damage to the hardware. Application programs should not use the adapter identification unless absolutely necessary; compatibility problems can result. After setup operations are complete, the system board enable/setup register (hex 0094) should be set to hex FF. Setup functions respond to I/O addresses hex 0100 through hex 0107 only when their unique setup signal is active.

System Board POS I/O Address Map
Figure 2-1 shows the organization of the I/O address space used by the system board POS.
Address (Hex) 0094 0096 0100 0101 0102 0103 0104 0105 0106 0107 Function Enable/Setup register Reserved Reserved Reserved POS register 2: Option POS register 3: Option POS register 4: Option POS register 5: Option POS register 6: Option POS register 7: Option

select select select select select select

data data data data data data

byte byte byte byte byte byte

1 2 3 4 5 6

Figure 2-1. System Board POS I/O Address Map

2-2

Programmable Option Select

System Board and Subsystem Setup
The integrated I/O functions on the system board use POS information during setup. The DSP subsystem and IR subsystem are integrated as part of the system board, but POS treats them as separate devices. The system board Enable/Setup register is used to put the DSP subsystem or IR subsystem in setup mode.

System Board Enable/Setup Register (Hex 0094)
The system board Enable/Setup register is a read/write register. All bits in this register default to 1 (enabled).
Bit 7 6 5 4 3 2 1 0 Function Reserved Reserved Reserved Reserved Enable/Setup DSP subsystem Reserved Reserved Enable/Setup IR subsystem

Figure 2-2. System Board Enable/Setup Register (Hex 0094)

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Reserved. Reserved. Reserved. Reserved. When this bit is set to 0, the DSP subsystem function is put in setup mode. Reserved. Reserved. When this bit is set to 0, the IR subsystem function is put in setup mode.

Programmable Option Select

2-3

System Board Setup Take the following precautions before setting individual bits in the POS registers: Bit 3 in the DSP subsystem Enable/Setup register (hex 0094) must be put to 0 for the system board function to be set into setup mode. Other bits in the DSP subsystem Enable/Setup register must be set to 1 to prevent other subsystems from entering into setup mode. After setup operations are complete, the following precaution must be taken: The system board Enable/Setup register (hex 0094) must be set to hex FF.

2-4

Programmable Option Select

Section 3. System Board
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . Microprocessor . . . . . . . . . . . . . . . . . . . . . . . . . . Cache Memory Operation . . . . . . . . . . . . . . . . . . Cacheable Address Space . . . . . . . . . . . . . . . . . . Bus Adapter . . . . . . . . . . . . . . . . . . . . . . . . . . . . Keyboard/Mouse Connector . . . . . . . . . . . . . . . . . . . Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . Scan Codes . . . . . . . . . . . . . . . . . . . . . . . . . . Keyboard ID . . . . . . . . . . . . . . . . . . . . . . . . . . Displayable Characters and Symbols . . . . . . . . . . . . Hard Disk Drive Connector . . . . . . . . . . . . . . . . . . . External Bus Connector . . . . . . . . . . . . . . . . . . . . . Diskette Drive Connector (UltraBay) . . . . . . . . . . . . . . Pin Assignments for Type A . . . . . . . . . . . . . . . Pin Assignments for Type B . . . . . . . . . . . . . . . Pin Assignments for Type C . . . . . . . . . . . . . . . Diskette Drive and Controller . . . . . . . . . . . . . . . . . . Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ROM Subsystem RAM Subsystem . . . . . . . . . . . . . . . . . . . . . . . . System Memory Map . . . . . . . . . . . . . . . . . . . . . System Board Memory Connector for DIMM Adapter Card RT/CMOS RAM . . . . . . . . . . . . . . . . . . . . . . . . RT/CMOS Address and NMI Mask Register (Hex 0070) RT/CMOS Data Register (Hex 0071) . . . . . . . . . . RT/CMOS RAM I/O Operations . . . . . . . . . . . . . CMOS RAM Configuration . . . . . . . . . . . . . . . . Miscellaneous System Functions and Ports . . . . . . . . . Nonmaskable Interrupt (NMI) . . . . . . . . . . . . . . . . System Control Port B (Hex 0061) . . . . . . . . . . . . . System Control Port A (Hex 0092) . . . . . . . . . . . . . Power-On Password . . . . . . . . . . . . . . . . . . . . . Other Passwords . . . . . . . . . . . . . . . . . . . . . . . Selectable Drive-Startup Sequence . . . . . . . . . . . . . Hardware Compatibility . . . . . . . . . . . . . . . . . . . . . Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-2 3-2 3-2 3-3 3-4 3-5 3-5 3-5 3-6 3-7 3-8 3-9 3-10 3-13 3-14 3-16 3-18 3-20 3-21 3-21 3-21 3-22 3-22 3-23 3-25 3-25 3-26 3-30 3-34 3-34 3-35 3-36 3-37 3-38 3-38 3-39 3-40

Copyright IBM Corp. 1996, 1997

3-1

Description
This section describes the microprocessor, connectors, memory subsystems, and miscellaneous system functions and ports for the ThinkPad computers. You can find additional information about these topics in IBM Personal System/2 Hardware Interface Technical ReferenceAT-Bus Subsystems.

Microprocessor
The ThinkPad 760XD, 760XL, 765D, or 765L uses the Intel Pentium 166MHz processor with the MMX technology. The Pentium has a 32-bit address bus and a 64-bit data bus. It is software-compatible with all previous microprocessors. The Pentium has an internal, split data and instruction, 32KB write-back cache. It includes pipelined math coprocessor functions and superscalar architecture (two execution units).

Cache Memory Operation
In addition to the 32KB of internal Level 1 (L1) cache memory in the microprocessor, the system board of the 760XD, 760XL, 765D, or 765L contains an additional 256KB of external Level 2 (L2) cache memory. The cache memory in the Intel Pentium microprocessor and the L2 external cache memory enable the microprocessor to read instructions and data much faster than if the microprocessor had to access system memory. When an instruction is first used or data is first read or written, it is transferred to the cache memory from main memory. This enables future accesses to the instructions or data to occur much faster. The cache is disabled and empty when the microprocessor comes out of the reset state. The cache is tested and enabled during the power-on self-test (POST). The cache memory in the Intel Pentium microprocessor is loaded from system memory in 32-byte increments, each referred to as a cache line. A cache line is aligned on a paragraph boundary. A reference to any byte contained in a cache line results in the entire line being read into the cache memory (if the data was not already in

3-2

System Board

the cache). When the microprocessor gives up control of the system bus, the cache memory enters "snoop" mode and monitors all write and read operations. If memory data is written to a location in the cache and the cache line is in the "modified" state, the corresponding cache line is written back to system memory and invalidated. When the microprocessor performs a memory read, the data address is used to find the data in the cache. If the data is found (a hit), it is read from the cache memory and no external bus cycle occurs. If the data is not found (a miss), an external bus cycle is used to read the data from system memory. If the address of the missed data is in cacheable address space, the data is stored in the cache memory and the remainder of the cache line is read. When the microprocessor performs a memory write, the data address is used to search the cache. If the address is found (hit), the data is written to the cache and no external bus cycle is used to write the data to system memory. (If the address of the write operation was not in the cache memory but was in cacheable address space, the data is read back into the cache memory and the remainder of the cache line is read.)

Cacheable Address Space
Cacheable address space is defined as system memory that resides on the system board (0640KB and 1MB104MB). Cacheability of system memory is up to 64MB in the L2 cache. Nothing in address range hex A0000BFFFF, I/O address space, or memory in any AT slot is cached. ROM address space (hex C0000C7FFF) is L1 cacheable for code read operations only. If data in this address range is already in cache memory and the address range is written to, the cached line is invalidated and is read again from RAM, where the BIOS is shadowed.

System Board

3-3

Bus Adapter
When the computer is attached to the ThinkPad Dock I or Dock II, the AT-bus adapters can be used through the Dock I or Dock II. When the computer is attached to the ThinkPad SelectaDock, the PCI adapters or AT-bus adapters can be used through the SelectaDock. ThinkPad 765D and 765L do not support ThinkPad Doc I or Dock II.

3-4

System Board

Keyboard/Mouse Connector
Each ThinkPad computer has a keyboard/mouse connector, where the IBM mouse, keyboard, or numeric keypad is connected.

Signals
The keyboard and mouse signals are driven by open-collector drivers pulled to 5 V dc through a pull-up resistor. Figure 3-1 lists the signals.
Sink current High-level output voltage Low-level output voltage High-level input voltage Low-level input voltage 1 mA 5.0 V 0.5 V 2.0 V 0.8 V dc minus pullup dc dc dc Maximum Minimum Maximum Minimum Maximum

Figure 3-1. Keyboard and Mouse Signals

Connector
The keyboard/mouse connector uses a 6-pin, miniature DIN connector.
6 4 2 1 5 3

Pin 1 2 3 4 5 6

I/O I/O I/O I/O I/O

Signal Name Mouse Data Keyboard Data Ground +5 V dc Mouse Clock Keyboard Clock

Figure 3-2. Keyboard/Mouse Connector Pin Assignments

Note: The maximum current for +5 V dc (pin 4) is 0.5 A for both the mouse and the numeric keypad.

System Board

3-5

Scan Codes
Figure 3-3 shows the key numbers assigned to keys on the 84-key keyboard (for the U.S. and Japan). Figure 3-4 on page 3-7 shows the key numbers assigned to keys on the 85-key keyboard (for countries other than the U.S. and Japan). For scan codes assigned to each numbered key, refer to the IBM Personal System/2 Hardware Interface Technical Reference.
110 112 113 114 115 116 117 118 119 120 124 121 125 122 126 123 75 76 80 81 85 86

1

2

3

4

5

6

7

8

9

10

11

12

13

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

43

44

46

47

48

49

50

51

52

53

54

55

57

Fn

58

60

61

62

64 79

83 84 89

Left

Right

Figure 3-3. Key Numbers for the 84-Key Keyboard

3-6

System Board

110 112 113 114 115 116 117 118 119 120

124 121

125 122

126 123

75 76

80 81

85 86

1

2

3

4

5

6

7

8

9

10

11

12

13

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

43

44

46

47

48

49

50

51

52

53

54

55

57

Fn

58

60

61

62

64 79

83 84 89

Left

Right

Figure 3-4. Key Numbers for the 85-Key Keyboard

Keyboard ID
The keyboard ID consists of 2 bytes: hex 83AB (the built-in keyboard with the external numeric keypad) or hex 84AB (the built-in keyboard only). Interrupt 16H, function code (AH)=0AH, returns the keyboard ID.

System Board

3-7

Figure 3-5 shows the key numbers assigned to keys on the external numeric keypad. For scan codes assigned to each numbered key, refer to the IBM Personal System/2 Hardware Interface Technical Reference.
90 95 100 105

91

96

101 106

92

97

102

93

98

103 108

99

104

Figure 3-5. Key Numbers for the External Numeric Keypad

Displayable Characters and Symbols
For displayable characters and symbols that are keyable from the keyboard, refer to the IBM Personal System/2 Hardware Interface Technical Reference.

3-8

System Board

Hard Disk Drive Connector
The hard disk drive connected to the system board is removable. Figure 3-6 shows the pin assignments for the connector on the system board.
1

59

2
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Signal GND GND GND GND GND GND GND (NC) (NC) (NC) Reserved GND +5V +5V GND -DASP -HCS1 -HCS0 HA02 HA00 -PDIAG HA01 -HIOCS16 HIRQ GND Reserved Reserved IORDY GND -HIOR

60
Description Ground Ground Ground Ground Ground Ground Ground Not connected Not connected Not connected Not used Ground +5 V dc +5 V dc Ground Drive (active/slave drive present) Chip select 1 Chip select 0 Address 2 Address 0 Passed diagnostics Address 1 I/O CS16 Interrupt request Ground Not used Not used I/O ready Ground I/O read Pin 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 Signal HDID -HIOW GND Reserved (NC) GND HD15 HD00 HD14 HD01 HD13 HD02 HD12 HD03 HD11 HD04 Description HDDID I/O write Ground Not used Not connected Ground Data 15 Data 0 Data 14 Data 1 Data 13 Data 2 Data 12 Data 3 Data 11 Data 4

17 18 19 20 21 22 23 24 25 26 27 28 29 30

47 48 49 50 51 52 53 54 55 56 57 58 59 60

HD10 HD05 HD09 HD06 HD08 HD07 GND -HRESET (NC) (NC) JP2 JP2 JP1 JP1

Data Data Data Data Data

10 5 9 6 8

Data 7 Ground Reset Not connected Not connected Jumper (slave) Jumper (slave) Jumper (master) Jumper (master)

Figure 3-6. Hard Disk Drive Connector Pin Assignments

System Board

3-9

External Bus Connector
The docking station is connected through the 240-pin external bus connector on the rear panel. This connector is installed on the system board and has the following pin assignments:
121 1

60

180

240

120

61 181

Type Legend: A: Audio signal D: Power control signal F: Diskette drive signal G: Ground I: IDE hard disk drive signal K: Keyboard/mouse signal L: LED control signal

M: PCMCIA control signal P: Parallel port signal S: Serial port signal T: AT-bus signal V: Video signal W: Power line X: Analog video interface

Figure 3-7. 240-Pin External Bus Connector Pin Assignments

3-10

System Board

ISA Bus Mode 060 059 058 057 056 055 054 053 052 051 050 049 048 047 046 045 044 043 042 041 040 039 038 037 036 035 034 033 032 031 030 029 028 027 026 025 024 023 022 021 020 019 018 017 016 015 014 013 012 011 010 009 008 007 006 005 004 003 002 001 W W W W W W W W I D G T T T T T G T T T T T T T T T T T T T G T T G T T T T G T T T T G T G T T T T G T G T T T T T T D DOCK_PWR DOCK_PWR DOCK_PWR DOCK_PWR DOCK_PWR DOCK_PWR DOCK_PWR DOCK_PWR PDIAG# BATOP_DSBL# GND IOCHCK# SD6 SD4 SD2 SD0 GND AEN SA19 SA17 SA15 SA14 SA12 SA10 SA09 SA07 SA05 SA04 SA02 SA00 GND IRQ9 ZEROWS# GND SMEMW# SMEMR# IOW# IOR# GND REFRESH# IRQ6 IRQ4 DACK2# GND OSC GND LA23 LA21 LA19 LA17 GND MEMW# GND SD09 SD11 SD13 SD15 IOCS16# DACK0# PWRGOOD

PCI Bus Mode W << W << W << W << W << W << W << W << I << D << G << P Reserve M MIDIIN M MIDIOUT P INTC# P INTA# G << P AD(2) P AD(3) P AD(4) P AD(5) P AD(7) P AD(8) P AD(10) P AD(12) P AD(14) P PAR P PERR# P LOCK# P STOP# G << T << P Reserved G << P TRDY# P IRDY# P FRAME# P C/BE2# G << P AD(16) T << T << P Reserved G << P AD(18) G << P AD(21) P AD(22) P PHLDA_DOCK# P ACK_DOCK# G << P CLK G << P AD(24) P AD(26) P AD(28) P AD(30) P Reserved P Reserved D << 061 062 063 064 065 066 067 068 069 070 071 072 073 074 075 076 077 078 079 080 081 082 083 084 085 086 087 088 089 090 091 092 093 094 095 096 097 098 099 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 G X X X X X X G X X X X X T T T T G T G T T T T T T T T G T T T T T T T T T T T T T T T T T G T T T T G T G T T T T T D

ISA Bus Mode GND R RETURN VIDEO R G RETURN VIDEO G B RETURN VIDEO B GND MONID0 VSYNC MONID1 HSYNC MONID2 SD7 SD5 SD3 SD1 GND IOCHRDY GND SA18 SA16 SA13 SA11 SA08 SA06 SA03 SA01 GND DACK6# DRQ6 RESETDRV DRQ2 DACK3# DRQ3 DACK1# DRQ1 DACK7# DRQ7 MASTER# SYSCLK IRQ7 IRQ5 IRQ3 TC BALE GND SBHE# LA22 LA20 LA18 GND MEMR# GND SD08 SD10 SD12 SD14 MEMCS16# EVENT#

PCI Bus Mode G << X << X << X << X << X << X << G << X << X << X << X << X << P INTD# P INTB# P AD(0) P AD(1) G << P Reserved G << P AD(6) P C/BE0# P AD(9) P AD(11) P AD(13) P AD(15) P C/BE1# P SERR# G << P Reserved P Reserved P DEVSEL# P Reserved P Reserved P Reserved P Reserved P Reserved P Reserved P Reserved P AD(17) P Reserved T << T << T << P AD(19) P AD(20) G << P AD(23) P C/BE3# P PHLD_DOCK# P REQ_DOCK# G << P RST# G << P AD(25) P AD(27) P AD(29) P AD(31) P Reserved D <<

System Board

3-11

ISA Bus Mode 180 179 178 177 176 G GND D DOCKED_IN1# G GNDA G GNDA A SYS_LINE_OUT(R) G X S S S S D P P P P P P P P D L D G I I I F F F F F F T T T T T T T T D D G GNDA MONID3 RTS# DSR# DCD# TxD SUS_DSABL# PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 NOTE_ID0 HF_LED# Reserved SWITCH_ON GND Reserved HDCS0# HDCS1# HD7 FSTEP# WRDATA FWREN# TRAK0# DRVSEL1# RDDATA Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved IRQ10 IRQ12 IRQ14 DRQ5 DRQ0 IRQ11 IRQ15 DACK5# DOCK_SU# DOCKED_IN2# GND G G G G A

PCI Bus Mode << << << << << << << << << << << << << << << << << << << << << << << << << I2C_DATA << << << << << << << << << << << << << << << << << << << << << << << << << << Reserved Reserved << << Reserved << << << 181 182 183 184 185

ISA Bus Mode D DOCK_ID# G GND G GNDA G GNDA A SYS_LINE_OUT(L) G S S S S P P P P P P P P P D D F F F F F F F F F F F F F F G M M K K K K K P P GNDA RI# CTS# DTR# RxD AUTOFD# ERROR# INIT# SLCTIN# ACK# BUSY PE SLCT STROBE# SUS_STAT# Reserved PWR ON# INDEX# DRVSEL0# DISKCHG# DRIVEID0# MEDID0 MOTEN0# MOTEN1# DRATE1 FDIR# DRIVEID1 MEDID1 DRATED0 FWPROTECT# FSIDE1SEL# GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved PCMCIA_RI# SPKROUT# MOUSECLK MOUSEDATA KBDCLK KBDDATA +SAFE5V VCC5B_EX VCC5B_EX D G G G A

PCI Bus Mode << << << << <<

175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121

G X S S S S D P P P P P P P P D L L D G D I I I F F F F F F T T T P P T T P D D D

186 187 188 189 190 191 192 193 194 195 196 197 198 196 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240

G << S << S << S << S << P << P << P << P << P << P << P << P << P << D << << D << F << F << F << F << F << F << F << F << F << F << F << F << F << F << G << << << << << << << << << << D S_HSYNC D S_VSYNC << D I2C_CLK << M << M << K << K << K << K << K << P << P <<

3-12

System Board

Diskette Drive Connector (UltraBay)
The removable diskette drive, secondary hard disk drive, secondary battery, PCMCIA adapter, or CD-ROM drive can be connected to the UltraBay connector on the system board. Here are the pin assignments:
100

2

99

1

The UltraBay connector has the following three types of pin assignments. The appropriate interface selection is automatically performed through two ID signals. Each of the devices in the following figure can be connected to the UltraBay connector:
Device Removable diskette drive PCMCIA adapter IDE device (CD-ROM, hard disk) Type Type A Type B Type C Bay ID 1 Ground Ground Bay ID 0 Ground Ground Interface FDD PCMCIA IDE

Figure 3-8 on page 3-14 to Figure 3-10 on page 3-18 show the pin assignments for each connector type.

System Board

3-13

Pin Assignments for Type A
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Signal GND GND GND GND GND GND GND GND GND BATVCC GND BATVCC GND BATVCC GND Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Ground Reserved Reserved Reserved Reserved Reserved Reserved Reserved Ground Reserved Ground Bay ID 0 (GND) Ground Bay ID 1 (GND) Reserved Reserved Reserved Reserved Reserved Reserved Ground Reserved Reserved Reserved Reserved Reserved Reserved Ground Reserved Reserved Reserved Reserved Reserved Reserved Ground 820 V Ground 820 V Ground 820 V Ground

Figure 3-8 (Part 1 of 2). Pin Assignments for Diskette Drive Connector--Type A

3-14

System Board

Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

Signal BATVCC BATVCC VCC5A VCC5A VCC12B VCC5A GND VCC5B INDEX# VCC5B DRVSEL0# VCC5B DISKCHG# DRVID0 MEDID0 MOTEN0# DRATE1 FDIR# DRVID1 FSTEP# GND WRDATA GND FWREN# MEDID1 TRAK0# DRATE0 FWPROTECT# GND RDDATA GND FSIDE1SEL#

Description 820 V Reserved 820 V +5 V dc Reserved +5 V dc Reserved Reserved Reserved Reserved Reserved +12 V dc +5 V dc Reserved Reserved Reserved Reserved Reserved Ground Reserved Reserved Reserved Reserved Reserved +5 V dc Index +5 V dc Drive select 0 +5 V dc Disk change Drive ID 0 Reserved Media ID 0 Motor enable 0 Data rate select 1 Direction In Drive ID 1 Step Ground Write data Ground Write enable Media ID 1 Track 0 Data rate select 0 Write protect Bay ID 0 (GND) Read data Bay ID 1 (GND) Side 1 select

Figure 3-8 (Part 2 of 2). Pin Assignments for Diskette Drive Connector--Type A

System Board

3-15

Pin Assignments for Type B
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Signal A17 F-VPP5 F-VPP12 F-VCC5# CD2# GND D10 D9 D8 IOIS16# STSCHG# SPKR# GND REG# GND GND GND D2 D1 WAIT# D0 RESET GND FDET5V A0 A25 A1 A24 A2 GND A3 A23 A4 A22 A5 A21 GND BATVCC GND BATVCC GND BATVCC GND Description Reserved Reserved Reserved Reserved Address 17 5V,12V power control 5V,12V power control 5V power control Card detect2 Ground Card data bit 10 Card data bit 9 Card data bit 8 16Bit I/O Detect Card status change Reserved PCMCIA Speaker Ground Register Access Ground Bay ID 0 (N.C) Ground Bay ID 1 (GND) Card data bit 2 Reserved Card data bit 1 Extended cycle reg Card data bit 0 Card reset Ground Detect 5V Card Card address bit 0 Card address bit 25 Card address bit 1 Card address bit 24 Card address bit 2 Ground Card address bit 3 Card address bit 23 Card address bit 4 Card address bit 22 Card address bit 5 Card address bit 21 Ground 820 V Ground 820 V Ground 820 V Ground

Figure 3-9 (Part 1 of 2). Pin Assignments for Diskette Drive Connector--Type B

3-16

System Board

Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

Signal BATVCC A6 BATVCC VCC5A A20 VCC5A A19 A7 A18 A12 VCC12B VCC5A IOWR# A16 IORD# IREQ# GND WE# A15 A14 CE2# A13 VCC5B A8 VCC5B A9 VCC5B A11 D15 OE# D14 A10 D13 CE1# D12 D7 GND GND D6 D11 D5 CD1# D4 GND D3

Description 820 V Card address bit 6 820 V +5 V dc Card address bit 20 +5 V dc Card address bit 19 Card address bit 7 Card address bit 18 Card address bit 12 Reserved (SMP_SPK) +12 V dc +5 V dc Reserved (BATLOW#) I/O write Card address bit 16 I/O read Interrupt request Ground Write enable Card address bit 15 Card address bit 14 Card enable 2 Card address bit 13 +5 V Card address bit 8 +5 V dc Card address bit 9 +5 V dc Card address bit 11 Card data bit 15 Output enable Card data 14 Card address bit 10 Card data bit 13 Chip Enable 1 Card data bit 12 Card data bit 7 Ground (WRDATA) Ground Card data bit 6 Card data bit 11 Card data bit 5 Card detect 1 Card data bit 4 Bay ID 0 (N.C) (RDDATA) Bay ID 1 (GND) Card data bit 3

Figure 3-9 (Part 2 of 2). Pin Assignments for Diskette Drive Connector--Type B

System Board

3-17

Pin Assignments for Type C
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Signal L_AUX AGND AGND R_AUX RESET# GND D7 D8 D6 D9 D5 BAYHDD# GND GND GND GND D10 D4 D11 D3 D12 GND D2 D13 D1 D14 D0 D15 GND IOW# IOR# GND GND GND CSEL Description Left Auxiliary Line Input Analog ground (CD-ROM) Analog ground (CD-ROM) Right Auxiliary Line Input Reserved Reserved Reserved Reserved Drive Reset Ground Data bit 7 Data bit 8 Data bit 6 Data bit 9 Data bit 5 Hard Disk Detection Reserved Ground Reserved Ground Bay ID 0 (GND) Ground Bay ID 1 (N.C) Data bit 10 Data bit 4 Data bit 11 Data bit 3 Data bit 12 Reserved Ground Data bit 2 Data bit 13 Data bit 1 Data bit 14 Data bit 0 Data bit 15 Ground Reserved Reserved Reserved I/O write Reserved I/O read Ground Reserved Ground Reserved Ground Reserved Cable Select (=GND)

Figure 3-10 (Part 1 of 2). Pin Assignments for Diskette Drive Connector--Type C

3-18

System Board

Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

Signal IOCHRDY IRQ IOCS16 VCC5A A1 A0 A2 GND HDCS0# HDCS1# DASP# VCC5B VCC5B VCC5B MCS# SLEEP-IN# GND GND BAYID0 BAYID1

Description Reserved I/O channel ready Reserved Reserved Reserved Reserved Address bit 19 16 bit I/O Detect Reserved Reserved (SMP_SPK) Reserved +5 V dc (BATLOW) Address bit 1 Reserved Address bit 0 Address bit 2 Ground Reserved Chip select 0 Chip select 1 Drive active or slave present Reserved +5 V dc Reserved +5 V dc Reserved +5 V dc Power management signal (CD-ROM) Drive sleep in (CD-ROM) Reserved Reserved Reserved Reserved Reserved Reserved Reserved Ground (WRDATA) Ground Reserved Reserved Reserved Reserved Reserved Bay ID 0 (=GND) Reserved (RDDATA) Bay ID 1 (=N.C) Reserved

Figure 3-10 (Part 2 of 2). Pin Assignments for Diskette Drive Connector--Type C

System Board

3-19

Diskette Drive and Controller
Figure 3-11 shows the read, write, and format capabilities of the diskette drive for the ThinkPad computer.
Format Size Diskette Type 3.5-inch 1.0MB Diskette 3.5-inch 2.0MB Diskette 3.5-inch 4.0MB Diskette Legend: : 1KB (kilobyte) 1MB (megabyte) R W F 1024 bytes 1,048,576 bytes Read Write Format 720KB RWF - - 1.2MB - RWF - 1.44MB - RWF - 2.88MB - - RWF

Figure 3-11. Diskette Drive Read, Write, and Format Capabilities

3-20

System Board

Memory
The ThinkPad computers use the following types of memory: Read-only memory (ROM) Random access memory (RAM) Real-time clock/complementary metal-oxide semiconductor RAM (RT/CMOS RAM)

ROM Subsystem
The ROM subsystem consists of four banks of 128KB memory. ROM is active when power is turned on and is assigned to the top of the first and last 1MB of address space (hex 000F0000000FFFFF and hex FFFF0000FFFFFFFF). After POST checks that system memory is operating correctly, the ROM code is copied to RAM at the same address space, and ROM is disabled.

RAM Subsystem
The RAM subsystem on the system board starts at address hex 00000000 of the address space. The RAM subsystem for the ThinkPad 760XD, 760XL, 765D, or 765L is 64 bits wide. The 8MB base memory is on the system board. The 8MB memory is on the DIMM adaptor card. Two 144-pin 8 byte dual inline memory module (DIMM) connectors are provided on the DIMM adapter card. One connector accepts an 8MB, a 16MB or a 32MB DIMM. The other connector accepts an 8MB, a 16MB, a 32MB, or a 2-bank-type 64MB DIMM by using a slide switch on the DIMM adapter card. If a 2-bank-type 64MB DIMM is installed, the 8MB memory on the DIMM adaptor card becomes disabled. This means that the memory capacity can be increased up to 104MB when DIMMs are used (see "System Board Memory Connector for DIMM Adapter Card" on page 3-22). For example, if a 32MB memory and a 64MB memory are installed in the memory slots, the total memory size becomes 104MB, as shown by the following formula: 8MB (on the system board) + 32MB (on the left-side memory slot) + 64MB (on the right-side memory slot) = 1 4MB

System Board

3-21

The total amount of usable memory is less than the amount of memory installed because of ROM-to-RAM remapping and power management.

System Memory Map
Memory is mapped by the memory controller registers. Figure 3-12 shows the memory map for a correctly functioning system. Memory can be mapped differently if POST detects an error in system board memory or RT/CMOS RAM. In the figure, the variable x represents the number of 1MB blocks of system board memory starting at or above the hex 100000 boundary.
Hex Address Range 00000000 to 0009FFFF 000A0000 to 000BFFFF 000C0000 to 000C7FFF 000C8000 to 000EFFFF 000F0000 to 000FFFFF 00100000 to (00100000 + xMB) FFFF0000 to FFFFFFFF Function 640KB system board RAM Video RAM System board video BIOS ROM mapped to RAM Channel ROM 64KB system board ROM mapped to RAM

xMB system board RAM
64KB system board ROM (same as 000F0000 to 000FFFFF)

Figure 3-12. System Memory Map

System Board Memory Connector for DIMM Adapter Card
The system board has one memory connector that directly accepts a DIMM adapter card with slots for one or two 144-pin DIMMs as described on page 3-21. Figure 3-13 on page 3-23 shows the pin assignments for the DIMM adapter card memory connector.

3-22

System Board

Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

Signal NC GND VDD NC NC NC NC NC NC NC DIMM1 SCL DIMM1 SDA GND D63 D62 D47 D61 D46 D60 D45 D44 VDD D59 D58 D43 D57 D42 D56 D41 D40 GND DIMMID1 DIMMID0 -RAS1 -CAS7

Pin 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70

Signal -CAS6 VDD -CAS5 -RAS3 -CAS4 -RAS2 -RAS1 GND NC A11 A9 A7 A5 A3 A1 NC VDD D55 D39 D54 D38 D37 D53 D36 D52 GND D51 D35 D50 D34 D33 D49 D32 D48 VDD

Pin 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105

Signal NC NC GND NC NC NC NC NC NC NC DIMM2 SCL DIMM2 SDA GND D31 D30 D15 D29 D14 D28 D13 D12 VDD D27 D26 D11 D25 D10 D24 D9 D8 GND NC NC -OE -CAS3

Pin 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140

Signal -CAS2 VDD -CAS1 -RAS3 -CAS0 -RAS2 -WE GND NC A10 A8 A6 A4 A2 A0 NC VDD D23 D7 D22 D6 D5 D21 D4 D20 GND D19 D3 D18 D2 D1 D17 D0 D16 VDD

Figure 3-13. DIMM Adapter Card Memory Connector Pin Assignments

RT/CMOS RAM
The RT/CMOS RAM (real-time clock/complementary metal-oxide semiconductor RAM) module contains the real-time clock and 128 bytes of CMOS RAM. The clock circuitry uses 14 bytes of this memory; the remainder is allocated to configuration and system-status information. A battery is built into the module to keep the RT/CMOS RAM active when the power supply is not turned on. In addition to the 128 bytes of CMOS/RAM, a CMOS/RAM extension of 4KB is provided for configuration and other system information.

System Board

3-23

Figure 3-14 on page 3-24 lists the RT/CMOS RAM bytes and their addresses.
Address (Hex) 00000D 00E 00F 010 011 012 013 014 015, 016 017, 018 019 01A 01B 01C 01D02D 02E, 02F 030, 031 032 03307F RT/CMOS RAM Bytes Real-time clock Diagnostic status Shutdown status Diskette drive type Hard disk 2 and 3 drive type Hard disk 0 and 1 drive type Reserved Equipment Low and high base memory Low and high expansion memory Hard disk 0 extended byte Hard disk 1 extended byte Hard disk 2 extended byte Hard disk 3 extended byte Reserved Checksum Low and high usable memory above 1MB Date-century Reserved

Figure 3-14. RT/CMOS RAM Address Map

3-24

System Board

RT/CMOS Address and NMI Mask Register (Hex 0070) The NMI mask register is used with the RT/CMOS data register (hex 0071) to read from and write to the RT/CMOS RAM bytes. Attention The operation following a write to hex 0070 should access hex 0071; otherwise, intermittent failures of the RT/CMOS RAM can occur.
Bit 7 60 Function NMI mask RT/CMOS RAM address

Figure 3-15. RT/CMOS Address and NMI Mask Register (Hex 0070)

Bit 7 Bits 60

When this write-only bit is set to 1, the NMI is masked (disabled). This bit is set to 1 by a power-on reset. These bits are used to select RT/CMOS RAM addresses.

RT/CMOS Data Register (Hex 0071) The RT/CMOS data register is used with the RT/CMOS address and NMI mask register (hex 0070) to read from and write to the RT/CMOS RAM bytes.
Bit 70 Function RT/CMOS data

Figure 3-16. RT/CMOS Data Register (Hex 0071)

System Board

3-25

RT/CMOS RAM I/O Operations During I/O operations to the RT/CMOS RAM addresses, you should mask interrupts to prevent other interrupt routines from changing the RT/CMOS address register before data is read or written. After I/O operations, you should leave the RT/CMOS address and NMI mask register (hex 0070) pointing to status register D (hex 00D). Attention The operation following a write to hex 0070 should access hex 0071; otherwise, intermittent failures of the RT/CMOS RAM can occur. Writing to the RT/CMOS RAM requires the following: 1. Write the RT/CMOS RAM address to the RT/CMOS address and NMI mask register (hex 0070). 2. Write the data to the RT/CMOS data register (hex 0071). 3. Write the address, hex 0F, to the RT/CMOS and NMI mask register; this leaves hex 0070 pointing to the shutdown status byte (hex 0F). 4. Read address hex 0071 to restore the RT/CMOS. Reading from the RT/CMOS RAM requires the following steps: 1. Write the RT/CMOS RAM address to the RT/CMOS and NMI mask register (hex 0070). 2. Read the data from the RT/CMOS data register (hex 0071). 3. Write the address, hex 0F, to the RT/CMOS and NMI mask register; this leaves hex 0070 pointing to the shutdown status byte (hex 0F). 4. Read address hex 0071 to restore the RT/CMOS.

3-26

System Board

Real-Time Clock Bytes (Hex 00000D): Bit definitions and addresses for the real-time clock bytes are shown in Figure 3-17.
Address (Hex) 000 001 002 003 004 005 006 007 008 009 00A 00B 00C 00D Function Seconds Second alarm Minutes Minute alarm Hours Hour alarm Day of week Date of month Month Year Status register Status register Status register Status register Byte Number 0 1 2 3 4 5 6 7 8 9 10 11 12 13

A B C D

Figure 3-17. Real-Time Clock Bytes (Hex 00000D)

Note: The setup program initializes status registers A and B when the time and date are set. Interrupt 1AH is the BIOS interface to read and set the time and date; it initializes the registers in the same way that the setup program does.

Status Register A (Hex 00A)
Bit 7 6 Function Update in progress (UIP) Countdown chain 1 - resets countdown chain 0 - countdown chain enabled Oscillator enable 0 - oscillator off 1 - oscillator on Bank select Rate-selection bits

5

4 30

Figure 3-18. Status Register A (Hex 00A)

Bit 7

This bit is a status flag that can be monitored. When this bit is 1, the update transfer will soon occur. When this bit 0, the update transfer will not occur for at least 244 s.

System Board

3-27

Bits 65

When these bits are a pattern of 01, the oscillator is turned on and the RTC is allowed to keep time. The next update will occur at 500 ms after a pattern of 01 is written to these bits. To use the original bank of memory, select 0. To use the extended registers, select 1. These bits allow the selection of a divider output frequency or disable the divider output.

Bits 4 Bits 30

Status Register B (Hex 00B)
Bit 7 6 5 4 3 2 1 0 Function Set Enable periodic interrupt Enable alarm interrupt Enable update-ended interrupt Enable square wave Date mode 24-hour mode Enable daylight-saving time

Figure 3-19. Status Register B (Hex 00B)

Bit 7

When set to 0, this bit updates the cycle, normally by advancing the count at a rate of one cycle per second. When set to 1, it immediately ends any update cycle in progress, and the program can initialize the 14 time bytes without any further updates occurring until this bit is set to 0. This is a read/write bit that allows an interrupt to occur at a rate specified by the rate and divider bits in status register A. When set to 1, this bit enables the interrupt. The system initializes this bit to 0. When set to 1, this bit enables the alarm interrupt. The system initializes this bit to 0. When set to 1, this bit enables the update-ended interrupt. The system initializes this bit to 0. When set to 1, this bit enables the square-wave frequency as set by the rate-selection bits in status register A. The system initializes this bit to 0.

Bit 6

Bit 5 Bit 4 Bit 3

3-28

System Board

Bit 2

This bit indicates whether the binary-coded-decimal (BCD) or binary format is used for time-and-date calendar updates. When set to 1, this bit indicates the binary format. The system initializes this bit to 0. This bit indicates whether the hours byte is in 12-hour or 24-hour mode. When set to 1, this bit indicates the 24-hour mode. The system initializes this bit to 1. When set to 1, this bit enables the daylight-saving-time mode. When set to 0, this bit disables the daylight-saving-time mode, and the clock reverts to standard time. The system initializes this bit to 0.

Bit 1

Bit 0

Status Register C (Hex 00C)
Bit 7 6 5 4 30 Function Interrupt request flag Periodic interrupt flag Alarm interrupt flag Update-ended interrupt flag Reserved

Figure 3-20. Status Register C (Hex 00C)

Note: Interrupts are enabled by bits 6, 5, and 4 in status register B. Bit 7 Bit 6 Bit 5 Bit 4 Bits 30 When set to 1, this bit indicates that an interrupt has occurred; bits 6, 5, and 4 indicate the type of interrupt. When set to 1, this bit indicates that a periodic interrupt has occurred. When set to 1, this bit indicates that an alarm interrupt has occurred. When set to 1, this bit indicates that an update-ended interrupt has occurred. These bits are reserved.

Status Register D (Hex 00D)
Bit 7 60 Function Valid RAM Reserved

Figure 3-21. Status Registe