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A B C D E
A8E/A8S Merom/GM965/PM965 BLOCK DIAGRAM
BATTERY
1
Sub block Diagram / TYPE
1
BOM option 3S2P
64
CLOCK GEN
ICS9LPR363AGLF-T
29
CPU
CPU
MEROM 3,4 .... CAP 5
POWER
SEQENCE
LFB LFB LFB LFB 2
2
DVI Dual HOST BUS 2
CH. 47
Nvidia PCI-E
CRT & TV
VGA NB8x series VGA x16
DDR2 SDRAM 533/667MHz
DDR2 533/667
DDR
DCIN
CON 46
CON ATI CON CRESTLINE SODIMM X2
.... CAP/RES
RTC
M7x series GM965/PM965 +1.8V
+0.9VS
9 FAN CON.
7,8
LVDS & INV VGA BAORD 70 11~15
CON 45
THERMAL
X4 DMI CONTROL50
VCORE USB2.0
USB x4 PCI EXPRESS X1
3 52 SATA 3
SYSTEM
PCI_BUS 3.3V, 33MHz
ICH8M
1.5VS & 1.05VS B/T
PATA
ACZ
61
SATA ODD 20~24
HDD Master CARDBUS LAN 1G MINI CARD NEW
DDR & VTT
Camera 51 51 4 IN 1 RICOH RTL8111B x2 CARD
53 43
FingerPrint CARD R5C833 33
68
+3VAO & +2.5VS READER
1394
LPC, 33MHz 42
RJ11,RJ45
CHARGER Azalia
LAN IO CON
34
4 ALC660 4
PIC
TPM 62
KBC Module OP MDC SW & LED
DETECT IT8511E TPA0212 CON
34
56
KB NEW CARD
PROTECT (DEBUG)
67 60
ISA
AC & BAT CON
ROM USB x1 FAN CTRL
LOAD SWITCH PHONE
55
T/P SIO 50
5 FLOWCHART 30,31 LPC47N217 1394
5
MIC_IN
SLOT 40 Title : BLOCKDIAGRAM
SIGNAL ASUSTeK COMPUTER INC Engineer:
FIR
Size Project Name Rev
Custom A8ES 2.0
Date: Monday, January 29, 2007 Sheet 1 of 94
A B C D E
5 4 3 2 1
Reset
IC
PWRSW#_EC 6 Power On
2 SWITCH
D D
+5VA
AC_BAT_SYS 1 7 PM_PWRBTN#
+3VA_EC SLP_S4#
+3VA EC
To EC
+3VA_EC 5 PM_RSMRST# ICH8
IT8511E SLP_S3#
3 VSUS_ON SLP_S3# + VRMPWRGD
VRMPWRGD
EC_CLK_EN
PWROK + VRMPWRGD
CL_PWROK
13 PWROK
+3VSUS 4 SUS_PWRGD
+5VSUS
SUSB_ON
SUSC_ON
+12VSUS
PLT_RST#
H_PWRGD
C
8 16 C
ALL_SYSTEM_PWRGD
16
SUSC_ON
+1.8V
+3V
+5V
+12V 17
CPU_PWRGD
H_CPURST#
10 15 965PM Merom
CL_PWROK
PM_PWROK
PWROK
12
B
+0.9VS B
+1.5VS 14
+1.25VS
CLK_PWRGD
+2.5VS CLK
9 +3VS Gen.
+5VS CLK_PWRGD asserted when both
SUSB_ON
+12VS PM_SUSB# and VRM_PWRGD are
high.
Delay 11 CPU_VRON Power On Sequence
99ms
+VCORE Check
A
sequence 14&15 1 17 A
Title : PowerOn sequence
ASUSTeK COMPUTER INC Engineer:
Size Project Name Rev
Custom A8ES 1.0
Date: Wednesday, October 11, 2006 Sheet 2 of 94
5 4 3 2 1
5 4 3 2 1
H_D#[63:0]
10 H_D#[63:0]
H_A#[35:3]
10 H_A#[35:3]
D T0301 D
H_REQ#[4:0] T0302
TPC26T
10 H_REQ#[4:0]
TPC26T
1
1
CPU1A CPU1B
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 10 D[0]# D[32]#
ADDR GROUP 0
ADDR GROUP 0
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 10 D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 10 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
A[6]# D[3]# D[35]#
DATA GRP 0
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A[7]# DEFER# H_DEFER# 10 D[4]# D[36]#
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 10 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 10 D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40
P5 A[11]# BR0# F1 H_BR0# 10 K24 D[8]# D[40]# Y25
DATA GRP 2
H_A#12 P2 +VCCP_CPU H_D#9 G24 W22 H_D#41
A[12]# D[9]# D[41]#
CONTROL
H_A#13 L2 D20 H_IERR# R0301 56Ohm H_D#10 J24 Y23 H_D#42
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
P4 A[14]# INIT# B3 H_INIT# 20 J23 D[11]# D[43]# W24
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 10 F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
10 H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
C1 H_D#15 H23 AB25 H_D#47
RESET# H_CPURST# 10 D[15]# D[47]#
H_REQ#0 K3 F3 H_RS#0 J26 Y26
REQ[0]# RS[0]# H_RS#0 10 10 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 10
H_REQ#1 H2 F4 H_RS#1 H26 AA26
REQ[1]# RS[1]# H_RS#1 10 10 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 10
H_REQ#2 K2 G3 H_RS#2 H25 U22
REQ[2]# RS[2]# H_RS#2 10 10 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 10
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 10
C H_REQ#4 L1 C
REQ[4]# H_D#16 H_D#48
HIT# G6 H_HIT# 10 N22 D[16]# D[48]# AE24
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 10 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# T0303 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 1 R23 D[19]# D[51]# AB22
ADDR GROUP 1
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 TPC26T H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
DATA GRP 1
H_A#21 U4 AD1 1 T0304 H_D#21 M24 AC26 H_D#53
A[21]# BPM[2]# D[21]# D[53]#
XDP/ITP SIGNALS
H_A#22 Y5 AC4 1 T0305
TPC26T H_D#22 L22 AD20 H_D#54
H_A#23 A[22]# BPM[3]# T0306 H_D#23 D[22]# D[54]# H_D#55
U1 A[23]# PRDY# AC2 1 TPC26T M23 D[23]# D[55]# AE22
H_A#24 R4 AC1 H_PREQ# TPC26T H_D#24 P25 AF23 H_D#56
H_A#25 A[24]# PREQ# H_TCK H_D#25 D[24]# D[56]# H_D#57
T5 A[25]# TCK AC5 P23 D[25]# D[57]# AC25
H_A#26 T3 AA6 H_TDI H_D#26 P22 AE21 H_D#58
DATA GRP 3
H_A#27 A[26]# TDI H_TDO +VCCP_CPU H_D#27 D[26]# D[58]# H_D#59
W2 A[27]# TDO AB3 T24 D[27]# D[59]# AD21
H_A#28 W5 AB5 H_TMS H_D#28 R24 AC22 H_D#60
H_A#29 A[28]# TMS H_TRST# H_D#29 D[28]# D[60]# H_D#61
Y4 A[29]# TRST# AB6 L25 D[29]# D[61]# AD23
2
H_A#30 U2 C20 H_DBR# H_D#30 T25 AF22 H_D#62 Comp0,2 connect with Zo=27.4 ohm,
H_A#31 A[30]# DBR# R0302 H_D#31 D[30]# D[62]# H_D#63 make trace length shorter than 0.5".
V4 A[31]# N25 D[31]# D[63]# AC23
H_A#32 W3 1KOhm L26 AE25 Comp 1,3 connect with Z0=55 ohm,
A[32]# 10 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 10
H_A#33 AA4 THERMAL 1% M26 AF24 make trace length shorter than 0.5".
A[33]# 10 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 10
H_A#34 AB2 N24 AC20
10 H_DINV#1 H_DINV#3 10
1
H_A#35 A[34]# DINV[1]# DINV[3]#
AA3 A[35]# PROCHOT# D21 H_PROCHOT_S#
V1 A24 GTL_REF AD26 R26 H_COMP0 R0303 1 2 27.4Ohm
10 H_ADSTB#1 ADSTB[1]# THRMDA CPU_THERM_DA 50 GTLREF COMP[0]
T0307 1 B25 R0304 2 @ 1% 1 1KOhm C23 MISC U26 H_COMP1 R0307 1 2 54.9Ohm
THRMDC CPU_THERM_DC 50 TEST1 COMP[1]
2
TPC26T A6 R0306 2 @ 1% 1 1KOhm D25 AA1 H_COMP2 R0308 1 2 27.4Ohm
20 H_A20M# A20M# TEST2 COMP[2]
1
ICH
A5 C7 R0305 T0308 1 C24 Y1 H_COMP3 R0309 1 2 54.9Ohm
20 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 11,20 TEST3 COMP[3]
C4 C0301 2KOhm T0309
TPC26T 1 AF26
20 H_IGNNE# IGNNE# TEST4
T0310 1 0.1UF/10V 1% T0311
TPC26T 1 AF1 E5 H_DPRSTP# 11,20,80
2
T0312 TEST5 DPRSTP#
20 H_STPCLK# TPC26T D5 TPC26T 1 A26 B5 H_DPSLP# 20
1
STPCLK# TEST6 DPSLP#
20 H_INTR C6 LINT0 H CLK TPC26T DPWR# D24 H_DPWR# 10
B 20 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 29 29 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 20 B
20 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 29 29 CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 10
29 CPU_BSEL2 C21 BSEL[2] PSI# AE6 PM_PSI# 80
T0313 1 M4 1
T0314 RSVD1 Zo=55 ohm, 0.5" max SOCKET478B T0315
TPC26T 1 N5 RSVD2 1
T0316
TPC26T 1 T2 for GTLREF 1 T0317
TPC26T
T0318 RSVD3 T0319
TPC26T 1 V3 RSVD4 TPC26T
RESERVED
T0320
TPC26T 1 B2 TPC26T
T0321 RSVD5
TPC26T 1 C3 RSVD6
T0322
TPC26T 1 D2
T0323 RSVD7
TPC26T 1 D22 RSVD8
T0324
TPC26T 1 D3
T0325 RSVD9
TPC26T 1 F6 RSVD10
TPC26T Default Strapping When Not Used +VCCP_CPU
SOCKET478B +VCCP_CPU
XDP_BPM#1 R0311 1 @ 2 54.9Ohm 1% R0312
H_PREQ# R0310 1 2 54.9Ohm 1%
H_TDI R0313 150Ohm 1% 68Ohm
1 2
H_TDO R0315 1 @ 2 54.9Ohm 1%
H_TMS R0314 1 2 39Ohm 5%
H_PROCHOT_S#
H_DBR# R0316 1 @ 2 1KOhm1% +3VS 3
D Q0301
H_TCK R0318 1 2 27.4Ohm 1%
H_TRST# R0317 1 2649Ohm
1
THRO_CPU 30
G
S 2
A GND 2N7002 A
Title : MEROM CPU (1)
ASUSTeK COMPUTER INC Engineer:
Size Project Name Rev
Custom A8ES 1.0
Date: Tuesday, January 30, 2007 Sheet 3 of 94
5 4 3 2 1
5 4 3 2