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T76S: MEROM/965-PM/ICH8-M/NB8M-SE BLOCK DIAGRAM
CLOCK GEN.
ICS9LPR363CGLF-T
GDDR2 Merom PAGE 21
D D
VRAM*4(16X16) 478B uFCPGA
84 FBGA FAN + Thermal sensor
PAGE 51
PAGE 3,4,5 PAGE 36
FSB 800 MHz
LVDS
PAGE 34
nVIDIA POWER
CRT NB8M-SE
PAGE 35 533 BGA PCIE * 16 CRESTLINE DDR2 667MHz DDR-II VCORE
PAGE 80
PAGE 49~54
965PM SO-DIMM SYSTEM
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TV OUT 1466 FCBGA PAGE 6,7,8,9
PAGE 81
PAGE 35
PAGE 10~15
1.5VS,1.05VS
DMI *4 GigaLAN LAN IO
ALAZIA RTL8111B
PAGE 82
PAGE 24 PAGE 25
C MDC DDR&VTT C
PAGE 25 PAGE 83
PCIE *1
MiniCard +1.25VS&2.5VS
AUDIO BOARD Azalia ICH8-M WLAN PAGE 39 PAGE 84
652 BGA
ALC660D VGACore&+1.25VO
PAGE 26
PCI Express Card
PAGE 85
LPC PAGE 33
SHUTDOWN#
MIC PREAMP AUDIO_AMP 1394
SPDIF PAGE 16~20 PAGE 87
& INT MIC & INT SPK CardBus PAGE 31
JACK
CHARGER
PAGE 27 PAGE 28 PAGE 29 RICOH R5C833 Card
PAGE 30,31 PAGE 88
Reader
PAGE 32
DETECT
TPM
SATA Bus
PAGE 90
IDE Bus
BT
PAGE 45
PAGE 44
LOAD SWITCH
B B
PAGE 91
USB2.0 Bus
T/P CMOS PROTECT
PAGE 23
KBC PAGE 48 PAGE 92
8511 POWER SIGNAL
FWH SATA USB * PAGE 93
PAGE 23 PAGE 22,23
HDD 3ports FLOWCHART
PAGE 37 PAGE 38 PAGE 94
DeBug port
PATA Express Card
PAGE 42
ODD (New Card)
PAGE 37 PAGE 33
A A
LED Discharge DC/BAT Power Switch Title : BLOCK DIAGRAM
Engineer: Lorentz_Chang
Board Board ASUSTeK COMPUTER INC
Size Project Name Rev
PAGE 40 PAGE 41 PAGE 43 PAGE 48 PAGE 48 Custom T76S 2.0
Date: Tuesday, August 21, 2007 Sheet 1 of 70
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Reset
IC
PWRSW#_EC 6 Power On
D 2 SWITCH D
+5VA
AC_BAT_SYS 1 7 PM_PWRBTN#
+3VA_EC SLP_S4#
+3VA EC
To EC
+3VA_EC 5 PM_RSMRST# ICH8
IT8511E SLP_S3#
3 VSUS_ON
VRMPWRGD
EC_CLK_EN
CL_PWROK
13 PWROK
+3VSUS 4 VSUS_GD#
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+5VSUS
SUSB_ON
SUSC_ON
+12VSUS
PLT_RST#
H_PWRGD
8 16
ALL_SYSTEM_PWRGD
16
C C
SUSC_ON
+1.8V
+3V
+5V
+12V 17
CPU_PWRGD
H_CPURST#
10 15 965PM Merom
CL_PWROK
ICH8_PWROK
PWROK
12
+0.9VS
+1.5VS 14
+1.25VS
CLK_PWRGD
+2.5VS CLK
9 +3VS Gen.
B B
+5VS CLK_PWRGD asserted when both
SUSB_ON
+12VS PM_SUSB# and VRM_PWRGD are
high.
Delay 11 CPU_VRON Power On Sequence
99ms
+VCORE
1 17
A A
Title : PowerOn sequence
ASUSTeK COMPUTER INC Engineer: Lorentz_Chang
Size Project Name Rev
Custom T76S 2.0
Date: Tuesday, August 21, 2007 Sheet 2 of 70
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H_D#[63:0]
10 H_D#[63:0]
H_A#[35:3]
10 H_A#[35:3]
T6300
D H_REQ#[4:0] T6301 D
10 H_REQ#[4:0]
1
1
U43A U43B
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 10 D[0]# D[32]#
ADDR GROUP 0
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 10 D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 10 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
A[6]# D[3]# D[35]#
DATA GRP 0
DATA GRP 0
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A[7]# DEFER# H_DEFER# 10 D[4]# D[36]#
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 10 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 10 D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40
P5 A[11]# BR0# F1 H_BREQ#0 10 K24 D[8]# D[40]# Y25
DATA GRP 2
H_A#12 P2 +VCCP H_D#9 G24 W22 H_D#41
A[12]# D[9]# D[41]#
CONTROL
H_A#13 L2 D20 H_IERR# R1023 56Ohm H_D#10 J24 Y23 H_D#42
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
P4 A[14]# INIT# B3 H_INIT# 16 J23 D[11]# D[43]# W24
H_A#15 P1 H_D#12 H22 W25 H_D#44
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H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 10 F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
10 H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
C1 H_D#15 H23 AB25 H_D#47
RESET# H_CPURST# 10 D[15]# D[47]#
H_REQ#0 K3 F3 H_RS#0 J26 Y26
REQ[0]# RS[0]# H_RS#0 10 10 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 10
H_REQ#1 H2 F4 H_RS#1 H26 AA26
REQ[1]# RS[1]# H_RS#1 10 10 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 10
H_REQ#2 K2 G3 H_RS#2 H25 U22
REQ[2]# RS[2]# H_RS#2 10 10 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 10
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 10
H_REQ#4 L1 REQ[4]# H_D#16 H_D#48
HIT# G6 H_HIT# 10 N22 D[16]# D[48]# AE24
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 10 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
C H_A#19 A[18]# T6344 H_D#19 D[18]# D[50]# H_D#51 C
R3 A[19]# BPM[0]# AD4 1 R23 D[19]# D[51]# AB22
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
DATA GRP 1
DATA GRP 1
H_A#21 U4 AD1 1 T6345 H_D#21 M24 AC26 H_D#53
A[21]# BPM[2]# D[21]# D[53]#
XDP/ITP SIGNALS
H_A#22 Y5 AC4 1 T6346 H_D#22 L22 AD20 H_D#54
H_A#23 A[22]# BPM[3]# T6347 H_D#23 D[22]# D[54]# H_D#55
U1 A[23]# PRDY# AC2 1 M23 D[23]# D[55]# AE22
H_A#24 R4 AC1 H_PREQ# H_D#24 P25 AF23 H_D#56
H_A#25 A[24]# PREQ# H_TCK H_D#25 D[24]# D[56]# H_D#57
T5 A[25]# TCK AC5 P23 D[25]# D[57]# AC25
H_A#26 T3 AA6 H_TDI H_D#26 P22 AE21 H_D#58
DATA GRP 3
H_A#27 A[26]# TDI H_TDO +VCCP H_D#27 D[26]# D[58]# H_D#59
W2 A[27]# TDO AB3 T24 D[27]# D[59]# AD21
H_A#28 W5 AB5 H_TMS H_D#28 R24 AC22 H_D#60
H_A#29 A[28]# TMS H_TRST# H_D#29 D[28]# D[60]# H_D#61
Y4 A[29]# TRST# AB6 L25 D[29]# D[61]# AD23
2
H_A#30 U2 C20 H_DBR# H_D#30 T25 AF22 H_D#62 Comp0,2 connect with Zo=27.4 ohm,
H_A#31 A[30]# DBR# R1038 H_D#31 D[30]# D[62]# H_D#63 make trace length shorter than 0.5".
V4 A[31]# N25 D[31]# D[63]# AC23
H_A#32 W3 1KOhm L26 AE25 Comp 1,3 connect with Z0=55 ohm,
A[32]# 10 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 10
H_A#33 AA4 THERMAL 1% M26 AF24 make trace length shorter than 0.5".
A[33]# 10 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 10
H_A#34 AB2 N24 AC20
10 H_DINV#1 H_DINV#3 10
1
H_A#35 A[34]# DINV[1]# DINV[3]#
AA3 A[35]# PROCHOT# D21 H_PROCHOT_S#
V1 A24 GTL_REF AD26 R26 H_COMP0 R1032 1 2 27.4Ohm 1%
10 H_ADSTB#1 ADSTB[1]# THRMDA CPU_THERM_DA 36 GTLREF COMP[0]
T6320 1 B25 R6806 2 @ 1% 1 1KOhm C23 MISC U26 H_COMP1 R1033 1 2 54.9Ohm 1%
THRMDC CPU_THERM_DC 36 TEST1 COMP[1]
2
A6 R6807 2 @ 1% 1 1KOhm D25 AA1 H_COMP2 R1034 1 2 27.4Ohm 1%
GND
16 H_A20M# A20M# TEST2 COMP[2]
1
ICH
A5 C7 R1039 T6172 1 C24 Y1 H_COMP3 R1036 1 2 54.9Ohm 1%
16 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 11,16 TEST3 COMP[3]
C4 C7353 2KOhm T6173 1 AF26
16 H_IGNNE# IGNNE# TEST4
T6321 1 0.1UF/10V 1% T6174 1 AF1 E5 H_DPRSTP# 11,16,56
2
T6175 TEST5 DPRSTP#
16 H_STPCLK# D5 1 A26 B5 H_DPSLP# 16
1
STPCLK# TEST6 DPSLP#
16 H_INTR C6 LINT0 H CLK GND GND GND
DPWR# D24 H_DPWR# 10
16 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 21 21 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 16
16 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 21 21 CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 10
21 CPU_BSEL2 C21 BSEL[2] PSI# AE6 PM_PSI# 56
T6176 1 M4 1
T6177 RSVD1 Zo=55 ohm, 0.5" max SOCKET478B T369
1 N5 RSVD2 1
T6178 1 T2 for GTLREF 1 T368
T6179 RSVD3 T370
1 V3 RSVD4
RESERVED
B T6180 1 B2 B
T6181 RSVD5
1 C3 RSVD6
T6182 1 D2
T6183 RSVD7
1 D22 RSVD8
T6184 1 D3
T6185 RSVD9
1 F6 RSVD10
Default Strapping When Not Used +VCCP
SOCKET478B +VCCP