Text preview for : MS-6721.PDF part of Microstar MS-6721 Microstar MS-6721.PDF
Back to : MS-6721.PDF | Home
Cover Sheet
Block Diagram
1
2
MS6721 VERSION:100
SIS 650GL CHIPSET
MAIN CLOCK GEN & DDR CLOCK BUFFER 3 Willamette/Northwood 478pin mPGA-B Processor Schematics
mPGA478-B INTEL CPU Sockets 4-5
SIS 650GL NORTH BRIDGE 6-9
DIMM SLOT 10 CPU:
Willamette/Northwood mPGA-478B Processor
AUDIO CODEC 11
SIS 962L SOUTH BRIDGE 12 - 14
System Brookdale Chipset:
LAN CONTROLLER (RTL8201BL MII PHY) 15
SIS 650GL (North Bridge) + 962L (South Bridge)
PCI SLOTS ( PCI 1-3 ) 16
KB/MS Connector & FAN Connector 17 On Board Chipset:
IDE Connectors 18 LPC Super I/O -- W83697HF
USB Connector 19 RTL8201BL MII PHY
ATX POWER Connector & VGA Connector 20
Expansion Slots:
LPC I/O(W83697HF) & BIOS 21
PCI2.2 SLOT* 3
PARALLEL & SERIAL PORTS 22
VRM 9.0 (INTERSIL HIP6302) 23 AC'97 Codec :
MS-5 ACPI CONTROLLER 24 Realtek ALC101
Decoupling Capacitor 25
FRONT PANEL 26
MANUAL PARTS 27
Micro Star Restricted Secret
Title Rev
BLOCK DIAGRAM
Document Number 100
MS-6721
MICRO-STAR INT'L CO.,LTD. L a s t Revision Date:
T u e s d a y , October 15, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 1 of 27
GPIO Table on SIS962L
GPIO_0 I/O MAIN Flash Rom protection H: Disable, L: Enable
System Block Diagram GPIO_1 I/O MAIN Pull-Down
GPIO_2 I/O MAIN THERM#
GPIO_3 I/O MAIN EXTSMI#
GPIO_4 I/O MAIN Pull-Down
GPIO_5 I/O MAIN RESERVED
SOCKET 478 GPIO_6 I/O MAIN RESERVED
GPIO_7 I/O AUX RESERVED
GPIO_8 I/O AUX RESERVED
Host Bus GPIO_9 I/O AUX RESERVED
GPIO_10 I/O AUX RESERVED
GPIO_11 I/O AUX Pull-Down(for SIS962L)
VGA CONNECTOR GPIO_12 I/O AUX Pull-Up
SDRAM DIMM
VGA CON. GPIO_13 I/O AUX RESERVED
SIS 650GL DIMM1 DIMM2
GPIO_14 I/O AUX Pull-Down
GPIO_15 I/O AUX KBDAT
GPIO_16 I/O AUX KBCLK
GPIO_17 I/O AUX MSDAT
GPIO_18 I/O AUX MSCLK
Hyper ZIP
GPIO_19 I/O AUX SMBCLK
GPIO_20 I/O AUX SMBDAT
GPIO_21 I AUX EESK
GPIO_22 I AUX EEDI
AC'97 GPIO_23 I AUX DDEO
PCI slot3 PCI slot2 PCI slot1 AUDIO CODEC GPIO_24 I AUX EECS
SIS 962L
IDE 2 IDE 1
PCI Routing
Lan
DEVICES INT# IDSEL REQ#/GNT# CLOCK
INT#B PREQ#0
KEYBOARD PS/2 PCI SLOT 2 INT#C AD17 PCICLK0
/MOUSE LPC BUS INT#D PGNT#0
INT#A
USB 0 USB 3 INT#C PREQ#1
PCI SLOT 3 INT#D AD18 PCICLK1
INT#A PGNT#1
USB 1 USB 4 INT#B
INT#D PREQ#2
PCI SLOT 1 INT#A AD19 PCICLK2
H/W MONITOR INT#B PGNT#2
LEGACY INT#C
ROM LPC SUPER I/O
GPIOS GAME/MIDI COM PRINTER FLOPPY
Micro Star Restricted Secret
Title Rev
BLOCK DIAGRAM
Document Number 100
MS-6721
MICRO-STAR INT'L CO.,LTD. L a s t Revision Date:
T u e s d a y , October 15, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 2 of 27
VCC3
VCC3
Main Clock Generator
C124
CB96
4.7U/0805 CPUCLK0 R171 49.9
L42 CP35 X_0.1u CPUCLK-0 R172 49.9
X_COPPER
CPUCLK1 R173 49.9
X_80_0805 CPUCLK-1 R174 49.9
U13
REALTEK/RTM360-645R
SDCLK C144 X_10p
1
11 VDDREF
13 VDDZ AGPCLK0 C141 X_10p
19 VDDPCI
CB115 CB98 CB107 CB102 CB99 CB100 CB103 CB116 28 VDDPCI
C140 29 VDD48
42 VDDAGP
4.7U/0805 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 48 VDDCPU 40 R186 CPUCLK1 ZCLK0 C172 X_10p
33 CPUCLK1 6
VDDSD CPUCLK0 39 R182 CPUCLK-1
33 CPUCLK-1 6
12 CPUCLK#0 ZCLK1 C173 X_10p
45 PCI_STOP# 44 R184 33 CPUCLK0
CPU_STOP# CPUCLK1 43 R185 CPUCLK-0 CPUCLK0 4
33 CPUCLK-0 4
CPUCLK#1
5 47 R183 22 SDCLK
VSSREF SDCLK SDCLK 7
8
18 VSSZ 31 R187 33 AGPCLK0 PCICLK3 C158 X_10p
VSSPCI AGPCLK0 AGPCLK0 6
24
VSSPCI AGPCLK1
30 MULTISEL internal Pull-Up 120K
25
32 VSS48 9 R218 ZCLK0 CN9
22 ZCLK0 8
41 VSSAGP ZCLK0 10 R219 22 ZCLK1 PCICLK2 1 2
46 VSSCPU ZCLK1 ZCLK1 12 3 4
PCICLK1
VSSSD 14 FS3 RN26 7 8 8P4R-33 96XPCLK MULTISEL R180 X_4.7K SIOPCLK 5 6
PCICLK_F0/FS3 96XPCLK 12
VCC3 VCC3 15 FS4 5 6 SIOPCLK 96XPCLK 7 8
PCICLK_F1/FS4 SIOPCLK 21
16 3 4 PCICLK1
PCICLK0 PCICLK1 16
17 1 2 PCICLK2 X_8P4C_10p
PCICLK1 20 PCICLK2 16
R155 R157 PCICLK2 21 R217 33 PCICLK3 16
10K 10K PCICLK3 22 CN10
PCICLK4 23 REFCLK2 1 2
NPN-MBT3904LT1-S-SOT23 PCICLK5 APICCLK 3 4
33 2 FS0 RN27 7 8 8P4R-33 REFCLK0 REFCLK1 5 6
VCCP PD#/VTT_PWRGD REF0/FS0 3 FS1 5 6 REFCLK1 REFCLK0 8 REFCLK0 7 8
REF1/FS1 REFCLK1 13
R154 4 FS2 3 4 APICCLK
REF2/FS2 APICCLK 13
Q21 Q20 R170 475 38 1 2 REFCLK2 8P4C_10p
IREF REFCLK2 11
27
10K 48M 26
D13 24_48M/MULTISEL R188 UCLK48M UCLK48M C142 10p
22 UCLK48M 14
C A C130 NPN-MBT3904LT1-S-SOT23 MULTISEL R189 22 SIO48M
SIO48M 21
SIO48M C143 10p
10p
CP37 X_COPPER 35 SMBCLK
SCLK 34 SMBCLK 10,13,24
X_1N4148-S-LL34-75V VCC3 SMBDAT
SDATA SMBDAT 10,13,24
L43
36
X_80_0805 VDDA
VCC3
F0~F4 internal Pull-Down 120K
CB2 CB104 CB101
0.1u 0.1u 102P BSEL0 4
R222 4.7K FS0
37
VSSA R227 X_10K FS2
X_2.7K R221
XOUT
R226 X_2.7K R228 X_10K FS4
XIN
6
7
SDCLK0 C68 X_10p
FS4 FS3 FS2 FS1 FS0 CPU SDRAM ZCLK AGP PCI
CP10 X_COPPER Y2 SDCLK1 C69 X_10p
0 0 0 0 1 100 100 66 66 33
VCC3 SDCLK2 C70 X_10p
L20
14M-16pf-HC49S-D 1 0 1 0 1 133 100 66 66 33
CBVDD SDCLK3 C71 X_10p
C155 C150
X_80_0805
16p 16p
CB48 CB47 CB42 C63 CB46 CB50
0.1u 0.1u 0.1u
0.1u 0.1u 4.7U/0805 CBVDD
SDCLK4 C60 X_10p
Clock Buffer (DDR)
SDCLK5 C61 X_10p
12
23
U7
3
SDCLK6 C53 X_10p
RN15 10
VDD
VDD
VDD
CP12 X_COPPER 1 7 8 SDCLK0 SDCLK7 C55 X_10p
SDR00/DDR0C 2 5 6 SDCLK1 SDCLK0 10
SDR01/DDR0T SDCLK1 10
10 4 3 4 SDCLK2
VCC3 VDD_CORE SDR02/DDR1T SDCLK2 10
5 1 2 SDCLK3
SDR03/DDR1C SDCLK3 10
L21 X_80_0805 C67 CB52 CB51 13 7 8 SDCLK5 SDCLKI C229 X_10p
11 SDR04/DDR2T 14 5 6 SDCLK5 10
SDCLK4
4.7U/0805 0.1u X_0.01u GND_CORE SDR05/DDR2C 16 3 4 SDCLK7 SDCLK4 10
SDR06/DDR3C SDCLK7 10
17 1 2 SDCLK6
SDR07/DDR3T SDCLK6 10
8 24
BUF_IN SDR08/DDR4T 25 RN11 10
FWDSDCLKO SDR09/DDR4C 26
7 FWDSDCLKO SMBCLK R75 10 7 SDR10/DDR5T 27 R69 10 SDCLKI
SCLK SDR11/DDR5C SDCLKI 7
SMBDAT R70 10 22
SDATA
9 R76 2.7K
21 SEL SDR/DDR VCC3
R71 X_2.7K
VCC3 Hi:ID=6D SEL D6/D2 Hi:SDR
Lo:ID=2D(internal pull-down 150K) Lo:DDR(internal pull-down 150K)
20
FB_IN FB_OUT
19 Micro Star Restricted Secret
18 FB_OUT Title Rev
CLK_IN
FB_OUT2 R73 22
GND
CLOCK GEN & DDR CLOCK BUFFER
VDD
C52
Document Number 100
RTM680-627 10p MS-6721
15
28
6
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Thursday, October 17, 2002
N o . 6 9 , Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 3 of 27
CPU SIGNAL BLOCK
CPU GTL REFERNCE VOLTAGE BLOCK
6 HA#[3..31] VCCP
VID[0..4] 23 Length < 1.5inch. R38
HA#31
HA#21
HA#11
0
9
8
7
6
5
4
3
2
0
9
8
7
6
5
4
3
2
0
HA#3
HA#2
HA#2
HA#2
HA#2
HA#2
HA#2
HA#2
HA#2
HA#2
HA#1
HA#1
HA#1
HA#1
HA#1
HA#1
HA#1
HA#1
HA#1
HA#9
HA#8
HA#7
HA#6
HA#4
HA#3
5
2/3*Vccp 49.9RST
HA#
VID2
VID1
VID0
VID3
VID4
GTLREF1
C32 C37 C27 R39
AD26
AC26
AE25
AB1
AE1
AE2
AE3
AE4
AE5
W2
W1
M1
M4
M3
M6