Text preview for : Gateway MX6128-MX6650-MX6635b (Quanta MA2A) REV_5F3C.rar part of Gateway Gateway MX6128-MX6650-MX6635b (Quanta MA2A) REV 5F3C Gateway Gateway MX6128-MX6650-MX6635b (Quanta MA2A) REV_5F3C.rar



Back to : Gateway MX6128-MX6650-MX6 | Home

5 4 3 2 1


Model NT2 M/B BOARD
MODEL REV CHANGE LIST
Page FM TO
MA2A M/B 1 3A
3A E200505-0479 2 3A
3B E200505-3796 3 3A
D
4 3A D
5 3A
3C E200507-2695 6 3A
7 3A
8 3A
9 3A
10 3A
11 3A
12 3B
13 3A
14 3A
15 3A
16 3A
17 3A 3C
18 3A 3C
C 19 3A C

20 3A
21 3A
22 3A
23 3A
24 3A
25 3A 3C
26 3B
27 3A
28 3A
29 3B
30 3B
31 3A
32 3A
33 3A
B
34 3A B


35 3A
36 3A
37 3A
38 3A 3C
39 3A




A A




PROJECT:MA2A PCBA NO. 31MA2MB0044 REV:3C DOC. NO: 204
Quanta Computer Inc.
APPROVED BY :Ashen CHECK BY:Bryan Huang DRAWING BY:Bryan Huang DATE :08/19/2005 SHEET 1
5 4 3 2 1
5 4 3 2 1




MAX1845 ( 1.5V & 1.8V )
P34
MA2A SYSTEM BLOCK DIAGRAM X'TAL
14.318M

SC1470 ( VCCP1.05V )
CPU Thermal CK-GEN
P35
Intel Dothan Processor Sensor CK410M
D P3 +3V ICS954206 P2 D
VCC_CORE +5V
SC1470 ( VGA_CORE )
P36
GMCH_VTT
VCCA 478 uFCPGA P3,4


MAX1999 ( 3VPCU & 5VPCU) VIDEO RAM
P37 FSB +2.5V P14,15
533/400MHz

MAX1907 ( CPU_CORE )
P38 VIN LCD/INV
DDR II Alviso-PM/GM ATI +5V
+3V CONN P16
SODIMM0 M22/M24/M26
DISCHARGE Dual Channel DDR GMCH PCI-EXPRESS 708 PCBGA
P39 1.8VSUS
82875GM/GME
CRT
SMDDR_VTERM

DDR II
GMCH_VTT VGA_CORE +5V
1.8VSUS VGA1.2V +2.5V P17
SODIMM1
+1.5V
+2.5V 1257 PCBGA +1.8V
VDD_MEM
+3V P5,6,7,8,9 +2.5V
+3V
C P10 C
P11,12,13
S-VIDEO
P17
SATA 0
X'TAL
32.768K FOR Alviso-G (LCD/CRT/S-VIDEO)

DMI interface
HDD (PATA OR SATA) Master PATA
+5V
P22
SATA

BAYVCC P22
Slave ICH6-M PCI Bus interface

ODD USB 2.0 +3V
3VSUS
+2.5V
+1.5V
1.5VSUS 609 BGA
USB Port 0 ~ 3 VCCRTC
GMCH_VTT P18,19,20 TYPE III TI PCI7411 Marvell
5VSUS P21
LPC
MINI-PCI 288 PBGA 88E8036/88E8053 LAN
B AC'97
Socket X'TAL ( PCMCIA+1394 X'TAL
B



USB 2.0 INTB/C
REQ1
24.576M
+Cardreader ) 25M
INTD
REQ2
EC/KBC GNT1 +3V INTA/B/C GNT2
CODEC MODEM DAA
+3V AD20 3VSUS REQ0 LANVCC AD16
Line-in 3VSUS 5VSUS GNT0 LANVCC18
TO Port
CONEXANT
CONEXANT PC97551 5VSUS P28 +1.5V AD25 P31, 32 LANVCC10 P29, 30
Replicator 20493-21 3VPCU IEEE 1394
+5V +3V
20468-31 +3V VCCRTC PORT B
P25
X'TAL
4 in 1 Cardreader
+5V 3VSUS P23
+3V P23 TO Port
32.768K
WIRE Replicator Socket RJ45
P32
Finger BIOS
P30
AMP RJ11 3VPCU
Printer
5VSUS
P25 CARDBUS
MAX9755 P30 P26
P24 IEEE 1394 Slot P31
TOUCHPAD+5V PORT A
P26
A
1394 A

MIC IN Conn.
HeadPhone INT. SPEAKER Keyboard
JACK P33
P26
P24 P24 P24 PROJECT : MA2A
Quanta Computer Inc.
Size Document Number Rev
Custom Block Diagram 3A

Date: Thursday, March 17, 2005 Sheet 1 of 39
5 4 3 2 1
5 4 3 2 1


(3,8,10,11,12,13,16,17,18,19,20,22,25,26,28,34,35,36,37,39) +3V
(3,4,5,6,8,9,18,20,34,39) VCCP
L30
+3V CLKVDD
ACB2012L-120
120 [email protected] Place these termination to close CK410M.
C619 C622 C620 C621 C340 CLK_VDDA
0.047U 0.047U 0.047U 0.047U 0.047U C369
CG_XIN




2
27P




37


38
R131 2.2 Y1 U12
CLK_VDDA 14.318MHZ 50 52 14M_REF R159 12.1/F




VDDA


VSSA
XTAL_IN REF 14M_ICH (19)
D C370 D




1
CG_XOUT 49 44 RHCLK_CPU RP22 1 2 33X2 HCLK_CPU (3)
C327 C309 C322 XTAL_OUT CPU0 RHCLK_CPU#
CPU0# 43 3 4 HCLK_CPU# (3)
0.047U 4.7U/10V 0.01U 27P RP18 33X2 RP23 49.9/FX2
(37) CLK_EN# CLK_EN# 10 41 RHCLK_MCH 1 2 HCLK_MCH (5) HCLK_CPU 1 2
STP_PCI# VTT_PWRGD#/PD CPU1 RHCLK_MCH# HCLK_CPU#
(19) STP_PCI# 55 PCI_STOP# CPU1# 40 3 4 HCLK_MCH# (5) 3 4
(19,37) STP_CPU# STP_CPU# 54 RP20 49.9/FX2
L19 CPU_STOP# HCLK_MCH
CPU2_ITP/SRC7 36 1 2
CLKVDD1 35 HCLK_MCH# 3 4
+3V CPU2#_ITP/SRC7#
ACB2012L-120
120 [email protected] CGCLK_SMB 46 CK-410M 33
C611 C608 C368 CGDAT_SMB SCLK SRC6
47 SDATA SRC6# 32
0.047U 0.047U 4.7U/10V (31) CLK48_7411 R146 15 RP77 33X2
(19) CLK48_USB R143 15 CG_BSEL0 12 31 RSRC_LAN 1 2 +LANCLK (29)
CG_BSEL1 FSA/USB_48 SRC5 RSRC_LAN#
16 FSB/TEST_MODE SRC5# 30 3 4 -LANCLK (29)
CG_BSEL2 R352 4.7K FSC_BSEL2 53 RP8 33X2 RP78 49.9/FX2
FSC/TEST_SEL RSRC_MCH +LANCLK
SRC4 26 3 4 SRC_MCH (6) 1 2
R345 2.2 CLK_VDDREF 48 27 RSRC_MCH# 1 2 SRC_MCH# (6) -LANCLK 3 4
CLK_VDD48 CLKVDD VDD_REF SRC4# RP9 33X2 RP58 49.9/FX2
42 VDD_CPU
24 RSRC_SATA 3 4 SRC_SATA (18) SRC_MCH# 1 2
CLKVDD1 SRC3 RSRC_SATA# SRC_MCH
1 VDD_PCI_1 SRC3# 25 1 2 SRC_SATA# (18) 3 4
C617 C618 7 RP10 33X2 RP57 49.9/FX2
0.047U 4.7U/10V VDD_PCI_2 RSRC_ICH SRC_SATA#
SRC2 22 3 4 SRC_ICH (19) 1 2
CLKVDD 21 23 RSRC_ICH# 1 2 SRC_ICH# (19) SRC_SATA 3 4
VDD_SRC0 SRC2# RP11 33X2 RP56 49.9/FX2
28 VDD_SRC1
34 19 RSRC_PEG 3 4 SRC_PEG (11) SRC_ICH# 1 2
VDD_SRC2 SRC1 RSRC_PEG# SRC_ICH
SRC1# 20 1 2 SRC_PEG# (11) 3 4
R150 1 CLK_VDD48 11 RP19 33X2 RP55 49.9/FX2
CLK_VDDREF VDD_48 RDREFSSCLK SRC_PEG#
C SRC0 17 3 4 DREFSSCLK (5) 1 2 C
Iref=5mA, R138 475/F IREF 39 18 RDREFSSCLK# 1 2 SRC_PEG 3 4
IREF SRC0# DREFSSCLK# (5)
RP54 49.9/FX2
C348 Ioh=4*Iref 5 R_PCLK_591 R155 33 PCLK_591 (25) DREFSSCLK# 1 2
0.047U PCI5 R_PCLK_7411 R158 33 DREFSSCLK
PCI4 4 PCLK_7411 (31) 3 4
RP21 3




GND_PCI_1
GND_PCI_2
PCI3 T130




GND_SRC
GND_CPU
DOT96 R_DOT96 R_PCLK_MINI R161 33 RP53 49.9/FX2




GND_REF
(5) DOT96 1 2 14 DOT96 PCI2 56 PCLK_MINI (28)




GND_48
(5) DOT96# DOT96# 3 4 R_DOT96# 15 9 R_PCLK_LAN R149 33 PCLK_LAN DOT96# 1 2
DOT96# PCIF1 R_PCLK_ICH R152 33 DOT96
PCIF0/ITP_EN 8 PCLK_ICH (18) 3 4
33X2
FSC FSB FSA CPU SRC PCI CK-410M
rev:E changepin
3 &pin 8




13
51
2
6
29
45
1 0 1 100 100 33 Place these termination to close CK410M.
ICS954206 250mA ( MAX. )
0 0 1 133 100 33 Default
0 1 1 166 100 33 R_PCLK_LAN R151 10K
+3V
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33
1 1 0 400 100 33 ( 48 MHz )
1 1 1 RESERVED +3V CLK48_USB C338 *10P

CLK48_7411 C346 *10P
B B



Q21 R184 R191
( 33 MHz )




2
+3V VCCP 2N7002E 10K 10K

3 1 CGDAT_SMB PCLK_LAN C616 *10P
(10,19,29) PDAT_SMB
PCLK_MINI C361 *10P
R135 R349 R351
10K *1K *1K PCLK_ICH C607 *10P

+3V PCLK_7411 C609 *10P
CG_BSEL0
Q22 PCLK_591 C613 *10P




2
2N7002E

R128 0 CG_BSEL1 R129 1K 3 1 CGCLK_SMB ( 14 MHz )
(3) SELPSB1_CLK MCH_BSEL1 (5) (10,19,29) PCLK_SMB



(3) SELPSB0_CLK
R122 0 CG_BSEL2 R121 1K
MCH_BSEL2 (5) These are for backdrive issue 14M_ICH C355 *10P



R136 R348 R350
*10K *0 *0

A A




PROJECT : MA2A
Quanta Computer Inc.
Size Document Number Rev
Custom CLOCK GENERATOR 3A

Date: Thursday, March 17, 2005 Sheet 2 of 39
5 4 3 2 1
A B C D E




HD#[0..63] HD#[0..63]
(5) HD#[0..63]
U46B
HA#[3..31] TP1
(5) HA#[3..31] U46A HD#0 A19 Y26 HD#32
HA#3 ADS# HD#1 D0# D32# HD#33
P4 A3# ADS# N2 ADS# (5) A25 D1# D33# AA24
HA#4 U4 L1 BNR# HD#2 A22 T25 HD#34
A4# BNR# BNR# (5) VCCP D2# D34#
HA#5 V3 J3 BPRI# HD#3 B21 U23 HD#35
A5# BPRI# BPRI# (5) D3# D35#




ADDR GROUP 0
HA#6 R3 HD#4 A24 V23 HD#36
A6# D4# D36#




DATA GRP 0
DATA GRP 2
HA#7 V2 L4 DEFER# HD#5 B26 R24 HD#37
A7# DEFER# DEFER# (5) D5# D37#
HA#8 W1 H2 DRDY#