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5 4 3 2 1




Schematics Page Index (Title / Revision / Change Date)
Page Title of Schematics Page Rev. Date Page Title of Schematics Page Rev. Date
01 Schematics Page Index 1.0 07'07'17 36 PCI (i.LINK) 2/3 1.0 07'07'17
02 Block Diagram 1.0 07'07'17 37 PCI (SD/MS-DUO) 3/3 1.0 07'07'17
03 Merom(HOST BUS) 1/3 1.0 07'07'17 38 USB2.0 1.0 07'07'17
D
04 Merom(HOST BUS) 2/3 1.0 07'07'17 39 LAN (88E8039) 1.0 07'07'17 D

05 Merom(Power/Gnd) 3/3 1.0 07'07'17 40 LAN Transformer 1.0 07'07'17
06 CLOCK GEN 1.0 07'07'17 41 Touch/Lid/LED 1.0 07'07'17
07 Crestline (HOST) 1/7 1.0 07'07'17 42 Power Bottom & USB Board 1.0 07'07'17
08 Crestline (DMI) 2/7 1.0 07'07'17 43 Power Design Diagram 1.0 07'07'17
09 Crestline (GRAPHIC) 3/7 1.0 07'07'17 44 DCIN&Charger 1.0 07'07'17
10 Crestline (DDRII) 4/7 1.0 07'07'17 45 SYS Power (+3_3V/+5V) 1.0 07'07'17
11 Crestline (POWER,VCC) 5/7 1.0 07'07'17 46 SYS Power(+1_5V/+1_05V) 1.0 07'07'17
12 Crestline (VCC CORE) 6/7 1.0 07'07'17 47 DDR2 Power(+1_8V/+0_9V) 1.0 07'07'17
13 Crestline (VSS) 7/7 1.0 07'07'17 48 CPU_Vcore---ISL6262A 1.0 07'07'17
14 DDRII(SO-DIMM_0) 1/3 1.0 07'07'17 49 Others power plane 1.0 07'07'17
15 DDRII(SO-DIMM_1) 2/3 1.0 07'07'17 50 OVP protection 1.0 07'07'17
16 DDRII(Termination) 3/3 1.0 07'07'17 51 GMCH power 1.0 07'07'17
17 CRT 1.0 07'07'17 52 HOLE 1.0 07'07'17
18 LVDS 1.0 07'07'17 53 History ( 1 ) 1.0 07'07'17
C C
19 ICH8-M( PCI/USB ) 1/5 1.0 07'07'17 54 History ( 2 ) 1.0 07'07'17
20 ICH8-M( LPC,IDE,SATA )2/5 1.0 07'07'17 55 History ( 3 ) 1.0 07'07'17
21 ICH8-M( GPIO) 3/5 1.0 07'07'17 56 History ( 4 ) 1.0 07'07'17
22 ICH8-M( POWER) 4/5 1.0 07'07'17 57 History ( 5 ) 1.0 07'07'17
23 ICH8-M( GND) 5/5 1.0 07'07'17 58
24 SATA HDD/CD-ROM 1.0 07'07'17 59
25 EC+KBC(3910) 1.0 07'07'17 60
26 Flash ROM/XBUS 1.0 07'07'17 61
27 Mini-PCIE Card 1.0 07'07'17 62
28 OIDE/MODEM 1.0 07'07'17 63
29 EXPRESS 1.0 07'07'17 64
30 AUDIO(CODEC/POWER) 1/4 1.0 07'07'17 65
31 AUDIO( AMP/HP/SPK) 2/4 1.0 07'07'17 66
32 AUDIO( EXTMIC) 3/4 1.0 07'07'17 67
B 33 AUDIO(MUTE) 4/4 1.0 07'07'17 68 B

34 FAN/Thermal-Sensor 1.0 07'07'17 69
35 PCI (PCI BUS) 1/3 1.0 07'07'17 70




M720 Main Board M/B P/N: 1P-0076102-6010(FUBAI)
1P-0076200-6010(NANYA)
1P-0076502-6010(HANSTAR)
1P-0076G00-6010(TRIPOD)
1P-1076105-6010(FUBAI) P. Leader Check by Design by
P/B P/N:
1P-1076200-6010(NANYA)
A
1P-1076505-6010(HANSTAR) A


1P-1076G00-6010(TRIPOD)
U/B P/N: 1P-1076106-6010(FUBAI) HON HAI Precision Ind. Co., Ltd.
1P-1076201-6010(NANYA) FOXCONN
Title
Index Page
CCPBG - R&D Division
1P-1076506-6010(HANSTAR)
Size Document Number Rev
1P-1076G01-6010(TRIPOD) A3 M720-1-01 1.0

Date: Wednesday, July 18, 2007 Sheet 1 of 56
5 4 3 2 1
1 2 3 4 5 6 7 8




A
M720(Crestline GM Block Diagram) A




CPU Clock Gen.
LVDS Merom X,TAL
WSXGA+ ICS9LPR358YGLFT 14.318MHZ
PAGE 18 LVDS/VGA Processor MLF64
VGA Micro-FCBGA-478 PAGE 6
D-type-15p (478 -pin socket P)
PAGE 17 SO-DIMM 0
PAGE 3~5

FSB
667 MHZ
667/800 MHZ DDR(II)
200 pin
Ext. Mic In
Jack PAGE 14
PAGE 32
North Bridge
Crestline 667 MHZ SO-DIMM 1
B
965GM 667 MHZ B

667 MHZ
HEAD DDR(II)
PHONE FCBGA-1299 200 pin
JACK ALC262 PAGE 7~13
PAGE 15
PAGE 31 TPA6019A4 Codec AZALIA
X4 DMI USB 2.0
Int. Speaker PAGE 31 PAGE 30 (Direct Media Interface) CONN.X4
1.0 Walt x 2 USB2.0 PAGE 38
PAGE 31
PCIE + USB2.0
MDC 1.5 Express Card
RJ11 Modem South Bridge C-Link1 PAGE 29
12 pin
PAGE 28 ICH8-M PCIE
33MHZ, 3.3V PCI BUS 676 mBGA Mini-Card
USB2.0
TI PCI8402ZHK PCIE PCIE
PAGE 19~23 PAGE 27
C CardReader C
MS/MS DUO
/SD i.LINK
PAGE 37 LPC
Oide
PAGE 28




IDE ATA 100




SATA 1.5Gb/s
i.LINK GHK 216 ENE KB3910SFC1
PAGE 36 PAGE 35~37
Marvell 10/100 EC+KBC
Ethernet
Netswap 88E8039 LQFP-176 BGA-169
RJ45 NS681601P
QFN-64 PAGE 25 PATA SATA
PAGE 40 PAGE 39
ODD HDD
PAGE 24 PAGE 24
XBUS




PWM SMB Channel 1

D
PS/2 SMB Channel 2 D

Thermal Sensor Thermal Sensor
Power botton G781-1P8f G751-2P1f
FAN Lid Switch&
& S1 botton & Flash BIOS BATT CONN. (CPU/GMCH) (DDR)
LED Touchpad MSOP-8 SOP-8
AV mode 1MB
PAGE 34 PAGE 41 PAGE 41 PAGE 26 PAGE 44 PAGE 34 PAGE 34 HON HAI Precision Ind. Co., Ltd.
botton &USB FOXCONN
Title Block Diagram
CCPBG - R&D Division
board
Size Document Number Rev
PAGE 42 Custom M720-1-01 1.0

Date: Wednesday, July 18, 2007 Sheet 2 of 56
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8




U24A +1_05VRUN
7 H_A#[3..35]
H_A#3 J4 H1
A[3]# ADS# H_ADS# 7




ADDR GROUP 0
H_A#4 L5 E2
A[4]# BNR# H_BNR# 7
H_A#5 L4 G5
A[5]# BPRI# H_BPRI# 7
H_A#6 K5 A[6]#




1
H_A#7 M3 H5
A[7]# DEFER# H_DEFER# 7
H_A#8 N2 F21 R44
A[8]# DRDY# H_DRDY# 7
H_A#9 J1 E1
A[9]# DBSY# H_DBSY# 7
A H_A#10 N3 56_J A
H_A#11 A[10]#
P5 F1 H_BREQ#0 7 0402




2
H_A#12 A[11]# BR0#
P2 A[12]#




CONTROL
H_A#13 L2 D20 H_IERR#
H_A#14 A[13]# IERR#
P4 A[14]# INIT# B3 H_INIT# 20
H_A#15 P1
H_A#16 A[15]#
R1 A[16]# LOCK# H4 H_LOCK# 7
7 H_ADSTB#0 M1 ADSTB[0]# H_CPURST# 7
C1 +1_05VRUN
7 H_REQ#[4..0] RESET# H_RS#[2..0] 7
H_REQ#0 K3 F3 H_RS#0
H_REQ#1 REQ[0]# RS[0]# H_RS#1
H2 REQ[1]# RS[1]# F4
H_REQ#2 K2 G3 H_RS#2
H_REQ#3 REQ[2]# RS[2]# R27 150_J 0402
J3 REQ[3]# TRDY# G2 H_TRDY# 7
H_REQ#4 L1 XDP_TDI 1 2
REQ[4]#
7 H_A#[3..35] HIT# G6 H_HIT# 7
H_A#17 Y2 E4 R26 39_D 0402
A[17]# HITM# H_HITM# 7
H_A#18 U5 XDP_TMS 1 2
H_A#19 A[18]# XDP_BPM#0
R3 A[19]# BPM[0]# AD4 1 30MIL TP12




ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 1 R17 NC_54.9_F 0402
A[20]# BPM[1]# 30MIL TP9
H_A#21 U4 AD1 XDP_BPM#2 1 XDP_BPM#5 1 2
A[21]# BPM[2]# 30MIL TP2
H_A#22 XDP_BPM#3




XDP/ITP SIGNALS
Y5 A[22]# BPM[3]# AC4 1 30MIL TP14
H_A#23 U1 AC2 XDP_BPM#4 1 R24 27_J 0402
A[23]# PRDY# 30MIL TP7
H_A#24 R4 AC1 XDP_BPM#5 XDP_TCK 1 2
H_A#25 A[24]# PREQ# XDP_TCK
T5 A[25]# TCK AC5
H_A#26 T3 AA6 XDP_TDI R31 649_F 0402
H_A#27 A[26]# TDI XDP_TRST#
Layout note: W2 A[27]# TDO AB3
+1_05VRUN
1 2
H_A#28 W5 AB5 XDP_TMS
no stub on H_STPCLK TP. H_A#29 Y4
A[28]# TMS
AB6 XDP_TRST#
H_A#30 A[29]# TRST# A0206
H_STPCLK# to be routed in daisy U2 A[30]# DBR# C20 1 30MIL TP17 Debug port not used .
B H_A#31 V4 B
chain fashion from ICH to LPC slot A[31]# resistors close to CPU.




1
H_A#32 W3
H_A#33 A[32]# R30
and then to CPU. AA4 A[33]# THERMAL
H_A#34 AB2
H_A#35 A[34]# PROCHOT# 56_J
AA3 A[35]# PROCHOT# D21
V1 A24 H_THERMDA 0402
7 H_ADSTB#1 H_THERMDA 34




2
ADSTB[1]# THERMDA H_THERMDC
THERMDC B25 H_THERMDC 34
20 H_A20M# A6 A20M#




ICH
A5 C7 PM_THRMTRIP#
20 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 8,20
20 H_IGNNE# C4 IGNNE#
R22 PM_THRMTRIP#
1 0_J 2 H_STPCLK#_R D5
20 H_STPCLK# STPCLK# should connect to
0402 C6 H CLK
20 H_INTR LINT0
20 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 6 ICH8-M and GMCH
20 H_SMI# A3 A21 CLK_CPU_BCLK# 6
SMI# BCLK[1] without T-ing (No stub)
1 TP_CPU_RSVD01 M4
TP11 30MIL RSVD[01]
1 TP_CPU_RSVD02 N5
TP15 30MIL RSVD[02]
1 TP_CPU_RSVD03 T2
TP5 30MIL RSVD[03]
1 TP_CPU_RSVD04 V3
TP8 30MIL RSVD[04]
1 TP_CPU_RSVD05 B2




RESERVED
TP3 30MIL RSVD[05]
1 TP_CPU_RSVD06 C3
TP13 30MIL RSVD[06]
1 TP_CPU_RSVD07 D2
TP4 30MIL RSVD[07]
1 TP_CPU_RSVD08 D22
TP18 30MIL RSVD[08]
1 TP_CPU_RSVD09 D3
TP10 30MIL RSVD[09]
1 TP_CPU_RSVD10 F6
TP16 30MIL RSVD[10]


C CPU SOCKET_478P C

FOX_PZ4782A-274M-01




ICH8M's GPIO12: VIL---> -0.5V ~ 0.8V
+1_05VRUN VIH---> 2.0V ~ 3.3+0.5V
MEROM's PROCHOT#: VIL---> -0.1V ~ 0.3*VCCP
VIH---> 0.7*VCCP ~ VCCP+0.1
1




+ECVCC
+3VRUN R49
When use U3, R429 and C453
1K_F need change to NC.
1




1
0402
2




R77 PROCHOT# R429
NC_S-80927CLMC-G6XT2G 47K_J
3




2
2.2K_J Q6 U3 0402
D
0402




VSS VDD
R33
2




2
4 NC
A0205 1 1 1 2
OUT ECRST# 25
3




G
S Q4 5 CD
3




Q7 2N7002EPT D
2




NC_0_J
1



C26




3
C




1
OVT_EC# 1 1 NC_470P_50V_K 0402 C453
21,25,34,48 OVT_EC# B 8,19,21,24,25,26,27,29,39 PLT_RST# G
D
E S
0402_X7R 0.1U_6.3V_K D
2




CHDTC144EUPT 2N7002EPT 0402_X5R
2




2
A0202
2




+1_05VRUN
3




Q3 HON HAI Precision Ind. Co., Ltd.
1
R28
2 1 B
C
FOXCONN
Title Merom(HOST BUS) 1/3
CCPBG - R&D Division