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5 4 3 2 1
M50Vm Montevina Block Diagram
D
Penryn D
FAN + SENSOR CPU VCORE
PAGE 50 PAGE 3,4,5 PAGE 80 SYSTEM PWR
PAGE 81
VGA Daughter BD
FSB 1066MHz CLOCK GEN BAT & CHARGER
PAGE 88
VGA VCORE ICS/9LPR363
PAGE 29
Other PWR
PAGE 82, 83, 84, 85, 90, 91, 92, 93, 94
HDMI DDR2 667/800MHz
PAGE 48 Nvidia PCI-E x16 (G)MCH Dual Channel DDR2
SO-DIMM x2
CRT & TV OUT
PAGE 45,47
NB9P-GE2 Cantiga
PAGE 7,8,9
1394
PAGE 42
LVDS & INV NB9M-GS2 PAGE 10,11,12,13,14,15 IEEE1394
PAGE 46
C RICOH R5C833 C
PAGE 67 PAGE 40,41
DMI Interface CARD READER
PAGE 42
10/100/1000 LAN PHY
PCI 33MHz RealTek RTL8111C
PAGE 33
LPC 33MHz LCI/GLCI MINICARD
Azalia ICH9-M Robson PAGE 53
DC Daughter BD
MINICARD
PCI-E Shirley/ Echo Peak
INTERNAL PAGE 20,21,22,23,24 PAGE 53 DC_IN, RJ11
KEYBOARD EC
PAGE 31
ITE/IT8512 PAGE 60
BIOS SPI ROM PAGE 30,31
PAGE 31
B
ITPM B
NewCard/DebugCard
PAGE 43,44
HP_OUT
SATA
PAGE 37
USB
MIC IN Azalia Codec
PAGE 38
Realtek/ALC663
PAGE 36, 37, 38, 39
SPDIF _OUT USB 2.0 CON x4
PAGE 37 PAGE 52
Azalia TP Daughter BD
MDC Header Fingerprint
PAGE 35
Camera USB Touchpad, Fingerprint Touchpad
SATA ODD PAGE 46
PAGE 51
A A
LED Board
PAGE 56
SATA HDD
PAGE 51
INSTANT KEY CON
PAGE 56
Fingerprint Title : Block Diagram
ESATA CON. Touchpad ASUSTeK COMPUTER INC. NB4 Engineer: Jace_Kuo
Daughter BD Bluetooth
Size Project Name Rev
PAGE 66 PAGE 56 Custom M50Vm 1.0
Date: Tuesday, April 15, 2008 Sheet 1 of 96
5 4 3 2 1
A B C D E
M50V Schematic Index
Page System page Ref. ICH9-M GPIO Use As Signal Name Power EC GPIO Use As Signal Name Power EC GPIO Use As Signal Name Power
01 Block Diagram GPIO 00 GPI PM_SYNC# +3VS GPA0 GPO PWR_LED_UP# - - -
1 02 Schematic Information GPIO 01 GPI - +3VS GPA1 GPO CHG_LED_UP# GPG6 GPO BAT2_CNT2# 1
03-05 CPU-Penryn GPIO [2:5] GPI PCI_INT[E:H]# +3VS GPA2 GPO BATSEL_3S# - - -
07-09 DDR II SO-DIMM GPIO 06 GPI SIO_SMI# +3VS GPA3 - - GPH0 OD PM_CLKRUN#
10-15 Cantiga GPIO 07 GPI WLAN_LED_ON +3VS GPA4 GPO LCD_BL_PWM GPH1 ALT -
20-24 ICH9M GPIO 08 GPI EXT_SMI# +3VSUS GPA5 GPO FAN0_PWM GPH2 ALT -
25 SPI ROM GPIO 09 GPI LAN_WOL_EN +3VSUS GPA6 GPO BAT1_CNT1# GPH3 GPO BAT_LEARN
29 CLK-ICS9LPR363CGLF-T GPIO 10 GPI SUSPWR_ACK +3VSUS GPA7 GPO BAT2_CNT1# GPH4 GPO -
30-31 EC_IT8752 GPIO 11 GPI EXT_SCI# +3VSUS GPB0 GPO CHG_EN# GPH5 GPO NUM_LED
32 POWER-ON SEQUENCE GPIO 12 GPO +3VSUS GPB1 GPO PRECHG GPH6 GPO CAP_LED
33 PCI-E LAN-RTL8111C GPIO 13 GPI +3VSUS GPB2 GPI DISTP# - - -
34 RJ45 GPIO 14 GPI AC_PRESENT +3VSUS GPB3 ALT SMB0_CLK GPI0 GPI -
35 MDC GPIO 15 Native STP_PCI# +3VSUS GPB4 ALT SMB0_DAT GPI1 GPI SUS_PWRGD
36 CODEC-ALC663 GPIO 16 Native PM_DPRSLPVR +3VS GPB5 OD A20GATE GPI2 GPI ALL_SYSTEM_PWRGD
2 37 AUDIO_AMP-G1431 GPIO 17 GPI WLAN_ON# +3VS GPB6 OD RCIN# GPI3 GPI VRM_PWRGD 2
38 FM2010 DSP GPIO 18 GPO PD_RST# +3VS GPB7 GPO PM_RSMRST# GPI4 GPI PWR_MON
39 GPIO 19 GPI - +3VS GPC0 GPI MARATHON# GPI5 GPI PD_DET#
40 CARDBUS R5C833(PCI I/F) GPIO 20 GPO - +3VS GPC1 ALT SMB1_CLK GPI6 GPI KB_ID0
41 CARDBUS R5C833(1394 & SD) GPIO 21 GPI - +3VS GPC2 ALT SMB1_DAT GPI7 GPI KB_ID1
42 4 IN1 CON GPIO 22 GPI - +3VS GPC3 GPO PM_PWRBTN# GPJ0 GPO EC_CLK_EN
43 NewCard PWR SW & CON GPIO 23 Native LPC_DRQ1# +3VS GPC4 ALT AC_IN_OC# GPJ1 GPO PM_PWROK
44 Debug GPIO 24 GPO PD_EN +3VSUS GPC5 GPO OP_SD# GPJ2 GPI UNDOCK#_PD
45 CRT GPIO 25 Native STP_CPU# +3VSUS GPC6 ALT BAT1_IN_OC# GPJ3 - -
46 LVDS & INVERTER CONNECTOR GPIO 26 Native PM_S4_STATE# +3VSUS GPC7 GPO 3G_ON# GPJ4 GPO BL_DA
47 TV OUT CONN GPIO 27 GPO BT_ON +3VSUS GPD0 GPI PWRLIMIT# GPJ5 GPO FAN_DA
50 THER SENSOR & FAN GPIO 28 GPO CB_SD# +3VSUS GPD1 ALT PM_S4_STATE# GPK0 GPI PM_SLP_M#
51 HDD & CDROM GPIO 29 Native USB_OC#5 +3VSUS GPD2 ALT BUF_PLT_RST# GPK1 GPI SUSPWR_ACK
3 3
52 USB Port x 3 GPIO 30 Native USB_OC#6 +3VSUS GPD3 OD EXT_SCI# GPK2 GPI PM_SUSC#
53 MINICARD(Ebron/Robson/3G) GPIO 31 Native USB_OC#7 +3VSUS GPD4 OD EXT_SMI# GPK3 GPI +3VM_PG
54 PORT Docking GPIO 32 GPO PM_CLKRUN# +3VS GPD5 GPO LCD_BACKOFF# GPK4 GPI +1.05VM_+3VMCLK_PG
55 Super I/O & FIR GPIO 33 GPO - +3VS GPD6 ALT FAN0_TACH GPK5 GPI LAN_WOL_EN
56 LED/TP/SW GPIO 34 GPO - +3VS GPD7 GPI COLOREN# GPL0 GPI AC_APR_UC#
57 DISCHARGE GPIO 35 GPO - +3VS GPE0 GPO VSUS_ON GPL1 GPI -
58 UMB GPIO 36 GPI EMAIL_LED# +3VS GPE1 GPO SUSC_EC# GPL2 GPO -
60 DC power jack, Batter conn. GPIO 37 GPI PCB_ID0 +3VS GPE2 GPO SUSB_EC1# GPL3 GPO LAN_RST#
61 Blue Tooth GPIO 38 GPI PCB_ID1 +3VS GPE3 GPO CPU_VRON GPL4 GPO CL_PWROK
62 TPM GPIO 39 GPI PCB_ID2 +3VS GPE4 ALT PWR_SW# GPL5 GPO EC_WLAN_PWR
65 MDC NUT & Hinksink NUT GPIO 40 Native USB_OC#1 +3VSUS GPE5 ALT BAT2_IN_OC# GPL6 GPO SLP_M_ON
66 E-SATA GPIO 41 Native USB_OC#2 +3VSUS GPE6 GPI LID_SW# GPL7 GPO S4_STATE_ON
68 XDP GPIO 42 Native USB_OC#3 +3VSUS GPE7 GPO PM_THERM# GPK6 GPO AC_PRESENT
4 4
80 POWER_VCORE GPIO 43 Native USB_OC#4 +3VSUS GPF0 GPI BLUETOOTH# GPK7 GPI PS_CPPE#
81 POWER_SYSTEM GPIO 44 Native USB_OC8# N/A GPF1 GPI WIRELESS#
82 POWER_I/O_1.5V & 1.05VM GPIO 45 Native USB_OC9# N/A GPF2 ALT PS2_CLK_5S_PD
83 POWER_I/O_DDR & VTT GPIO 46 Native USB_OC10# N/A GPF3 ALT PS2_DATA_5S_PD
84 POWER_I/O_+3VM&+2.5VS&+1.25VM GPIO 47 Native USB_OC11# N/A GPF4 ALT TP_CLK
85 NONE GPIO 48 GPI - +3VS GPF5 ALT TP_DAT
88 POWER_CHARGER GPIO 49 GPO HDTV_EN# +3VS GPF6 GPO THRO_CPU
90 POWER_DETECT GPIO 50 Native PCI_REQ#1 +3VS GPF7 GPO PS_SHDN#
91 POWER_LOAD SWITCH GPIO 51 Native +3VS GPG0 GPI INSTANT_ON#
92 POWER_PROTECT GPIO 52 Native PCI_REQ#2 +3VS GPG1 ALT PM_SUSB#
93 POWER_SIGNAL GPIO 53 Native +3VS GPG2 GPO BAT1_CNT2#
94 POWER_FLOWCHART GPIO 54 Native PCI_REQ#3 +3VS - - -
5
GPIO 55 Native +3VS - - - 5
GPIO 56 +3VSUS
GPIO 57 GPI +3VSUS
GPIO 58 GPI SPI_CS#1 +3VSUS Title : Schematic Information
GPIO 59 Native USB_OC0# +3VSUS ASUSTeK COMPUTER INC. NB6 Engineer: Raphael_Chen
Size Project Name Rev
GPIO 60 Native +3VSUS
Custom M50Vm 1.1
Date: Wednesday, February 13, 2008 Sheet 2 of 96
A B C D E
5 4 3 2 1
H_D#[63:0]
10 H_D#[63:0]
H_A#[35:3]
10 H_A#[35:3]
H_REQ#[4:0]
10 H_REQ#[4:0]
T0318
T0319
D D
1
U0301A U0301B
1
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 10 D[0]# D[32]#
ADDR GROUP 0
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 10 D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 10 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
A[6]# D[3]# D[35]#
DATA GRP 0
DATA GRP 0
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A[7]# DEFER# H_DEFER# 10 D[4]# D[36]#
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 10 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 10 D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
H_A#11 A[10]# +VCCP_CPU H_D#8 D[7]# D[39]# H_D#40
P5 A[11]# BR0# F1 H_BR0# 10 K24 D[8]# D[40]# Y25
DATA GRP 2
H_A#12 P2 H_D#9 G24 W22 H_D#41
A[12]# D[9]# D[41]#
CONTROL
H_A#13 L2 D20 H_IERR# R0309 1 2 56Ohm H_D#10 J24 Y23 H_D#42
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
P4 A[14]# INIT# B3 H_INIT# 20 J23 D[11]# D[43]# W24
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 10 F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
10 H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
C1 H_D#15 H23 AB25 H_D#47
RESET# H_CPURST# 10 D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 10 10 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 10
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 10 10 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 10
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 10 10 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 10
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 10
H_REQ#4 L1 REQ[4]# H_D#16 H_D#48
HIT# G6 H_HIT# 10 N22 D[16]# D[48]# AE24
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 10 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
ADDR GROUP 1
H_A#20 W6 AD3 H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
DATA GRP 1
C H_A#21 U4 AD1 H_D#21 M24 AC26 H_D#53 C
A[21]# BPM[2]# D[21]# D[53]#
XDP/ITP SIGNALS
H_A#22 Y5 AC4 H_D#22 L22 AD20 H_D#54
H_A#23 A[22]# BPM[3]# H_D#23 D[22]# D[54]# H_D#55
U1 A[23]# PRDY# AC2 M23 D[23]# D[55]# AE22
H_A#24 R4 AC1 H_PREQ# H_D#24 P25 AF23 H_D#56
H_A#25 A[24]# PREQ# H_TCK H_D#25 D[24]# D[56]# H_D#57
T5 A[25]# TCK AC5 P23 D[25]# D[57]# AC25
H_A#26 T3 AA6 H_TDI H_D#26 P22 AE21 H_D#58
DATA GRP 3
H_A#27 A[26]# TDI H_TDO +VCCP_CPU H_D#27 D[26]# D[58]# H_D#59
W2 A[27]# TDO AB3 T24 D[27]# D[59]# AD21
H_A#28 W5 AB5 H_TMS H_D#28 R24 AC22 H_D#60
H_A#29 A[28]# TMS H_TRST# H_D#29 D[28]# D[60]# H_D#61
Y4 A[29]# TRST# AB6 L25 D[29]# D[61]# AD23
2
H_A#30 U2 C20 H_DBR# H_D#30 T25 AF22 H_D#62
H_A#31 A[30]# DBR# R0315 H_D#31 D[30]# D[62]# H_D#63
H_A#32
V4 A[31]# 1KOhm
N25 D[31]# D[63]# AC23 Comp 0,2: Zo=27.4 Ohm, trace length < 0.5"
W3 10 H_DSTBN#1 L26 AE25 H_DSTBN#3 10
H_A#33 AA4
A[32]#
THERMAL 1%
10 H_DSTBP#1 M26
DSTBN[1]# DSTBN[3]#
AF24 H_DSTBP#3 10
Comp 1,3: Z0=55 Ohm, trace length < 0.5"
H_A#34 A[33]# DSTBP[1]# DSTBP[3]#
AB2 10 H_DINV#1 N24 AC20 H_DINV#3 10
1
H_A#35 A[34]# DINV[1]# DINV[3]#
AA3 A[35]# PROCHOT# D21 H_PROCHOT_S#
V1 A24 GTL_REF AD26 R26 H_COMP0 R0311 1 2 27.4Ohm 1%
10 H_ADSTB#1 ADSTB[1]# THRMDA CPU_THRM_DA 50 GTLREF COMP[0]
T0320 1 B25 R0317 2 @ 1% 1 1KOhm C23 MISC U26 H_COMP1 R0312 1 2 54.9Ohm 1%
THRMDC CPU_THRM_DC 50 TEST1 COMP[1]
2
A6 R0318 2 @ 1% 1 1KOhm D25 AA1 H_COMP2 R0313 1 2 27.4Ohm 1%
20 H_A20M# A20M# TEST2 COMP[2]
1
ICH
A5 C7 R0316 T0304 1 C24 Y1 H_COMP3 R0314 1 2 54.9Ohm 1%
20 H_FERR# FERR# THERMTRIP# H_THRMTRIP# 5,20,32 TEST3 COMP[3]
C4 C0301 2KOhm T0305 1 AF26
20 H_IGNNE# IGNNE# T0302 TEST4
T0321 1 0.1UF/10V 1% T0306 1 AF1 E5 H_DPRSTP# 11,20,80
2
@ T0307 TEST5 DPRSTP#
20 H_STPCLK# D5 1 A26 B5 H_DPSLP# 20
1
STPCLK# TEST6 DPSLP#
20 H_INTR C6 H CLK D24 H_DPWR# 10
1
LINT0 DPWR#
20 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 29 29 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 20
20 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 29 29 CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 10
29 CPU_BSEL2 C21 BSEL[2] PSI# AE6 PM_PSI# 80
1
M4 RSVD1
N5 Zo=55 Ohm, 0.5" max SOCKET478B
RSVD2
T2 T0303
B
V3
RSVD3 for GTL_REF BCLK FSB BSEL2 BSEL1 BSEL0 B
RSVD4
RESERVED
B2 RSVD5
T0313 1 C3 Pin B2 M4 N5 left as NC for QC 166 667 L H H
T0314 RSVD6
1 D2
GTL_REF2 D22
RSVD7 design (BPM_2# [2] BPM_2#[1] 200 800 L H L +VCCP_CPU
+VCCP_CPU
H_TDO_M
H_TDI_M
D3
F6
RSVD8