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Service Manual
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MZ-E77
SERVICE MANUAL
Ver 1.0 2000. 03
E Model Tourist Model
Photo: Silver type
US and foreign patents licensed from Dolby Laboratories Licensing Corporation.
Model Name Using Similar Mechanism MD Mechanism Type Optical Pick-up Mechanism Type
MZ-E90 MT-MZE90-166 LCX-2E
SPECIFICATIONS
System
Audio playing system MiniDisc digital audio system Laser diode properties Material: GaAlAs Wavelength: = 790 nm Emission duration: continuous Laser output: less than 44.6 µW* * This output is the value measured at a distance of 200 mm from the objective lens surface on the optical pick-up block with 7 mm aperture. Revolutions 600 rpm to 2250 rpm Error correction Advanced Cross Interleave Reed Solomon Code (ACIRC) Sampling frequency 44.1 kHz Coding Adaptive TRansform Acoustic Coding (ATRAC) Modulation system EFM (Eight to Fourteen Modulation) Number of channels 2 stereo channels 1 monaural channel Frequency response 20 to 20,000 Hz ± 3 dB Wow and Flutter Below measurable limit Outputs Headphones: stereo mini-jack, maximum output level 5 mW + 5 mW, load impedance 16 ohms
General
Power requirements Nickel metal hydride rechargeable battery NH-14WM (supplied) One LR6 (size AA) battery (not supplied) Sony AC Power Adaptor AC-E15L* (not supplied) connected to the DC IN 1.5V jack Battery operation time
Battery life*
Batteries Ni-MH rechargeable battery (NH-14WM) One LR6 (size AA) alkaline battery One LR6 (size AA) alkaline battery and a Ni-MH rechargeable battery (NH-14WM)
Playback Approx. 21 hours**
Dimensions Approx. 78.3 × 13.9 × 71.4 mm (w/h/d) (3 1/8 × 9/16 × 2 7/8 in.) not including projecting parts and controls Mass Approx. 85 g (3.0 oz.) the player only Approx. 128 g (4.5 oz.) incl. a premastered MD and a nickel metal hydride rechargeable battery NH-14WM Supplied accessories Battery Charger (1) Rechargeable battery (1) Rechargeable battery carrying case (1) Headphones with a remote control (1) Dry battery case (1) Carrying pouch (1)
Approx. 31 hours Approx. 56 hours**
Design and specifications are subject to change without notice.
* The battery life may be shorter depending on operating conditions and the temperature of the location. ** With a fully charged battery
PORTABLE MINIDISC PLAYER
TABLE OF CONTENTS 1. 2. 3. 4. 5. 6.
6-1. 6-2. 6-3. 6-4. 6-5. 6-6. 6-7. 6-8. 6-9. 6-10. 6-11. 6-12. 6-13. 6-14.
Features
· Small body almost the size of a MiniDisc jacket Ideal weight and size; fits in your shirt pocket. · Personalized sound through Digital Sound Preset functions You can store two sets of sound quality adjustments (made during playback) to two switches. · Low power-consumption design enables extended battery life. · Simple "One-Touch Eject" function for easy MiniDisc handling A single press of the OPEN button causes the player lid to open and the MiniDisc to eject. · Easy-to-operate headphones remote control with backlit LCD The LCD displays disc and track information, playback mode as well as battery condition. Keep the main unit in your pocket and operate the MiniDisc player through the "slim stick" remote control. · Shock-resistant memory offsets up to 40 seconds of optical read errors.
SERVICING NOTES ............................................... 3 GENERAL ................................................................... 4 DISASSEMBLY ......................................................... 5 TEST MODE .............................................................. 9 ELECTRICAL ADJUSTMENTS ......................... 14 DIAGRAMS
Block Diagram RF Section ......................................... Block Diagram SERVO Section ................................ Block Diagram MAIN Section .................................. Printed Wiring Board MAIN Board (Component Side) ............................... Printed Wiring Board MAIN Board (Conductor Side) ................................. Schematic Diagram MAIN Board (1/4) .................... Schematic Diagram MAIN Board (2/4) .................... Schematic Diagram MAIN Board (3/4) .................... Schematic Diagram MAIN Board (4/4) .................... Printed Wiring Board SYSTEM Board ..................... Schematic Diagram SYSTEM Board ........................ Printed Wiring Board SW Board ............................... Schematic Diagram SW Board .................................. IC Pin Function Description ........................................... 19 21 23 25 27 29 31 33 35 37 39 41 43 49
7. 8.
EXPLODED VIEWS ................................................ 56 ELECTRICAL PARTS LIST ............................... 58
SAFETY-RELATED COMPONENT WARNING!! COMPONENTS IDENTIFIED BY MARK 0 OR DOTTED LINE WITH MARK 0 ON THE SCHEMATIC DIAGRAMS AND IN THE PARTS LIST ARE CRITICAL TO SAFE OPERATION. REPLACE THESE COMPONENTS WITH SONY PARTS WHOSE PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL OR IN SUPPLEMENTS PUBLISHED BY SONY.
2
SECTION 1 SERVICING NOTES
NOTES ON HANDLING THE OPTICAL PICK-UP BLOCK OR BASE UNIT The laser diode in the optical pick-up block may suffer electrostatic break-down because of the potential difference generated by the charged electrostatic load, etc. on clothing and the human body. During repair, pay attention to electrostatic break-down and also use the procedure in the printed matter which is included in the repair parts. The flexible board is easily damaged and should be handled with care. NOTES ON LASER DIODE EMISSION CHECK Never look into the laser diode emission from right above when checking it for adjustment. It is feared that you will lose your sight. NOTES ON HANDLING THE OPTICAL PICK-UP BLOCK (LCX-2E) The laser diode in the optical pick-up block may suffer electrostatic break-down easily. When handling it, perform soldering bridge to the laser-tap on the flexible board. Also perform measures against electrostatic break-down sufficiently before the operation. The flexible board is easily damaged and should be handled with care. · When repairing this set with the power on, if you remove the upper panel assy, this set stops working. In this case, you can work without the set stopping by fastening the hook of the open/close detect switch (SW board (S809)) with tape.
SW board (S809)
· This set is designed to perform automatic adjustment for each adjustment and write its value to EEPROM. Therefore, when EEPROM (IC802) has been replaced in service, be sure to perform automatic adjustment and write resultant values to the new EEPROM. After EEPROM (IC802) is replaced, digital sound preset setting value for display is changed to "00". Please make sure to check that digital sound preset setting value for display is "01". (Refer to page 14) · Replacement of CXD2661GA-2 (IC601) and CXR701080010GA (IC801) used in this set requires a special tool. Therefore, they cannot be replaced.
laser-tap
OPTICAL PICK-UP FLEXIBLE BOARD
CAUTION Use of controls or adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure. Flexible Circuit Board Repairing · Keep the temperature of the soldering iron around 270 °C during repairing. · Do not touch the soldering iron on the same conductor of the circuit board (within 3 times). · Be careful not to apply force on the conductor when soldering or unsoldering. Notes on chip component replacement · Never reuse a disconnected chip component. · Notice that the minus side of a tantalum capacitor may be damaged by heat.
3
SECTION 2 GENERAL
LOCATION OF CONTROLS
9
8
7
6 5 4 3 2 1 qa
0
1 OPR indicator 2 HOLD switch 3 >/B and . keys 4 x key 5 DIGITAL SOUND PRESET switch 6 AVLS switch
7 Battery cover 8 VOLUME +/ keys 9 External battery terminal 0 OPEN button qa i (headphone) jack
Remote commander with headphones
5 6
7
8
4 9
3
2
1
1 Headphone 2 B > and . keys 3 VOL +/ keys 4 Display window 5 DISPLAY key 6 PLAYMODE key 7 X key 8 HOLD switch 9 x key
4
SECTION 3 DISASSEMBLY
Note: This set can be disassemble according to the following sequence.
Set Lid Assy, Upper Holder Assy Mechanism Deck (MT-MZE90-166) Service Assy, OP (LCX-2E) Panel Assy Bottom strip, ornamental "Chassis Assy, set", "Case, Battery", MAIN board, SW board
LID ASSY, UPPER
3 two screws (MI1.4) 4 lid assy, upper
3 two screws (MI1.4)
2
1
HOLDER ASSY
3 holder assy
2 shaft
1 shaft
5
MECHANISM DECK (MT-MZE90-166)
2 screw (MD)
6
9 mechanism deck (MT-MZE90-166)
1 seal (moire) 4
3 claw 5 claw
5 claw 8 flexible board (CN551) 7 flexible board (CN501)
PANEL ASSY, BOTTOM
Note: When installing, fit three knobs.
1
2 screw (M1.4) 2 two screws (MI1.4)
knob
3 panel assy, bottom
2 two screws (MI1.4)
6
STRIP, ORNAMENTAL
2 lid, battery case 1 claw 5 claw
4 claw
7
strip, ornamental
6
3 claw 8 strip, ornamental 9 button (open)
"CHASSIS ASSY, SET", "CASE, BATTERY", MAIN BOARD, SW BOARD
9 chassis assy, set
3 Remove the solder of terminal (plus) assy, battery.
6 case, battery 5 SW board
8 terminal (plus) assy, battery
7 screw (MI1.4)
flexible board
3 Remove the solder of terminal board (minus). 8 terminal board (minus)
4 MAIN board
2 flexible board (CN802)
1 four screws (M1.4)
7
SERVICE ASSY, OP (LCX-2E)
4 screw (M1.4) 3 screw (M1.4) 5 service assy, OP (LCX-2E)
1 washer 2 gear (SA)
8
SECTION 4 TEST MODE
Outline
· This set provides the Overall adjustment mode that allows CD and MO discs to be automatically adjusted when in the test mode. In this overall adjustment mode, the disc is discriminate between CD and MO, and each adjustment is automatically executed in order. If a fault is found, the system displays its location. Also, the manual mode allows each individual adjustment to be automatically adjusted. · Operation in the test mode is performed with the remote commander. A key having no particular description in the text, indicates a remote commander key.
Operation in Setting the Test Mode
· When the test mode becomes active, first the display check mode is selected. (Press the x key once, when the display check mode is not active) · Other mode can be selected from the display check mode. · When the test mode is set, the LCD repeats the following display.
LCD display
Setting Method of Test Mode
There are two different methods to set the test mode: 1 Short BP801 (TEST) on the SYSTEM board with a solder bridge (connect pin y; of IC801 to the ground). Then, turn on the power. SYSTEM BOARD (Component Side)
All lit
888
F1SHUF REC
u
All off Microprocessor version display
004 V1.600
· When the X key is pressed and hold down, the display at that time is held so that display can be checked.
Releasing the Test Mode
For test mode set with the method 1: Turn off the power and open the solder bridge on BP801 (TEST) on the SYSTEM board.
Note: Remove the solders completely. Remaining could be shorted with the chassis, etc.
For test mode set with the method 2: Turn off the power.
BP801 (TEST) Note: If electrical adjustment (see page 14) has not been finished completely, always start in the test mode. (The set cannot start in normal mode)
2 In the normal mode, turn on the HOLD switch on the set. While pressing the x key on the set, press the following remote commander keys in the following order:
N> t N> t . t . t N> t . t N> t . t X t X
9
Configuration of Test Mode [Test Mode $Display Check Mode%] Press the [VOL +] key [Manual Mode]
Press the x key
[VOL +] key:100th place of mode number [Major item switching]
N key > x key
increase.
[VOL --] key:100th place of mode number
decrease.
[Servo Mode] [Audio Mode] [Power Mode] [OP Alignment Mode] [Overall Adjustment Mode]
[VOL +] key:10th place of mode number increase. [Medium item switching] [VOL --] key:10th place of mode number
N key > x key
decrease.
Press the . or [VOL --] key Press the x key press the [DISPLAY] key
[Minor item switching]
N key: Unit place of mode number >
increase.
[Self-Diagnosis Display Mode]
Press the x key Press the [DISPLAY] key for several seconds (about 3 seconds).
[Adjusted value variation] [VOL +] key:Increases the
adjusted value
[VOL --] key:Decreases the
adjusted value
[Key Check Mode]
Quit the key check or open the upper panel
[Adjusted value write]
X key: When adjusted value is
Manual Mode
Mode to adjust or check the operation of the set by function. Normally, the adjustment in this mode is not executed. However, the Manual mode is used to clear the memory before performing automatic adjustments in the Overall Adjustment mode. · Transition method in Manual Mode 1. Setting the test mode. (See page 9) 2. Press the [VOL +] key activates the manual mode where the LCD display as shown below.
LCD display
changed: Adjusted value is written. When adjusted value is not changed: That item is adjusted automatically.
000 M a n u a l
3. During each test, the optical pick-up moves outward or inward while the N > or . key is pressed for several seconds respectively. 4. Each test item is assigned with a 3-digit mode number; 100th place is a major item, 10th place is a medium item, and unit place is a minor item.
10
5. The display changes a shown below each time the [DISPLAY] key is pressed.
Self-Diagnosis Display Mode
· This set uses the self-diagnosis system in which if an error occurs in playback mode, the error is detected by the model control and power control blocks of the microprocessor and information on the cause is stored as history in EEPROM. By viewing this history in test mode, it helps you to analyze a fault and determine its location. 1. Setting the test mode. (See page 9) 2. In the display check mode, press the [DISPLAY] key activates the self-diagnosis display mode where the LCD display as shown below.
LCD display
· Address & Adjusted Value Display
LCD display
011 C 6 8 S 0 1
address mode number LCD display adjusted value
· Jitter Value & Adjusted Value Display
011 O F F J 0 1
jitter value mode number LCD display adjusted value
000 1 s t 0 * *
history code error display code
· Block Error Value & Adjusted Value Display
011 0 6 3 B 0 1
block error value mode number LCD display adjusted value
3. Then, each time the N > key is pressed, LCD display descends by one as shown below. Also, the LCD display ascends by one when the . key is pressed.
1
· ADIP Error Value & Adjusted Value Display
000 1 s t 0 * * 000 1 s t 1 0 0 000 N - 1 1 0 0 000 N - 1 2 0 0 000 N - 2 0 * * 000 N - 2 1 0 0 000 N - 2 2 0 0 000 R 0 0 0 0
1
011 0 5 9 A 0 1
ADIP error value mode number adjusted value
000 1 s t 2 0 0 000 N 000 N 0** 100 200
· Item Title Display
LCD display
011 L r e f P w 0 1
item title mode number adjusted value
000 N
However in the power mode (mode number 700's), only the item is displayed. 6. Quit the manual mode, and press the x key to return to the test mode (display check mode).
000 N - 1 0 * *
4. Quit the self-diagnosis display mode, and press the x key to return to the test mode (display check mode).
Overall Adjustment Mode
Mode to adjust the servo automatically in all items. Normally, automatic adjustment is executed in this mode at the repair. For further information, refer to "Section 5 Electrical Adjustments". (See page 14)
11
· Description of Indication History History code number 1st 1st 1st N N N 0 1 2 0 1 2 The first error Displays "00" Displays "00" The last error Displays "00" Displays "00" One error before the last. Displays "00" Displays "00" Two errors before the last. Displays "00" Displays "00" Total recording time (Displays "0000" in this set) Description
N-1 0 N-1 1 N-1 2 N-2 0 N-2 1 N-2 2 REC
· Description of Error Indication Codes Problem No error Indication code 00 01 Servo error 02 03 04 21 Power error 22 23 24 Meaning of code No error Illegal access target address was specified High temperture Focus error Spindle error Initial low battery Low battery Low battery NI Low battery AM Description Normal condition Attempt to access an abnormal address High temperture Forcus could not be applied Abnormal lotation of disc Abnormal voltage at initialization Momentary interruption detected Momentary interruption detected (NiMH) Momentary interruption detected (AM)
Reset the error display code
After servicing, reset the error display code. 1. Setting the test mode. (See page 9) 2. Press the [DISPLAY] key activates the self-diagnosis display mode. 3. To reset the error display code, press the X key (2 times) when the code is displayed (except "R0000"). (All the data on the 1st, N, N-1, and N-2 will be reset)
12
Key Check Mode
This set can check if the set and remote commander function normally. · Setting Method of Key Check Mode 1. Setting the test mode. (See page 9) 2. Press the [DISPLAY] key for several seconds (about 3 seconds) activates the key check mode. (At the last two digits, AD value of remote commander key line is displayed in hexadecimal)
LCD display
000
**
: AD value of the remote commander key (hexadecimal 00 to FF) 3. When each key on the set and on remote commander is pressed, its name is displayed on the LCD. (The operated position is displayed for 4 seconds after the slide switch is operated. If any other key is pressed during this display, the LCD switches to its name display.) Example1: When >/N key on the set is pressed:
LCD display
000 FF
**
: AD value of the remote commander key (hexadecimal 00 to FF) Example2: When N > key on the remote commander is pressed:
LCD display
000 rPLAY
**
: AD value of the remote commander key (hexadecimal 00 to FF) 4. When all the keys on the set and on the remote commander are considered as OK, the following displays are shown for 4 seconds. (The key pressed to enter the Key Check mode has been checked even if it is not pressed in this mode) Example1: When the keys on the set are considered as OK:
LCD display
000 SET OK **
: AD value of the remote commander key (hexadecimal 00 to FF) Example2: When the keys on the remote commander are considered as OK:
LCD display
000 RMC OK **
: AD value of the remote commander key (hexadecimal 00 to FF) 5. When all the key have been checked or when the top panel is opened during this checking, the system terminates the Key Check mode and return to the test mode (display check mode).
13
SECTION 5 ELECTRICAL ADJUSTMENTS
Outline
· In this set, automatic adjustment of CD and MO can be performed by entering the test mode. (See page 9) However, before starting automatic adjustment, the memory clear and power adjustment must be performed in the manual mode. · A key having no particular description in the text, indicates a remote commander key.
NV Reset
· Setting method of NV reset 1. Select the manual mode of test mode, and set mode number 021NV Reset. (See page 10)
LCD display
021 ResNV
2. Press the X key.
LCD display
Precautions for Adjustment
1. Adjustment must be done in the test mode only. After adjusting, release the test mode. 2. Use the following tools and measuring instruments. · Test CD disc TDYS-1 (Part No. : 4-963-646-01) · Recorded MO disc PTDM-1 (Part No. : J-2501-054-A) Available SONY MO disc (recorded) · Digital voltmeter 3. Unless specified otherwise, supply DC 1.2V from the DC IN jack. 4. Switch position AVLS switch ................................................ NORM DIGITAL SOUND PRESET switch ........... OFF HOLD switch ............................................... OFF
021 ResOK?
3. Press the X key once more.
LCD display
021 Res***
NV reset (after several seconds)
021 Reset!
4. Press the x key to quit the manual mode, and activate the test mode.
Adjustment Sequence
Adjustment must be done with the following steps. 1. NV Reset (Memory clear) r Manual Mode 2. Digital Sound Preset Setting r 3. Power Supply Manual Adjustment r 4. CD Overall Adjustment Overall Mode r 5. MO Overall Adjustment
Digital Sound Preset Setting
1. Select the manual mode of the test mode, and set the item number 045. (See page 10)
LCD display
045 D.S.P **
: Adjustment value of digital sound preset set up. 2. Adjust [VOL +] key so that the adjustment value becomes 01.
LCD display
045 XXXS01
3. Press the X key to write the adjusted value.
Power Supply Manual Adjustment
· Adjustment sequence Adjustment must be done with the following steps. 1. Vc PWM Duty (L) adjustment (item number: 762) r 2. Vrem PWM Duty (L) adjsutment (item number: 764) r 3. Vc PWM Duty (H) adjustment (item number: 765) r 4. Vrem PWM Duty (H) adjustment (item number: 766)
14
· Adjustment method of Vc PWM Duty (L) (item number: 762) 1. Select the manual mode of the test mode, and set the item number 762. (See page 10)
LCD display
· Adjustment method of Vrem PWM Duty (H) (item number: 766) 1. Select the manual mode of the test mode, and set the item number 766. (See page 10)
LCD display
762 Vc1PWM
2. Connect a digital voltmeter to the TP901 (VC) on the MAIN board, and adjust [VOL +] key (voltage up) or [VOL --] key (voltage down) so that the voltage becomes 2.32 +0.005 V. 0.01 Proceed to the next adjustment without pressing the X key if voltage is already adjusted.
digital voltmeter MAIN board TP901 (VC) TP912 (GND)
766 VrhVch
2. Connect a digital voltmeter to the TP903 (VR) on the MAIN board, and adjust [VOL +] key (voltage up) or [VOL --] key (voltage down) so that the voltage becomes 2.6 ± 0.015 V. Proceed to the next adjustment without pressing the X key if voltage is already adjusted.
digital voltmeter MAIN board TP903 (VC) TP912 (GND)
3. Press the X key to write the adjusted value. · Adjustment method of Vrem PWM Duty (L) (item number: 764) 1. Select the manual mode of the test mode, and set the item number 764. (See page 10)
LCD display
C917
3. Press the X key to write the adjusted value. Adjustment and Connection Location:
MAIN Board (Component side)
TP901 (VC)
C902 + A L903 + C901 A
764 Vr1Vc1
2. Connect a digital voltmeter to the TP903 (VR) on the MAIN board, and adjust [VOL +] key (voltage up) or [VOL --] key (voltage down) so that the voltage becomes 2.25 +0.005 V. 0.01 Proceed to the next adjustment without pressing the X key if voltage is already adjusted.
digital voltmeter
20 CN501
R918 C916
D902
K R941
R902 R903
D901
K
L901
C918 R922 R921 37
R920
36
25 24
R909
C905
R904
R905
C906 R910
IC901
R942
L902
C915
48 1 12
13
R943
R940
C908
R936
C911
L905
C903 +
+ C904
L904
Q901
K
G D
R937
D903
A
Q902
BCE
R938
S
R944
MAIN board TP903 (VC) TP912 (GND)
1
TP912 (GND) TP903 (VR)
C506
C505
C504
C503
R501
C530 R552
C855
C501
R502
C502
3. Press the X key to write the adjusted value.
C557 C552
C507
R518
C529 + C
· Adjustment method of Vc PWM Duty (H) (item number: 765) 1. Select the manual mode of the test mode, and set the item number 765. (See page 10)
LCD display
+ C553
C527
R551
R517
R505
Q501
22 1 B R519 E
8
5 R516
L551
R521
R809 C551
IC501
R630
C619
CN802 1
IC552
R503 23 44 C519
765 VchPWM
2. Connect a digital voltmeter to the TP901 (VC) on the MAIN board, and adjust [VOL +] key (voltage up) or [VOL --] key (voltage down) so that the voltage becomes 2.75 ± 0.015 V. Proceed to the next adjustment without pressing the X key if voltage is already adjusted.
digital voltmeter MAIN board TP901 (VC) TP912 (GND)
3. Press the X key to write the adjusted value.
15
C907
+
Overall Adjustment Mode
· Configuration of overall adjustment
N > key Overall adjustment mode . key (Title display)
6. Insert MO disc in the set, and press the N > key to set the Overall MO Adjustment mode. Automatic adjustments are made.
LCD display
XXX MO RUN
XXX: Item number for which an adjustment is being executed. 7. If NG in the overall MO adjustments, return to Reset NV and perform the adjustment again.
LCD display
CD overall adjusting
All item OK
NG item exists or x key
CD overall adjustment NG
000 *** NG
: NG item number. 8. If OK through the overall MO adjustments, press the x key to return to the test mode and terminate the Overall Adjustment mode.
LCD display
x key CD overall adjustment OK
x key
N > key
MO overall adjusting
000 MO OK
· Overall CD and MO adjustment items 1. Overall CD adjustment items
Item No. 312 313 314 328 321 323 332 336 344 345 521 522 341 Description CD electrical offset adjustment CD TWPP gain adjustment CD tracking error gain adjustment CD tracking error offset adjustment CD ABCD level adjustment CD focus gain adjustment CD tracking gain adjustment CD two-axis sensitivity adjustment CD focus bias adjustment
NG item exists or x key
MO overall adjustment NG MO overall adjustment OK
x key
x key
[Test mode $display check mode%]
Note: Adjust the CD first, when performing adjustment.
· Adjustment Method of Overall CD and MO Adjustment Mode 1. Setting the test mode. (See page 9) 2. Press the [VOL --] key activates the overall adjustment mode.
LCD display
000 AssyFF
3. Insert CD disc in the set, and press the . key to set the Overall CD Adjustment mode. Automatic adjustments are made.
LCD display
XXX CD RUN
XXX: Item number for which an adjustment is being executed. 4. If NG in the overall CD adjustments, return to Reset NV and perform the adjustment again.
LCD display
000 *** NG
: NG item number. 5. If OK through the overall CD adjustments, then perform overall MO adjustments.
LCD display
000 CD OK
16
2. Overall MO adjustment items
Item No. 112 113 114 118 221 223 232 236 244 245 121 122 134 131 132 136 144 145 141 Low reflective CD tracking error gain adjustment Low reflective CD tracking error offset adjustment Low reflective CD ABCD level adjustment Low reflective CD focus gain adjustment Low reflective CD tracking gain adjustment MO tracking error gain adjustment MO tracking error offset adjustment MO TWPP gain adjustment MO double speed read TWPP offset adjustment MO ABCD level adjustment MO focus gain adjustment MO tracking gain adjustment MO focus bias adjustment Description
MO electrical offset adjustment
17
MZ-E77 SECTION 6 DIAGRAMS
6-1. BLOCK DIAGRAM RF Section
OPTICAL PICK-UP BLOCK (LCX-2E)
MAIN BOARD
(1/3 )
6 IY IX JX JX JY JX JY IX IY IX A B 9 10 14 15 16 17 7 8 C D 18 MON
VREF
CN501 6
RF AMP,FOCUS/TRACKING ERROR AMP IC501 4 VREF DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO SIGNAL PROCESSOR, EFM/ACIRC ENCODER/DECODER, SHOCK PROOF MEMORY CONTROLLER, 16M BIT D-RAM IC601(1/2) CN801 (1/3)
IY IX JX JY A B C D
9 10 14 15 16 17 7 8
A BC D F
8 9 10 11 12 14 5 6
IY IX JX JY A B C D
RF OUT PEAK /BOTM PEAK BOTM ABCD FE TE
33 29 28 41 42
78 RFI 84 PEAK 85 BOTM 86 ABCD 87 FE 96 TE 99 ADIP 106 APCREF 89 VC 4 MNT2 12 XRST
AOUT L 24 AOUT R 27 AVCC AVD1 AVD2 VDIOSC VDI01 VDI02 VDI03 VDD RAM VDD RAM MNT3 SWDT SCLK XLAT SRDT SENS SQSY XINT CS DSP 76 92 18 53 100 125 144 146 5 6 7 8 10 11 13 16 32
7 5
L IN R IN
RF,AMP, FOCUS ERROR, TRACKING ERROR
A-C 13 D-C 7 MON 18 18 PD-NI
1 ADIP IN 44 TPP/WPP ADIP 21 PD-NI 19
L601 31 25 45 17 43 19 44 41 13 FOK SDO0 SCK0 XLAT SDI0 SENSE SQSY XINT XCS DSP
APC
VC 31 5 5 12 LD-A 12 LD 13 LD-K 13 AVCC AVCC AVCC S0 S1 20 11 19 AVCC S0 S1 20 L501 11 19 L502 22 DVDD 40 AVCC AUTOMATIC POWER CONTROL Q501 PD-O OFTRK 26 XRST 25
B
(Page 23)
20
SBUS 23 SCK 24 S MON 43
29 11 35 40 48 16 33 42
OFTRK VREF MON SSB DATA SSB CLK S MON PS S0 PD S1 XICRST
2 TRACKING COIL 1 2-AXIS DEVICE 4 FOCUS COIL 3
TRK+ 2 TRK-
TRK+
1
TRK-
FCS+
A
4 FCS+ (Page 21)
· SIGNAL PATH : PLAYBACK
FCS-
3
FCS-
05
19
20
MZ-E77
6-2.
BLOCK DIAGRAM SERVO Section
MAIN BOARD
(2/3)
DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO SIGNAL PROCESSOR, EFM/ACIRC ENCODER/DECODER, SHOCK PROOF MEMORY CONTROLLER, 16M BIT D-RAM IC601(2/2) SLED VOLTAGE MONITOR IC552 5 6 3 2 7 139 SLCV VDCO 1 VDC1 36 VDC2 37 VDC3 68 VDC4 108 VDC5 136 DAVDDL 25 DAVDDR 26
VREG
VLD
1
138 SLCU
FOCUS/TRACKING COIL DRIVE, SPINDLES/SLED MOTOR DRIVE IC551 OSCI 19 TRK+ FO3 30 VM34 29 VM3 33 RO3 32 X601 22.5792MHz PRE DRIVER HI-BRIDGE CONTROL FI3 21 RI3 22 OSCO 20 110 TFDR 109 TRDR
TRK-
A
(Page 19) FCS+ FO1 7 VM1 4 VM12 8 RO1 5 PRE DRIVER HI-BRIDGE CONTROL FI1 16 RI1 15 111 FFDR 112 FRDR SPVS 124 SPDU 127
SPINDLE SERVO DRIVE SWITCH IC504 1 7 6 3 2 5
FCS-
M902 (SLED)
CN551 5 7 SLED1+ SLED15 7
M
FO2 11 VM2 12 RO2 9
PRE DRIVER
HI-BRIDGE CONTROL
RI2 13 FI2 14 PWM24 25
134 SLDV 133 SLDU 141 SLVS SPDV 128
SPINDLE SERVO DRIVE SWITCH IC505 1 7 6 3 2 5
6 SLED2+ 6 SLED28 8 CLVN
FO4 26 RO4 28 COM 37 CPW1 38 CPV1
PRE DRIVER
HI-BRIDGE CONTROL
FI4 23 RI4 24 COW0
135 SLDW 140 SLCW
SPDW 129
1
1
34
132 SPCW
COV0
39
35
131 SPCV 130 SPCU CN801 (2/3) 21 27 30 26 28 32 FFCLR SPDL START SW SLD 1 MON CLV W CLV V CLV U SPDL PWM
M901 (SPINDLE) 2 3 4 CLVU CLVV CLVW 2 3 4 UNREG AVCC
40 46
CPU1 UO PRE DRIVER 3 PHASE CONTROL
COU0
36
VMU 47 VO 44 VMVW 43 WO 42
W1 48 V1 1 U1 2 PWM1 3 OE BIAS 17
C
(Page 23)
D
(Page 24)
18 VC VG 20 VG
05
21
22
MZ-E77
6-3.
BLOCK DIAGRAM MAIN Section
SYSTEM BOARD
CN803 (1/2) L IN 7 22 IN L
HEADPHONE AMP IC301 CN803 (2/2) 2 1
MAIN BOARD
OUT L L OUT CN801 (3/3) 1
(3/3 )
RCH LCH GND J301
i
(HEADPHONE)
R IN
5 UNREG AVCC
21
IN R
OUT R BEEP OUT A BEEP OUT A
4
3
R OUT
3 GND KEY DATA VDD
1 +B 20 VCC
24 23
· SIGNAL PATH : PLAYBACK
BEEP REFERENCE VOLTAGE SWITCHING Q301 EEPROM IC802 4 3 2 1 DI DO SK XCS SYSTEM CONTROL IC801 13 VREF IN
15 STB 18 MUTE 17
SW BOARD
S806 DIGITAL SOUND PRESET CN802 1 DBB CN804 9 S801 x 8 7 6 5 4 D801 OPR S809 (OPEN/CLOSE) S801 805 S802 >/N S803 . S804 VOLUME -S805 VOLUME + OFF 1 2 NORM S807 AVLS LIMIT
B
(Page 20) FOK SDO0 SCK0 XLAT SDI0 SENSE SQSY XINT XCS DSP 31 25 45 17 43 19 44 41 13 119 52 12 13 8 11 6 53 55 9 XCS NV FOK SO0 SCK0 XLAT SI0 SENSE SQSY XINT XCS DSP MUTE 117 XHP STB 23 BEEP 18
2 3 4 5 6
DBB1 AVLS SET KEY XWK1 OPEN/CLOSE OPR LED
7 RMC DTCK 19 SET KEY 2 87 38 22 RMC DATA DBB 38 22
3
S808 HOLD OFF HOLD
OFTRK VREF MON SSB DATA SSB CLK S MON PD S0 PD S1 XICRST
29 11 35 40 48 16 33 42
2 82 102 103 79
OFTRK VREF MON SSB DATA SSB CLK S MON
XAVLS SET KEY 1 WK DET OPEN CLOSE SW OPR LED HOLD SW
115 86 83 84 69 73
24 14 18 9 OPEN/CLOSE OPR LED 20 HOLD SW 37
AVLS SET KEY XWK1
24 14 18 9 20 37
8
HOLD SW
2
POWER CONTROL IC901 34 XWK2 35 XWK1
AVCC VG
B+ SWITCH Q901, 902
RMC KEY 85 VBKAN 78
39 10
RMC KEY VSTB
39 10
36 PD S0 38 PDS1 68 XICRST
39 VRMS 33 XWK3 38 VSTB 32 XWK4 22 INM1 NOISE FILTER 24 RF1
VG 19 D903 SWVG 17 L905 VR 12 VR OUT 25 L2 26 D902 L902 VB 44 L901 L1 28 D901 VC ON 29 VC IN 31 FB 9 VREG 10 VLD 11 RECHARGEABLE BATTERY (NICKEL-METAL) NH-14WN 1.2V 1400mAh L904
VC PWM 66
50
VC PWM
50
VB MON 80 SPDL START SW 21 27 30 26 28 32 49 35 26 25 24 67 SPDL START SW SLD 1 MON CLV W CLV V CLV U SPDL PWM
UNREG NOISE FILTER 49 VRM PWM 49 46 47 36 15 34 12 46 REG CTL PWM SERON 47 SLEEP 36 FFCLR 15 XRST 34 VDD 12 23 RF2 20 INM2 43 15 36 37 40 30 CLK SERON SLEEP FFCLR XRST VC
C
(Page 22)
SLD 1 MON CLV W CLV V CLV U SPDL PWM
VRM PWM 65 REG CTL PWM SERON SLEEP FFCLR XRST VDD VDD VDD AVDD VDD AVREF 64 58 40 39 43 16 47 74 93 105 92
L903
45 VREF 21 DTC AVCC VDD VREG VLD UNREG
X801 16.9344MHz
45 XTAL 46 EXTAL
DRY BATTERY SIZE "AA" (IEC DESIGNATION R6) 1PC. 1.5V
DC IN 1.5V
+
(BATTERY CASE)
VRM MON 89
D
05
(Page 22)
23
24
MZ-E77
6-4. PRINTED WIRING BOARD MAIN Board (Component Side)
1
· Semiconductor Location
Ref. No. D101 D201 D601 D855 D901 D902 D903 IC501 IC504 IC505 IC551 IC552 IC601 IC901 Q501 Q901 Q902 Location J-5 I-4 H-8 I-6 A-9 A-8 D-9 G-9 I-5 I-6 G-4 G-7 J-9 B-7 F-11 D-10 D-11
2
3
4
5
6
7
8
9
10
11
12
13
MAIN BOARD (COMPONENT SIDE)
A
+ C953
C917
C902 +
A L903 + C901
A
D902
K R941
R902 R903
D901
K
L902
L901
C918 R922 R921 37
R920
36
25 24
R904
B
TP901 (VC)
R905
C906 R910
IC901
R942
R909
C905
R918
C916
C915
48 1 12
13
C952
R943
C
R940
C908
R936
C911
L905
C903 +
+ C904
L904
+
L554
Q901
K
G D
R937
TP912 (GND) A CN501
D903
Q902
BCE
R938
S
D
+ C556
R944
L501
20 DC IN 1.5V
MOTOR FLEXIBLE BOARD
1-675-668-
C518 R555 (BATTERY CASE) R556 1 8 OPTICAL PICK-UP BLOCK (LCX-2E)
C907
+
+
12
E
1 2 M901 (SPINDLE) 3 4
CN551
DRY BATTERY SIZE "AA" (IEC DESIGNATION R6) 1PC. 1.5V
+
1 C529 +
C504 C503 R501 C501 R502 C502
C507
C506
7 8 48
L552
C557
C855
R552 + C553
R551
C552
C527 8 5 R516
R517
M902 (SLED)
6
+ C554
R554
C558
M
C559
C530 R505
C505
F
5
R553
R518
C
Q501
22 1 TP903 (VR) B R519 R521 E
37 36
L551
1
G
+ C555
RB552 1 12 13 24 C561 25 4
C510
C517
C516 C615
R515
C513 C511
C509
C618 C614
R614
C620 R611
R609
R504
23
44
C508
RECHARGEABLE BATTERY (NICKEL-METAL) NH-14WM 1.2V 1400mAh
R809
C551
IC501
R630
C619
CN802
IC552
R503 C519
IC551
1
R607
(Page 42)
A
SW BOARD CN804
C954
IC505
1 R828 FB802 5 K K 1 4 1 4 K
R818
R816 25 26
110 109 112 111 108 116 114 113 118 117 115 121 120 119 124 123 122 126 127 125 130 129 128 133 132 131
103 100 97 96 92 88 85 82 78 76 73
70 71 146 67 69 68 66 65 64 63 62 59 60 61 56 57 58
Caution: Pattern face side: (Conductor Side) Parts face side: (Component Side)
I
Parts on the pattern face side seen from the pattern face are indicated. Parts on the parts face side seen from the parts face are indicated.
4
R601
D201
C351
4
6 7
10 13 16 19 8 9
24 23 27 31 34 35
*
GND
DATA
VDD
KEY
IC601 is not replaceable
R
5
14 17 20 21 22 29 30 33 143 L601
R603
· Lead Layouts
surface
X601 1 50 C101 +
C104 R105
C607
+ C606 R205
R604
· Main board is four-layer printed board. However, the patterns of layers 2 and 3 have not been included in this diagrams.
R819
C854 C853 C851
R817 FB801
R620
142 141 140 3 2 1 11 12 15 18
144 40 41 25 26 28 32 36 147 38 39
C605
1-677-152R602
+ C609
C608
J
1-675-336-
11
L
137 135 134 CN801 139 138 136
46 45 44 37 42 43
C604
SWITCH FLEXIBLE BOARD
D101
IC601
50 51 52 47 48 49
C603
A
K
K
A
D855
A 2
K 3
*
53 55 54
+ C610
Note on Printed Wiring Board: · Y : parts extracted from the conductor side. f · : internal component. · b : Pattern from the side which enables seeing. (The other layers' patterns are not indicated.)
H
9
D601
K
RB551
L553 C521
R821 A
C526
R615 C515 C616
R612 R610
C613 C611 R608
C612
R606 R605
L502 8 5
C522
R822
C619 + C524 107 105 101 99 94 93 90 87 84 81 79 75 145 106 104 102 98 95 91 89 86 83 80 77 74 72
8
5
IC504
K
COM
C201 +
11 (11)
J301
i
05 (HEADPHONE)
B
SYSTEM BOARD CN803
(Page 38)
Lead layout of conventional IC
CSP (chip size package)
25
C204
26
MZ-E77
6-5. PRINTED WIRING BOARD MAIN Board (Conductor Side)
13
12
11
10
9
8
7
6
5
4
3
2
1
MAIN BOARD (CONDUCTOR SIDE)
A
B
C
D
E
F
G
H
I
J
05
1-677-152-
11 (11)
K
27
28
MZ-E77
6-6. SCHEMATIC DIAGRAM MAIN Board (1/4) · See page 45 for Waveforms. · See page 46 for IC Block Diagram.
(Page 31)
(Page 35)
(Page 35)
(Page 34)
Note on Schematic Diagram: · All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums. · All resistors are in and 1/4 W or less unless otherwise specified. · % : indicates tolerance. · A : B+ Line. · Power voltage is dc 1.5V and fed with regulated dc power supply from battery terminal.
· Voltages and waveforms are dc with respect to ground in playback mode. no mark : PLAYBACK · Voltages are taken with a VOM (Input impedance 10 M). Voltage variations may be noted due to normal production tolerances. · Waveforms are taken with a oscilloscope. Voltage variations may be noted due to normal production tolerances.
· Circled numbers refer to waveforms. · Signal path. E : PLAYBACK Note: The components identified by mark 0 or dotted line with mark 0 are critical for safety. Replace only with part number specified.
29
30
MZ-E77
6-7. SCHEMATIC DIAGRAM MAIN Board (2/4) · See page 45 for Waveforms.
(Page 43)
(Page 30)
(Page 34) (Page 34) (Page 36)
Note on Schematic Diagram: · All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums. · All resistors are in and 1/4 W or less unless otherwise specified. · % : indicates tolerance. f · : internal component. · C : panel designation.
· A : B+ Line. · Power voltage is dc 1.5V and fed with regulated dc power supply from battery terminal. · Voltages and waveforms are dc with respect to ground in playback mode. no mark : PLAYBACK : Impossible to measure
· Voltages are taken with a VOM (Input impedance 10 M). Voltage variations may be noted due to normal production tolerances. · Waveforms are taken with a oscilloscope. Voltage variations may be noted due to normal production tolerances. · Circled numbers refer to waveforms.
· Signal path. E : PLAYBACK
* IC601 is not replaceable
· The voltage and waveform of CSP (chip size package) cannot be measured, because its lead layout is different form that of conventional IC.
31
32
MZ-E77
6-8. SCHEMATIC DIAGRAM MAIN Board (3/4) · See page 45 for Waveform. · See page 48 for IC Block Diagram.
(Page 29) Note on Schematic Diagram: · All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums. · All resistors are in and 1/4 W or less unless otherwise specified. · % : indicates tolerance. · A : B+ Line. · Power voltage is dc 1.5V and fed with regulated dc power supply from battery terminal. · Voltages and waveform are dc with respect to ground in playback mode. no mark : PLAYBACK · Voltages are taken with a VOM (Input impedance 10 M). Voltage variations may be noted due to normal production tolerances. · Waveform is taken with a oscilloscope. Voltage variations may be noted due to normal production tolerances. · Circled number refers to waveform.
(Page 31) (Page 31)
(Page 35)
33
34
MZ-E77
6-9. SCHEMATIC DIAGRAM MAIN Board (4/4) · See page 45 for Waveforms. · See page 47 for IC Block Diagram.
(Page 29)
(Page 31)
(Page 39)
(Page 34)
(Page 30)
Note on Schematic Diagram: · All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums. · All resistors are in and 1/4 W or less unless otherwise specified. · C : panel designation. · A : B+ Line. · Total current is measured with MD installed.
· Power voltage is dc 1.5V and fed with regulated dc power supply from battery terminal. · Voltages and waveforms are dc with respect to ground in playback mode. no mark : PLAYBACK · Voltages are taken with a VOM (Input impedance 10 M). Voltage variations may be noted due to normal production tolerances.
· Waveforms are taken with a oscilloscope. Voltage variations may be noted due to normal production tolerances. · Circled numbers refer to waveforms. · Signal path. E : PLAYBACK
35
36
MZ-E77
6-10. PRINTED WIRING BOARD SYSTEM Board
· Semiconductor Location
Ref. No. IC301 IC801 IC802 Q301 Location F-3 F-6 F-8 G-3
1
2
3
4
5
6
7
8
A
SYSTEM BOARD (COMPONENT SIDE)
B
C
BP801 (TEST)
D
1-677-232-
11 (11)
C804
R803
C811
R806
C803
R804
C806 C807
R808 R807
1
50
R801 R810 R802
E
Note on Printed Wiring Board: · Y : parts extracted from the conductor side. f · : internal component. · b : Pattern from the side which enables seeing. (The other layers' patterns are not indicated.) Caution: Pattern face side: (Conductor Side) Parts face side: (Component Side) Parts on the pattern face side seen from the pattern face are indicated. Parts on the parts face side seen from the parts face are indicated.
SYSTEM BOARD (CONDUCTOR SIDE)
R204 C203 C103 R104 C305
88 87 86 83 81 78 74 72 69 64 63 60 58 90 89 85 84 80 77 75 71 68 65 62 59 57 93 92 91 82 79 76 73 70 67 66 61 55 56
C302
R827
4
1
96 95 94 CN803
R101
52 53 54 49 50 51 46 47 48
99 98 97 102 101 100
IC802
+ C306
F
6 7
1 24
R201
C802 R826
105 104 103 108 107 106 109 110 111 113 114 112 117 116 115 4 119 118 2 6 5 7 8 9
*
IC801
43 45 44 40 41 42 37 38 39 34 35 36
5 R815
8
IC301
12 19 13
R302
C808
· System board is four-layer printed board. However, the patterns of layers 2 and 3 have not been included in this diagrams.
R202
R102
C809
10 13 16 19 22 27 32 33 11 14 17 21 23 26 28 31 12 15 18 20 24 25 29 30 X801
C304 +
*
IC801 is not replaceable
surface
R103
C102 +
18
R301
25
+ C301
C303
26
120 1
3
· Lead Layouts
G
R203
1-677-232-
11 (11)
Q301
BCE
C202 +
R303
B
MAIN BOARD CN801
(Page 26)
Lead layout of conventional IC
CSP (chip size package)
05
37
38
MZ-E77
6-11. SCHEMATIC DIAGRAM SYSTEM Board
· See page 45 for Waveforms.
· See page 48 for IC Block Diagram.
(Page 36)
Note on Schematic Diagram: · All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums. · All resistors are in and 1/4 W or less unless otherwise specified. f · : internal component. · A : B+ Line. · Power voltage is dc 1.5V and fed with regulated dc power supply from battery terminal. · Voltages and waveforms are dc with respect to ground in playback mode. no mark : PLAYBACK : Impossible to measure · Voltages are taken with a VOM (Input impedance 10 M). Voltage variations may be noted due to normal production tolerances. · Waveforms are taken with a oscilloscope. Voltage variations may be noted due to normal production tolerances. · Circled numbers refer to waveforms. · Signal path. E : PLAYBACK
* IC801 is not replaceable
· The voltage and waveform of CSP (chip size package) cannot be measured, because its lead layout is different form that of conventional IC.
39
40
MZ-E77
6-12. PRINTED WIRING BOARD SW Board
1
2
3
4
5
6
7
8
9
10
A
SW BOARD (COMPONENT SIDE)
R812 R811
D801
OPR R814
B
S804 VOLUME S805 VOLUME + S801 x S803 . S802 >/N
1-677-151-
11 (11)
C
SW BOARD (CONDUCTOR SIDE)
S807 AVLS NORM , LIMIT
R813
SWITCH FLEXIBLE BOARD
1-675-336S808 HOLD OFF , HOLD CN804
(Page 25)
11
A
MAIN BOARD CN802
S806 DIGITAL SOUND PRESET OFF , 1 , 2
S809 (OPEN/CLOSE)
D
05
9
1
1-677-151-
11 (11)
Note on Printed Wiring Board: · Y : parts extracted from the conductor side. z · : Through hole. (The other layers' patterns are not indicated.) Caution: Pattern face side: (Conductor Side) Parts face side: (Component Side) Parts on the pattern face side seen from the pattern face are indicated. Parts on the parts face side seen from the parts face are indicated.
41
42
MZ-E77
6-13. SCHEMATIC DIAGRAM SW Board
(Page 32)
Note on Schematic Diagram: · All capacitors are in µF unless otherwise noted. pF: µµF 50 WV or less are not indicated except for electrolytics and tantalums. · All resistors are in and 1/4 W or less unless otherwise specified. · C : panel designation.
43
44
· Waveforms MAIN Board
1 IC501 1 (TE), IC601 oh (TE) (PLAYBACK mode) 100 mV/DIV, 1 µs/DIV 6 IC504 5, 6, IC505 1, 2, 5, 6, IC551 1, 2, rk (V1, U1, W1) IC601
SYSTEM Board
q; IC801 wf, wg, wh (CLV U, CLV V, CLV W) (PLAYBACK mode) 1 V/DIV, 5 ms/DIV
· IC Block Diagrams MAIN Board IC501 SN761056DBT
44 ADIPIN TE 1 DWBPF DW AWBPF MIJ MALFA D-C A-C VREF075 CSLO AW PK/BTM TWPP 43 S-MON 42 FE
Approx. 12 mVp-p
2.4 Vp-p
2.4 Vp-p
REXT 2 WPPLPF 3 VREF11 4
ADIP
TEMP TE ADIP TON BOTM TON PEAK AW+DW CSL TON NPP I+J A+B+C+D
S-MONITOR
2 IC501 8, 9, q;, qa (IY, IX, JX, JY) (PLAYBACK mode) 100 mV/DIV, 5 µs/DIV
11 ms 11 ms 7 IC551 ef, eg, eh (COW0, COV0, COU0) IC601
C 5 D 6
TRACKING ERROR AMP
Approx. 140 mVp-p
D-C 7
TPP/WPP
ABCD AMP
41 ABCD
1.2 Vp-p 2.4 Vp-p 3 IC501 ed (RF OUT), IC601 uk (RFI) (PLAYBACK mode) 500 mV/DIV, 10 µs/DIV 59.1 ns 12 ms
Approx. 1.2 Vp-p
40 AVCC 39 38 37 36 35 OFC-C1 OFC-C2 PS LP EQ
IY IX JX JY
8 9 10 11
FOCUS ERROR AMP
RF AMP
34 AGND 33 RF
8 IC601 w; (OSCO) 500 mV/DIV, 20 ns/DIV
qs IC801 yf (REG CTL PWM) 1 V/DIV, 2 µs/DIV
A 12 A-C 13 B 14 TON-C 15 T-ON
32 CCSL2 31 VC 30 VREF075 29 PEAK PEAK/BOTM 28 BOTM AUTOMATIC POWER CONTRL 27 DGND 26 OFTRK 25 XRST 24 SCK 23 SBUS
POWER SUPPLY
4 IC501 rs (FE), IC601 ij (FE) (PLAYBACK mode) 100 mV/DIV, 1 µs/DIV
1.7 Vp-p
CIG 16
2.4 Vp-p
CDN 17 PD-NI 18 PD-I 19 PD-O 20
Approx. 10 mVp-p
44.3 ns
7.5 µs qd IC801 yj (SPDL PWM) (PLAYBACK mode) 1 V/DIV, 2 µs/DIV
ADFG 21 DVDD 22 SERIAL INTERFACE
9 IC901 rd (CLK) 1 V/DIV, 2 µs/DIV
5 IC504 1, 2, IC551 3 (PWM1), IC601
2.4 Vp-p 2.4 Vp-p
2.4 Vp-p 7.5 µs 5.6 µs
5.6 µs
45
46
IC551
XC111256FTA
GNDUV VMVW GNDW CPWI
38
CPUI
CPVI
48 VC VC VG
47
46
45
44
43
42
41
40
39
37
COM
+
VMU
WO
UO
VO
WI
36 CPUO
VI 1 UI 2 PWM 3
3PHASE CONTROL
PRE DRIVER
+ +
35 CPVO
34 CPWO
VM1 4 VG VC VC VC VC VG 33 VM3
RO1 5 PGND1 6 FO1 7
PRE DRIVER
H-BRIDGE CONTROL
H-BRIDGE CONTROL
PRE DRIVER
32 RO3 31 PGND3 30 FO3
VM12 8
VG
VC
VC VC BIAS ROE
VC
VC
VG
29 VM34 H-BRIDGE CONTROL PRE DRIVER 28 RO4 27 PGND4
RO2 9 PGND2 10 FO2 11
PRE DRIVER
H-BRIDGE CONTROL VC VG
VM2 12
26 FO4 25 PWM24 13 14 15 16 17 18 19 20 21 22 23 24
GND
RI2 FI2
RI1 FI1 OE
VG
FI3 RI3
47
FI4 RI4
VC
IC901
MPC18A31FTA
CHGMON RSTREF CHGSW FFCLR VRMC CHGB CRST XRST VBTB VREF
48 DCIN DCIN 1 VB DCIN
47
46
45
44
43
CLK
VB
42
41
40
39
38
37
VC RS 2 INM5 3 ++ DCIN VC + RF5 4 BANDGAP REFERENCE + + VC
FFCLR
XRST SYSTEM CONTROL VC VB SAW OSC2 VC 31 VCIN 36 35 34 33 32 SLEEP XWK1 XWK2 XWK3 XWK4
BATM 5 INM3 6 INP3 7 RF3 8 +
VC VREG PWM RF1
VG
30 VC 29 VCON
STEP-UP PRE DRIVER
28 L1 27 PGND
FB 9 VREG 10 + RF4 STEP-UP DC/DC CONVERTER PWM RF2 + +
VR
VC VC VG
VLD 11 VR 12
STEP-UP PRE DRIVER
26 L2 25 VROUT
PWMVC
SERON
SWVG GND
INM4
INM2
INM1
RF4
RF2
SYSTEM Board IC301 TA2131FL (EL)
BST SW BEEP IN VREF IN PW SW MT SW GND
18 PW SW MT TC 19 VCC1 20 INB 21
17 MT SW
16 BST SW
15 BEEP
14
13 V REF 12 VREF 11 LPF1
ADD 10 BST NF1 BST1
INA 22
9 LPF2
BEEP 23 OUTB BEEP 24 OUTA 1
VCC2
PW A
PW B
BST2
8 BST NF2 7 BST OUT BST AGC
2
OUTA
3
PWR GND
4
OUTB
5
DET
6
AGC IN
DTC
48
RF1
VG
+ 13 14 15 16 17 18 19 20 21 22
23
24
6-14.
IC PIN FUNCTION DESCRIPTION
Pin Name TE REXT WPPLPF VREF11 C D D-C IY IX JX JY A A-C B TON-C CIG CDN PD-NI PD-I PD-O ADFG DVDD SBUS SCK XRST OFTRK DGND BOTM PEAK VREF075 VC CCSL2 RF OUT AGND EQ LP PS OFC-2 OFC-1 AVCC ABCD FE S-MON ADIP-IN I/O O -- -- O I I I I I I I I I I -- -- -- I I O O -- I/O I I I -- O O -- O -- O -- -- -- -- -- -- -- O O O I Description Tracking error signal output to the CXD2661GA (IC601) Connected to the external resistor for the ADIP amplifier control Connected to the external capacitor for low-pass filter of the TPP/WPP Reference voltage output terminal (+1.1V) Signal (C) input from the optical pick-up detector Signal (D) input from the optical pick-up detector Signal (D) input from the optical pick-up detector (AC input) I-V converted RF signal (IY) input from the optical pick-up block detector I-V converted RF signal (IX) input from the optical pick-up block detector I-V converted RF signal (JX) input from the optical pick-up block detector I-V converted RF signal (JY) input from the optical pick-up block detector Signal (A) input from the optical pick-up detector Signal (A) input from the optical pick-up detector (AC input) Signal (B) input from the optical pick-up detector Connected to the external capacitor for the TON hold Connected to the external capacitor for low-pass filter of the NPP divider denominator Connected to the external capacitor for low-pass filter of the CSL divider denominator Light amount monitor input terminal (non-invert input) Light amount monitor input terminal (invert input) Light amount monitor output terminal ADIP duplex FM signal (22.05 kHz ± 1 kHz) output to the CXD2661GA (IC601) Power supply terminal (+2.4V) (digital system) Two-way SSB serial data bus with the system controller (IC801) SSB serial clock signal input from the system controller (IC801) Reset signal input from the system controller (IC801) Off track signal input from the CXD2661GA (IC601) Ground terminal (digital system) Light amount signal (RF/ABCD) bottom hold output to the CXD2661GA (IC601) Light amount signal (RF/ABCD) peak hold output to the CXD2661GA (IC601) Connected to the external capacitor for the internal reference voltage Middle point voltage (+1.2V) generation output terminal Connected to the external capacitor for low-pass filter of the TPP/WPP Playback EFM RF signal output to the CXD2661GA (IC601) Ground terminal (analog system) Connected to the external capacitor for the RF equalizer Connected to the external capacitor for the RF equalizer Connected to the external capacitor for the RF equalizer Connected to the external capacitor for the RF AC coupling Connected to the external capacitor for the RF AC coupling Power supply terminal (+2.4V) (analog system) Light amount signal (ABCD) output to the CXD2661GA (IC601) Focus error signal output to the CXD2661GA (IC601) Servo signal monitor output to the system controller (IC801) ADIP duplex FM signal (22.05 kHz ± 1 kHz) input terminal Not used "L": reset
· MAIN BOARD IC501 SN761056DBT (RF AMP, FOCUS/TRACKING ERROR AMP) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
49
· MAIN BOARD IC601 CXD2661GA-2 (DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO SIGNAL PROCESSOR, EFM/ACIRC ENCODER/DECODER, SHOCK PROOF MEMORY CONTROLLER, ATRAC ENCODER/DECODER, D/A CONVERTER, 16M BIT D-RAM) Pin No. 1 2, 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36, 37 38 39 to 41 42 43 44 45 Pin Name VDCO MNT0, MNT1 MNT2 MNT3 SWDT SCLK XLAT VSCO SRDT SENS XRST SQSY MTFLGL TST1 XINT TST2 VDIOSC OSCI OSCO VSIOSC DAVSSL VREFL AOUTL DAVDDL DAVDDR AOUTR VREFR DAVSSR VSC1 XTSL CD DSP TST4 DOUT DT72 VDC1, VDC2 DATAI TST5 to TST7 DADT LRCK VSC2 XBCK I/O -- O O O I I I -- O O I O O I O I -- I O -- -- O O -- -- O O -- -- I I I O O -- I I O O -- O Operation monitor signal output terminal Description Power supply terminal (+1.8V) (for internal logic) Not used (open) Off track signal output to the SN761056DBT (IC501) and system controller (IC801) Focus OK signal output to the system controller (IC801) "H" is output when focus is on ("L": NG) Serial data input from the system controller (IC801) and EEPROM (IC802) Serial clock signal input from the system controller (IC801) Serial data latch pulse input from the system controller (IC801) Ground terminal (for internal logic) Serial data output to the system controller (IC801) and EEPROM (IC802) Internal status (SENSE) output to the system controller (IC801) Reset signal input from the system controller (IC801) "L": reset Subcode Q sync (SCOR) output to the system controller (IC801) "L" is output every 13.3 msec Almost all, "H" is output Muting applied to analog signal input in non-signal status causes the signal to be "H" automatically Not used (open) Input terminal for the test (normally : fixed at "L") Interrupt status output to the system controller (IC801) Input terminal for the test (normally : fixed at "L") Power supply terminal (+2.4V) (for oscillator cell) System clock input terminal (22.5792 MHz) System clock output terminal (22.5792 MHz) Ground terminal (for oscillator cell) Ground terminal (for internal D/A converter L-ch) Reference voltage output terminal (for internal D/A converter L-ch) Playback analog signal (L-ch) output to the headphone amp (IC301) Power supply terminal (+2.4V) (for internal D/A converter L-ch) Power supply terminal (+2.4V) (for internal D/A converter R-ch) Playback analog signal (R-ch) output to the headphone amp (IC301) Reference voltage output terminal (for internal D/A converter R-ch) Ground terminal (for internal D/A converter R-ch) Ground terminal (for internal logic) Input terminal for the system clock frequency setting "L": 45.1584 MHz, "H": 22.5792 MHz (fixed at "H" in this set) Chip select signal input from the system controller (IC801) Input terminal for the test (normally : fixed at "L") Digital audio signal output terminal when playback mode Not used (open) Power supply terminal (+1.8V) (for internal logic) Input terminal of external audio data to the internal D/A converter Input terminal for the test (normally : fixed at "L") Playback data signal output to the external D/A converter Ground terminal (for internal logic) Bit clock signal (2.8224 MHz) output to the external D/A converter Not used (open) Not used (open) Not used (open) L/R sampling clock signal (44.1 kHz) output to the external D/A converter Not used (open) Not used (open)
50
Pin No. 46 47 to 52 53 54 55 to 59 60 61 62 63 64 to 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102
Pin Name FS256 A03, A04, A02, A05, A01, A06 VDIO1 VSIO1 A00, A07, A10, A08, A09 XRAS IXOE IXWE XCAS D1, D2, D0, D3 VDC3 VSC3 A11 XOE XWE MVCI ASYO ASYI AVD1 BIAS RFI AVS1 PCO FILI FILO CLTV PEAK BOTM ABCD FE AUX1 VC ADIO ADRT AVD2 AVS2 ADRB SE TE DCHG APC ADFG VDIO2 VSIO2 F0CNT
I/O O O -- -- O O O O O I/O -- -- O O O I O I -- I I -- O I O I I I I I I I O I -- -- I I I I I I -- -- O
Description Clock signal (11.2896 MHz) output to the external D/A converter Not used (open) Address signal output to the external D-RAM Not used (open) Power supply terminal (+2.4V) (for I/O cell) Ground terminal (for I/O cell) Address signal output to the external D-RAM Not used (open) Row address strobe signal output to the external D-RAM "L" active Not used (open) Output enable signal output terminal "L" active Not used (open) Data write enable signal output terminal "L" active Not used (open) Column address strobe signal output to the external D-RAM "L" active Not used (open) Two-way data bus with the external D-RAM Not used (open) Power supply terminal (+1.8V) (for internal logic) Ground terminal (for internal logic) Address signal output to the external D-RAM Not used (open) Output enable signal output to the external D-RAM "L" active Not used (open) Data write enable signal output to the external D-RAM "L" active Not used (open) Digital in PLL oscillation input from the external VCO Not used (fixed at "L") Playback EFM full-swing output terminal Playback EFM asymmetry comparator voltage input terminal Power supply terminal (+2.4V) (analog system) Playback EFM asymmetry circuit constant current input terminal Playback EFM RF signal input from the SN761056DBT (IC501) Ground terminal (analog system) Phase comparison output for master clock of the recording/playback EFM master PLL Filter input for master clock of the recording/playback EFM master PLL Filter output for master clock of the recording/playback EFM master PLL Internal VCO control voltage input of the recording/playback EFM master PLL Light amount signal (RF/ABCD) peak hold input from the SN761056DBT (IC501) Light amount signal (RF/ABCD) bottom hold input from the SN761056DBT (IC501) Light amount signal input from the SN761056DBT (IC501) Focus error signal input from the SN761056DBT (IC501) Auxiliary signal input terminal Not used (fixed at "H") Middle point voltage (+1.2V) input terminal Monitor output of the A/D converter input signal Not used (open) A/D converter operational range upper limit voltage input terminal (fixed at "H" in this set) Power supply terminal (+2.4V) (analog system) Ground terminal (analog system) A/D converter operational range lower limit voltage input terminal (fixed at "L" in this set) Sled error signal input terminal Not used (open) Tracking error signal input from the SN761056DBT (IC501) Connected to the +2.4V power supply Error signal input for the laser automatic power control Not used (fixed at "H") ADIP duplex FM signal (22.05 kHz ± 1 kHz) input from the SN761056DBT (IC501) Power supply terminal (+2.2V) (for I/O cell) Ground terminal (for I/O cell) Center frequency control signal output terminal of internal circuit filter Not used (open)
51
Pin No. 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119
Pin Name XLRF CKRF DTRF APCREF LDDR VDC4 TRDR TFDR FFDR FRDR FS4 SRDR SFDR VSC4 SPRD SPFD FGIN
I/O O O O O O -- O O O O O O O -- O O I I O O -- -- O O O I I I O O O -- -- I I O O O -- -- -- -- --
Description Serial latch signal output terminal Not used (open) Serial clock signal output terminal Not used (open) Write data output terminal Not used (open) Control signal output to the reference voltage generator circuit for the laser automatic power control PWM signal output for the laser automatic power control Not used (open) Power supply terminal (+1.8V) (for internal logic) Tracking servo drive PWM signal () output to the XC111256FTA (IC551) Tracking servo drive PWM signal (+) output to the XC111256FTA (IC551) Focus servo drive PWM signal (+) output to the XC111256FTA (IC551) Focus servo drive PWM signal () output to the XC111256FTA (IC551) Clock signal output terminal (X' tal system 176.4 kHz) Not used (open) Sled servo drive PWM signal () output terminal Not used (open) Sled servo drive PWM signal (+) output terminal Not used (open) Ground terminal (for internal logic) Spindle servo drive PWM signal () output terminal Not used (open) Spindle servo drive PWM signal (+) output terminal Not used (open) FG signal input terminal for spindle servo Not used (open) Input terminal for the test (normally : fixed at "L") Muting applied to analog signal input in non-signal status causes the signal to be "H" automatically Not used (open) Spindle servo drive voltage control signal output to the XC111256FTA (IC551) Power supply terminal (+2.2V) (for I/O cell) Ground terminal (for I/O cell) Spindle servo (U) drive signal output to the XC111256FTA (IC551) Spindle servo (V) drive signal output to the XC111256FTA (IC551) Spindle servo (W) drive signal output to the XC111256FTA (IC551) Spindle servo (U) timing signal input from the XC111256FTA (IC551) Spindle servo (V) timing signal input from the XC111256FTA (IC551) Spindle servo (W) timing signal input from the XC111256FTA (IC551) Sled servo (1+) drive signal output to the XC111256FTA (IC551) Sled servo (1) drive signal output to the XC111256FTA (IC551) Sled servo (2+) drive signal output to the XC111256FTA (IC551) Power supply terminal (+1.8V) (for internal logic) Ground terminal (for internal logic) Sled servo (1) timing signal input from the XC111256FTA (IC551) Sled servo (2) timing signal input from the XC111256FTA (IC551) Sled servo (2) timing signal output to the XC111256FTA (IC551) Sled servo voltage control signal output to the XC111256FTA (IC551) By-pass transistor control signal output terminal Not used (open) Ground terminal (for internal 16M bit D-RAM) Power supply terminal (+2.4V) (for internal 16M bit D-RAM) Ground terminal (for internal 16M bit D-RAM) Power supply terminal (+2.4V) (for internal 16M bit D-RAM) Not used (open)
120 to 122 TEST1 to TEST3 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 to 168 MTFLGR SPVS VDI03 VSI03 SPDU SPDV SPDW SPCU SPCV SPCW SLDU SLDV SLDW VDC5 VSC5 SLCU SLCV SLCW SLVS BYPS DVSSDRAM DVDDDRAM DVSSDRAM DVDDDRAM NC
52
· SYSTEM BOARD IC801 CXR701080-010GA (SYSTEM CONTROLLER) Pin No. 1 2 3, 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 to 22 23 24 25 26 27 to 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Pin Name NC OFTRK NC NC SENSE NC XLAT XCS DSP NC SI0 SO0 SCK0 NC VSS VDD NC BEEP RMC DTCK NC XHP STBY CLV U CLV V CLV W NC LD ON NC SLD MON 1 PD S0 REG CTL CLK PD S1 FFCLR SLEEP NC NC XRST VSS XTAL EXTAL VDD NC SPDL START SW NC I/O I I I O I O O O O I O O I -- -- O O I/O O O O O O O O I I O O O O O I O I -- O I -- I/O O I Not used (open) Off track signal input from the CXD2661GA (IC601) Not used (open) Not used (open) Internal status (SENSE) input from the CXD2661GA (IC601) Not used (open) Serial data latch pulse output to the CXD2661GA (IC601) Chip select signal output to the CXD2661GA (IC601) Not used (open) Serial data input from the CXD2661GA (IC601) Serial data output to the CXD2661GA (IC601) Serial clock signal output to the CXD2661GA (IC601) and EEPROM (IC802) Not used (open) Ground terminal Power supply terminal (+2.4V) Not used (open) Beep sound control signal output to the headphone amp (IC301) TSB serial communication data input/output terminal for remote commander with headphone Not used (open) Standby on/off control signal output to the headphone amp (IC301) "L": standby mode, "H": amp on Spindle servo (U) drive signal input from the XC111256FTA (IC551) Spindle servo (V) drive signal input from the XC111256FTA (IC551) Spindle servo (W) drive signal input from the XC111256FTA (IC551) Not used (open) Laser diode on/off control signal output terminal Not used (fixed at "H") Sled servo timing signal input from the CXD2661GA (IC601) PD IC mode switching signal output to the optical pick-up block Synchronizing external clock signal output terminal Not used (open) PD IC mode switching signal output to the optical pick-up block Input latch output for starting signal to the MPC18A31FTA (IC901) System sleep control signal output to the MPC18A31FTA (IC901) "H": sleep on Not used (fixed at "L") Not used (open) System reset signal input from the MPC18A31FTA (IC901) "L": reset For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H" Ground terminal Main system clock output terminal (16.9344 MHz) Main system clock input terminal (16.9344 MHz) Power supply terminal (+2.4V) Not used (open) Spindle servo start switching signal output terminal Not used (open) "L": laser off, "H": laser on Not used (open) Description
53
Pin No. 51 52 53 54 55 56 57 58 59 60 61, 62 63 64 65 66 67 68 69 70 71, 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94, 95 96
Pin Name NC FOK SQSY NC XINT NC NC SERON NC XTEST SET CODE0, SET CODE1 SET CODE2 REG CTL PWM VRM PWM VC PWM SPDL PWM XIC RST OPR NC NC XHOLD SW VDD NC NC VSS VBKAN S MON VB MON NC VREF MON WK DET OPEN CLOSE SW RMC KEY SET KEY 1 SET KEY 2 NC VRM MON NC AD GND AVREF AVDD TEST0, TEST1 TDI
I/O I I I I I I O O O I I I O O O O O O I O I -- I O -- I I I I I I I I I I I I I -- I -- I I Not used (fixed at "H")
Description
Focus OK signal input from the CXD2661GA (IC601) "H": is input when focus is on ("L": NG) Subcode Q sync (SCOR) input from the CXD2661GA (IC601) "L" is input every 13.3 msec Almost all, "H" is input Not used (fixed at "H") Interrupt status input from the CXD2661GA (IC601) Not used (open) Not used (open) Series power supply control signal output to the MPC18A31FTA (IC901) Not used (open) Setting terminal for the test mode "L": test mode (normally: open) Destination setting terminal for the test mode Destination setting terminal for the test mode Fixed at "L" in this set Open in this set
Synchronizing external clock signal output to the MPC18A31FTA (IC901) VREM power supply voltage control PWM signal output to the MPC18A31FTA (IC901) System power supply voltage control PWM signal output to the MPC18A31FTA (IC901) Spindle servo drive voltage control PWM signal output to the XC111256FTA (IC551) Reset signal output to the SN761056DBT (IC501) and CXD2661GA (IC601) "L": reset OPR LED (D801) drive signal output terminal "H": LED on Not used (fixed at "L") Not used (open) HOLD switch (S808) input terminal "L": hold on Power supply terminal (+2.4V) Not used (open) Not used (open) Ground terminal Sub power supply input terminal Servo signal monitor input from the SN761056DBT (IC501) (A/D input) Un-regulator power supply voltage monitor input terminal (A/D input) Not used (fixed at "L") Reference voltage monitor input from the SN761056DBT (IC501) (A/D input) Set key starting detect signal input terminal (A/D input) Upper panel open/close detect switch (S809) input terminal (A/D input) "L": upper panel close Remote commander with headphone key input terminal (A/D input) Set key (S801 to 805) input terminal (A/D input) Set switch (S806) input terminal (A/D input) Not used (fixed at "H") VREM voltage monitor input terminal (A/D input) Not used (fixed at "L") Ground terminal (for A/D converter) Input terminal for power supply voltage adjustment reference voltage (+2.4V) (for A/D converter) Power supply terminal (+2.4V) (for A/D converter) Input terminal for the test (normally: fixed at "L") Data input terminal for JTAG scan test Not used (open) (x, >/N, .,VOL +/ keys input) (DIGITAL SOUND PRESET switch input)
54
Pin No. 97 98 99 100 101 102 103 104 105 106 107 to 109 110, 111 112 113, 114 115 116 117 118 119 120
Pin Name TMS TCX TRST TDO NC SSB DATA SSB CLK FLASH WR EN VDD VSS NC NC
XRST MTR DRV
I/O I I I O O I/O O I -- -- I O O I I O O O O O
Description Test mode control signal input terminal for JTAG scan test Not used (open) Clock signal input terminal for JTAG scan test Not used (open) Reset signal input terminal for JTAG scan test Not used (open) Data output terminal for JTAG scan test Not used (open) Not used (open) Two-way SSB serial data bus with the SN761056DBT (IC501) SSB serial clock signal output to the SN761056DBT (IC501) Write enable signal input terminal Not used (fixed at "H") Power supply terminal (+2.4V) Ground terminal Not used (fixed at "H") Not used (open) Reset signal output terminal "L": reset Not used (open) Not used (ope