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DM74LS393 Dual 4-Bit Binary Counter June 1989 DM74LS393 Dual 4-Bit Binary Counter General Description Features Each of these monolithic circuits contains eight master- Y Dual version of the popular 'LS93 slave flip-flops and additional gating to implement two indi- Y 'LS393 dual 4-bit binary counter with individual clocks vidual four-bit counters in a single package The 'LS393 Y Direct clear for each 4-bit counter comprises two independent four-bit binary counters each Y Dual 4-bit versions can significantly improve system having a clear and a clock input N-bit binary counters can densities by reducing counter package count by 50% be implemented with each package providing the capability Y Typical maximum count frequency 35 MHz of divide-by-256 The LS393 has parallel outputs from each Y Buffered outputs reduce possibility of collector commu- counter stage so that any submultiple of the input count tation freqency is available for system-timing signals Connection Diagram Function Table Count Sequence Dual-In-Line Package (Each Counter) Outputs Count QD QC QB QA 0 L L L L 1 L L L H 2 L L H L 3 L L H H 4 L H L L 5 L H L H 6 L H H L 7 L H H H

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