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Now downloading free:Catalyst Semiconductor CAT28C16A

Catalyst Semiconductor CAT28C16A free download

Memory, computer memory, flash memory, ram, eeprom, eprom schematics and info

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File name:28C16A.pdf
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Mfg:Catalyst Semiconductor
Model:CAT28C16A 🔎
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Descr:Datasheet: 16K-Bit CMOS PARALLEL E2PROM
Group:Electronics > Components > Integrated circuits > Memory
Uploaded:01-04-2005
User:dupator
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File name 28C16A.pdf

CAT28C16A 16K-Bit CMOS PARALLEL E2PROM FEATURES s Fast Read Access Times: 200 ns s Low Power CMOS Dissipation: s End of Write Detection: DATA Polling s Hardware Write Protection s CMOS and TTL Compatible I/O s 10,000 Program/Erase Cycles s 10 Year Data Retention s Commercial, Industrial and Automotive ­Active: 25 mA Max. ­Standby: 100 µA Max. s Simple Write Operation: ­On-Chip Address and Data Latches ­Self-Timed Write Cycle with Auto-Clear s Fast Write Cycle Time: 10ms Max Temperature Ranges DESCRIPTION The CAT28C16A is a fast, low power, 5V-only CMOS Parallel E2PROM organized as 2K x 8-bits. It requires a simple interface for in-system programming. On-chip address and data latches, self-timed write cycle with auto-clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling signals the start and end of the self-timed write cycle. Additionally, the CAT28C16A features hardware write protection. The CAT28C16A is manufactured using Catalyst's advanced CMOS floating gate technology. It is designed to endure 10,000 program/erase cycles and has a data retention of 10 years. The device is available in JEDEC approved 24-pin DIP and SOIC or 32-pin PLCC packages. BLOCK DIAGRAM A4­A10 ADDR. BUFFER & LATCHES INADVERTENT WRITE PROTECTION ROW DECODER 2,048 x 8 E2PROM ARRAY VCC HIGH VOLTAGE GENERATOR CE OE WE CONTROL LOGIC I/O BUFFERS TIMER DATA POLLING I/O0­I/O7 A0­A3 ADDR. BUFFER & LATCHES COLUMN DECODER 5089 FHD F02 © 1998 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice 1 Doc. No. 25033-00 2/98 CAT28C16A PIN CONFIGURATION DIP Package (P) A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC A8 A9 WE OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 SOIC Package (J,K) A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC A8 A9 WE OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 PLCC Package (N) VCC WE NC A7 NC NC NC A6 A5 A4 A3 A2 A1 A0 NC I/O0 4 3 2 1 32 31 30 5 29 6 28 7 27 8 26 9 25 TOP VIEW 10 24 11 23 12 22 13 21 14 15 16 17 18 19 20 I/O1 I/O2 I/O3 I/O4 VSS NC I/O5 A8 A9 NC NC OE A10 CE I/O7 I/O6 PIN FUNCTIONS Pin Name A0­A10 I/O0­I/O7 CE OE WE VCC VSS NC Function Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable 5V Supply Ground No Connect 5089 FHD F01 MODE SELECTION Mode Read Byte Write (WE Controlled) Byte Write (CE Controlled) Standby, and Write Inhibit Read and Write Inhibit H X CE L L L X H WE H OE L H H X H I/O DOUT DIN DIN High-Z High-Z Power ACTIVE ACTIVE ACTIVE STANDBY ACTIVE CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V Symbol CI/O(1) CIN(1) Test Input/Output Capacitance Input Capacitance Max. 10 6 Units pF pF Conditions VI/O = 0V VIN = 0V Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. Doc. No. 25033-00 2/98 2 CAT28C16A ABSOLUTE MAXIMUM RATINGS* Temperature Under B

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