datasheets 74ls669 free download

File name 74ls669.pdf

SN54/74LS669 SYNCHRONOUS 4-BIT UP/DOWN COUNTER The SN54 / 74LS669 is a synchronous 4-bit up/down counter. The LS669 is a 4-bit binary counter. For high speed counting applications, this presettable counter features an internal carry lookahead for cascading purposes. By clocking all flip-flops simultaneously so the outputs change coincident with SYNCHRONOUS 4-BIT each other (when instructed to do so by the count enable inputs and internal UP/DOWN COUNTER gating) synchronous operation is provided. This helps to eliminate output counting spikes, normally associated with asynchronous (ripple-clock) count- LOW POWER SCHOTTKY ers. The four master-slave flip-flops are triggered on the rising (positive-going) edge of the clock waveform by a buffered clock input. Circuitry of the load inputs allows loading with the carry-enable output of the cascaded counters. Because loading is synchronous, disabling of the counter by setting up a low level on the load input will cause the outputs to agree with J SUFFIX the data inputs after the next clock pulse. CERAMIC Cascading counters for N-bit synchronous applications are provided by the CASE 620-09 carry look-ahead circuitry, without additional gating. Two count-enable inputs 16 and a carry output help accomplish this function. Count-enable inputs (P and 1 T) must both be low to count. The level of the up-down input determines the direction of the count. When the input level is low, the counter counts down, and when the input is high, the count is up. Input T is fed forward to enable the N SUFFIX PLASTIC carry output. The carry output will now produce a low level output pulse with a CASE 648-08 duration equal to the high portion of the QA output when counting up and 16 when counting down equal to the low portion of the QA output. This low level 1 carry pulse may be utilized to enable successive cascaded stages. Regard- less of the level of the clock input, transitions at the P or T inputs are allowed. By diode-clamping all inputs, transmission line effects are minimized which D SUFFIX allows simplification of system design. SOIC