Agilent 5991-4081EN Improving IBIS-AMI Model Accuracy Model-to-Model and Model-to-Lab Correlation Case Stud free download

File name 5991-4081EN Improving IBIS-AMI Model Accuracy_ Model-to-Model and Model-to-Lab Correlation Case Stud

DesignCon 2014 Improving IBIS-AMI Model Accuracy: Model-to-Model and Model-to-Lab Correlation Case Studies Dong Yang, Broadcom Corporation [email protected] Yunong Gan, Broadcom Corporation [email protected] Vivek Telang, Broadcom Corporation [email protected] Magesh Valliappan, Broadcom Corporation [email protected] Fred S. Tang, Broadcom Corporation [email protected] Todd Westerhoff, SiSoft [email protected] Fanyi Rao, Agilent [email protected] Abstract As serial data link speed continues to increase and SerDes architecture becomes more complex, the IBIS Algorithmic Modeling Interface (IBIS-AMI) has become popular among system developers and SerDes vendors. To accurately and quickly predict high- speed link performance at a bit error rate (BER) of 1E-12 or lower, IBIS-AMI models need to accurately represent chip performance and be validated at certain levels. Two methods have been widely used to validate an IBIS-AMI model. The first method, model-to-model correlation, is used if the SerDes vendor already has an existing in-house models built on a certain computing platform (Matlab, C/C++, Python, etc.) and validated to be accurate. The second method, model-to-lab correlation, compares model simulation results to data acquired in lab testing. This paper presents case studies for both methods and compares favorable and unfavorable factors for both methods. 10G, 11.5G and 23G SerDes data are used as examples. Author(s) Biography Dr. Dong Yang is currently working with Broadcom Corporation with the high-speed interconnect products (HSIP) team and is responsible for designing and testing high- speed SerDes and AMI modeling. He received his Bachelor degree in Engineering from the University of Science and Technology of China (USTC) in 2001, Master of Applied Science (M.A.Sc), and Doctor of Philosophy (Ph.D.) in 2006 and in 2010, respectively from McMaster University, Canada. Yunong Gan is currently an IC Design Manager in the ING business unit at Broadcom Corp., Irvine, California. Since 2005, he has been working on SI and Modeling of high- speed SerDes for electrical and optical communication links. Previously, he was with Motorola and Corning and has developed transmitter and receivers for optical communication solutions. Yunong received his M.S. degree in Electrical Engineering from the University of Massachusetts at Amherst in 2000. He received his B.S. degree in Electronics Engineering from Tsinghua University, China in 1997. Vivek Telang is a Senior Director of Engineering in the Physical Layer Products Group in Broadcom, where he has been working since 2004. His area of expertise is the system- level design and implementation of high-speed SerDes systems used in Broadcom 10G and 25G backplane and front-panel products. His current responsibilities include the design of 25G-100G SerDes systems. Vivek received his Bachelor's degree in Electrical Engineering from the Indian Institute of Technology in Bombay, India