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Now downloading free:Daewoo Akf-0305_0315

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Size:A3 5. SCHEMATIC DIAGRAMS 5-1. BASIC Series AKF-0305 / AKF-0315 14 Size:A3 SCHEMATIC DIAGRAM 5-2. RDS Series AKF-0305 / AKF-0315 15 Size:A3 SCHEMATIC DIAGRAM 5-3. OIRT Series AKF-0305 / AKF-0315 16 10. FUNCTION OF MICOM IC 10-1. PIN CONFIGURATION (TOP VIEW) : RDS MODEL ONLY 30 FUNCTION OF MICOM IC 10-2. PIN DESCRIPTION PIN 1 80 78 77 PIN NAME XIN XOUT E01 E02 4.5MHz CRYSTAL PHASE COMPARISON OUTPUT PORT If the frequency of the partial oscillation is higher than the basic frequency, these output high, lower than the basic frequency, output low. Otherwise, these are high-z that those frequencies correspond. AM 2 nd CHARGE PUMP OUTPUT PORT. (AM FREQUENCY : 90kHz) CAN BE SUPPLIED UP TO 6.5V DESCRIPTION I/O I O O O 71 76 73 31 75 74 72 70 69 E03 VSS VDD VDD FMIN AMIN SUBPD HCTR LCTR O ---I I O I I FM VCO INPUT (the signal of the partial oscillation) * INPUT RANGE : 0.07~1.5 Vrms AM VCO INPUT (the signal of the partial oscillation) * INPUT RANGE : 0.07~1.5 Vrms Outputs the pll lock up signal to lock up the pll frequency in high speed. FM IF COUNT INPUT * INPUT RANGE : 10.7MHz + 30kHz, Vpp=0.07~1.5Vrms AM IF COUNT INPUT * INPUT RANGE : 450kHz + 1kHz (AM) : 450kHz + 0.37kHz (LW) * Vpp = 0.07 ~1.5Vrms To check if the memory state is normal on the back-up mode. The application circuit is illustrated on the note of back pages. To check if it is back-up mode(LOW) or normal operation state(HIGH), but it display clock depending on the clock option. Connect to ground. Dm-21 loading motor control port. MTR1 LOADING : HIGH EJECT : LOW STOP : LOW 31 68 SNS_ I 67 HOLD_ I 79 51 50 TEST1 TEST2 PL1 PL2 MTR2 LOW HIGH LOW --O O FUNCTION OF MICOM IC PIN 59 52 PIN NAME PJ1 PL0 DESCRIPTION DM-21 MAIN MOTOR CONTROL PORT. PLAY : FF/REW : STOP : MTR_ON HIGH HIGH LOW MTR_FF LOW HIGH LOW I/O O O 53 54 55 11 12 13 14 21 40 38 39 27 28 29 30 23 24 25 26 7 8 9 63 PK3 PK2 INT1 PE3/SI2 PE2/SO2 PE1/SCK2 PE0 PC1 PO0 PO2 PO1 PA3 PA2 PA1 PA0 PB3 PB2 PB1 PB0 PF3 PF2 PF1 PF3 INPUT DATUM FROM THE RDS DEMODULATOR IC THE TIMING CHART OF DATA IS ILLUSTRATED ON BACK PAGES. KEY & LCD DRIVER IC INTERFACE PORTS I I I I O O O O O O O I I I I O O O O I O O I DECK EQ IC MUTE ADJUST PORT. EVR IC INTERFACE PORTS. OPTION DIODE MATRIX INPUT. OPTION DIODE MATRIX OUTPUT. RDS DATA MEMORY EEPROM CONTROL PORT. MULTI-PATH INPUT PORT. * INPUT RANGE : 0.6~0.9V 35 PP1 LCD BACK-LIGHTING COLOR CONTROL PORT RESET : COLOR ---> LOW TWO KEY IN : COLOR CHANGE O 32 FUNCTION OF MICOM IC KEY MATRIX TABLE RETURN KI 1 (50) SOURCE KS 6 (49) KS 5 (48) KS 4 (47) KS 3 (46) KS 2 (45) KS 1 (44) T. UP M1 (AMS) M4 (SHUF) VOL UP TAPE/PGM KI 2 (51) T. DOWN M2 (DOLBY) M5 (DISC DOWN) VOL DOWN KI 3 (52) SEEK UP M3 (RPT) M6 (DISC UP) SELECTOR CDC/PAUSE AUX SEEK DOWN KI 4 (53) LOC TA/TA_STBY PTY(DISP) KI 5 (54) LOUD/LOC AF/REG ATP ----- POWER TAPE EJECT ON/OFF RADIO/BAND MUTE (LANG) MONO --- --- KEY MATRIX TABLE SOURCE RETURN ODR 3 (PA3, 27PIN) ODR 2 (PA2, 28PIN) ODR 1 (PA1, 29PI

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