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File name:emc.pdf
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Model:EMC 🔎
Original:EMC 🔎
Descr:Electro magnetic compatibility adn printed circuit boards constraints
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INTEGRATED CIRCUITS ESG89001 Electro magnetic compatibility and printed circuit board (PCB) constraints June 1989 Philips Semiconductors Philips Semiconductors Application note Electro magnetic compatibility and printed circuit board (PCB) constraints ESG89001 1. INTRODUCTION The routing of the traces on a Printed Circuit Board (PCB) largely effect the ElectroMagnetic Compatibility (EMC) performance of the PCB with respect to both ElectroMagnetic (EM) radiation as susceptibility to EM-fields. The PCB will connect electronic components such as passive components, transistors and ICs. Furthermore, cables to interconnect the PCB with other system parts, e.g., another PCB, signal generator, CATV wall-outlet, DC power source or an AC-mains connection, will largely influence the PCB with respect to EMC [7]. In order to get a PCB on which the circuits function properly, the trace routing, the placement of components/connectors and the decoupling used with certain ICs will have to be optimized according to the constraints given in this report. To reach an economic and functional PCB design, the following items have to be kept in mind: 3. Correct choice of the PCB format (mono, bi- or multi-layer) 4. Take care that "every" signaltrace has its signalreturn nearby 5. Proper decoupling for each IC or group of ICs 6. Allowed tracelengths and allowed loopareas 7. Placement of the connectors 8. Right cable choice with a proper connector 9. Proper use and placement of filters and filterparts. These items with the appropriate measures will be further explained. The main target is to get control over your PCB currents. 2.2. Transmissionlines By using the inductance of a single wire, Li, the mutual coupling, M, and the capacitance between the traces, Ci, a transmissionline, shown in Figure 2, can be defined of which the characteristic impedance, ZO, equals: ZO = (Leff / C) where: Leff = L1 + L2 2M, k = (L1 + L2) / M and C = C1 + C2. When the coupling, k, between the traces of the transmissionline is high, the effective inductance will decrease rapidly. Some coupling factors are given in Table 1. An indifferent signal path design (Figure 3a) can be changed into a transmissionline design (Figure 3b). This change will lower the effective inductance, Leff, between the two circuit blocks and will therefore lower the voltage drop between the two references of those circuits. 2. GENERAL 2.1. Conductors Single conductors have, as a rule of thumb, an inductance of 1H/m. At low frequencies only, below 1kHz, Rdc applies. These impedances, together with the currents that will flow through these impedances, will be responsible for the voltage drop between points as Ohms law applies. The voltage drop can be diminished by either reducing the impedance or lowering the current through that impedance. In typical digital designs the voltage drop will be frequency independent. A square wave current, resulting from a square wave output voltage to a resistive load, ca

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