Philips TDA4671 free download

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INTEGRATED CIRCUITS DATA SHEET TDA4671 Picture Signal Improvement (PSI) circuit Product specification Supersedes data of June 1993 File under Integrated Circuits, IC02 1996 Dec 11 Philips Semiconductors Product specification Picture Signal Improvement (PSI) circuit FEATURES · Luminance signal delay from 20 to 1100 ns (minimum step 45 ns) · Luminance signal peaking with symmetrical overshoots selectable · Selectable 2.6 or 5 MHz peaking centre frequency and degree of peaking (-3, 0, +3 and +6 dB) · Selectable noise reduction by coring · Handles negative as well as positive colour-difference signals · Selectable Colour Transient Improvement (CTI) to decrease the colour-difference signal transient times to those of the high frequency luminance signals · Selectable 5 or 12 V sandcastle input voltage · All controls selected via the I2C-bus · Timing pulse generation for clamping and delay time control synchronized by sandcastle pulse · Automatic luminance signal delay correction using a control loop · Luminance and colour-difference input signal clamping with coupling capacitor · 4.5 to 8.8 V supply voltage range · Minimum of external components. QUICK REFERENCE DATA SYMBOL VP IP(tot) td(Y) Vi(VBS)(p-p) Vi(CD)(p-p) PARAMETER supply voltage (pins 1 and 5) total supply current Y signal delay time composite Y input signal (peak-to-peak value, pin 16) colour-difference input signal (peak-to-peak value) ±(R - Y) on pin 3 ±(R - Y) on pin 7 GY GCD Tamb gain of Y channel gain of colour-difference channel operating ambient temperature - - - - 0 1.05 1.33 -1 0 - 1.48 1.88 - - 70 4.5 31 20 - MIN. 5 41 - 450 TYP. 8.8 52 1130 640 MAX. GENERAL DESCRIPTION TDA4671 The TDA4671 delays the luminance signal and improves colour-difference signal transients. The luminance signal can also be improved by peaking and noise reduction (coring). UNIT V mA ns mV V V dB dB °C ORDERING INFORMATION TYPE NUMBER TDA4671 1996 Dec 11 PACKAGE NAME DIP18 DESCRIPTION plastic dual in-line package; 18 leads (300 mil) 2 VERSION SOT102-1 Product specification TDA4671 Fig.1 Block diagram. handbook, full pagewidth 1996 Dec 11 100 nF 2 1 Vref GENERATION Vref I2C-BUS Vref Y delay sandcastle 5 V/12 V Vref CORING 5 MHz -0.5 sandcastle pulse SDA SCL 100 nF 15 10 9 I2C-BUS RECEIVER CTI on/off coring on/off peaking frequency degree of peaking VP1 = 5 to 8 V BLOCK DIAGRAM 17 Philips Semiconductors SANDCASTLE PULSE DETECTOR BK BK, H + V DELAY TIME CONTROL Y 100 ns 90 ns 16 BLACK LEVEL CLAMP + CORING 11 100 nF 100 nF 2.6 MHz Vref control signal -0.5 5 MHz 2.6 MHz I2C-BUS PEAKING Picture Signal Improvement (PSI) circuit 3 BLACK LEVEL CLAMP 180 ns +1 I2C-BUS 90 ns 45 ns 90 ns 100 ns BLACK LEVEL CLAMP 450 ns 180 ns + 100 nF 13 Vref TDA4671 analog switch 12 Y 14 100 nF Vref -(R - Y) 3 10 nF FULL-WAVE RECTIFIER HIGH-PASS FILTER BLACK LEVEL CLAMP 4 -(R - Y) I2C-BUS VT comparator 6 -(B - Y) analog switch 8 18 5 MED746 DIFFERENTIATOR BK FULL-WAVE RECTIFIER stor