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Now downloading free:xerox 19780925 Addresses In IOCBs

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File name:19780925_Addresses_In_IOCBs.pdf
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Descr: xerox sdd memos_1978 19780925_Addresses_In_IOCBs.pdf
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XEROX SDD ARCHIVES I have read and understood PageS_ _ _ _ _To._ __ Reviewer Date )(EROX :I of Pages --- Ref' " 78S/)/)..; /48 BUSINESS SYSTEMS System Development Department To: Metcalfe, Belleville, Gamer Datc: September 25, 1978 From: W. C. Lynch' Location: Palo Alto Subjcct: Addresses in IOCSs Organization: SDD/SD/SSW IPilot Archive document #: Binkley archive number Keywords: OIS PrinceOps, IOCB, Wildflower Filed on: [Iris] IOCBPrincOps.Memo Copies: Archives Irby Kennedy Lampson Liddle Lynch Thacker Townsend Wick As a resull of a recent conversation with Butler Lampson on the topic of 110 on Wildflower, a number of issues concerning the extent to which Wildflower meets the current OIS PrinceOps arose. The tone of the issues is that the current PrinceOps may not be suitable for the more modest processors in the OIS line. These issues all have to do with the question of whether or not the buffer addresses in CSBs and IOCBs should be virtual or real. As I see it the issues are: 1) If the buffer addresses are virtual, when are they bound to real addresses? The current PrinceOps is silent on this point and might lead one to believe that it is possible to race map changes against the I/O itself. The current implementation of the DO supports this to a large extent by means of its mapping hardware. I believe that this is excessive al\d useless generality and that virtual addresses should be considered bound to real address no later than the fetch of the IOCB for processing. Any map changes between that point in time and the completion of the IOCB would lead to undefined operation. I could easily be persuaded that the map should not be changed under an 10CB while it was chained on the CSB for processing. 2) If the buffer addresses are virtual and are bound (translated) at the felch of the IOCB, what happens when the buffer crosses a page boundry? There seem to be three possibilities: a) The processor is fast enough or powerful enough to rebind the incremented virtual address at each page crossing. (The DO uses a more extreme measure in that the memory control is powerful to rebind at eac

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