|5989-9849EN.pdf||Accelerate Design Verification by
Characterizing Clock Jitter Using
Phase Noise Measurements
Introduction Clock jitter analysis has become more necessary as data rates have increased.
In high-speed serial data links clock jitter affects data jitter at the transmitter,
in the transmission line, and at the receiver. Measurements of clock quality
assurance have also evolved; now the emphasis is on directly relating clock
performance to system performance in terms of the bit error ratio (BER).
This white paper reviews the role of the reference clock, the effect of clock
jitter on data jitter, and discusses a new measurement technique using the
Agilent E5001A precision clock jitter analysis application on the E5052B
signal source analyzer (SSA). This new method of measurement de|