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6x86 PROCESSOR
Superscalar, Superpipelined, Sixth-generation, x86 Compatible CPU
®
Advancing the Standards
Mechanical Specifications
5.0 5.1
MECHANICAL SPECIFICATIONS 296-Pin SPGA Package
The pin assignments for the 6x86 CPUin a 296-pin SPGA package are shown in Figure 5-1. The pins are listed by signal name in Table 5-1(Page 5-2) and by pin number in Table 5-2 (Page 5-3). Dimensions are shown in Figure 5-2 (Page 5-4) and Table 5-3 (Page 5-5).
37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
AN AM AL AK AJ AH AG
VSS A30
VSS A28 VSS
RESV
A4 A3 A29 A25
A6 A8 A7 A5 A31
A10 VSS
A11 A9
VCC VSS
A12 A13
VCC VSS
A14 A15
VCC VSS
A16 A17
VCC VSS
A18 A19
VCC VSS
A20
VCC VSS
RESV CLK
VCC VSS
SCYC
VCC VSS
BE6#
VCC VSS
BE4#
VCC VSS
BE2#
VCC
FLUSH# VSS W/R#
NC EADS#
NC ADSC#
NC
AN AM AL
BE0#
QDUMP# HITM# HIT# D/C#
PWT AP
NC
RESET
BE7#
BE5#
BE3#
BE1#
A20M#
AK
BREQ
ADS#
HLDA
AJ AH AG
A22
VCC VSS VCC NC A24
A26
A27 A21 A23
LOCK#
PCD
VSS
VCC
SMIACT# VSS
AF
AE AD
PCHK# APCHK# NC
AF
VCC
AE AD AC AB AA Z Y X W
VSS VCC
VSS
INTR NC
SMI#
NC NMI NC
VSS RESV VCC
VSS
AC AB
AA Z
HOLD
VCC
IGNNE# WM_RST
VSS NC
WB/WT#
RESV
VSS
VCC
BOFF#
Y X
W V U T
VCC
VSS
RESV
CLKMUL
NA#
BRDYC#
VSS
VCC
RESV
BRDY#
VCC
VSS
RESV
SUSPA#
SUSP#
6x86 CPU TOP VIEW
KEN#
EWBE#
VSS
VCC
AHOLD
V
VCC
VCC VSS VCC
VSS VCC
VCC
INV
CACHE# MI/O# VSS
U T
S
R Q P N M L K J H G F E D C B
DHOLD VSS
RESV
LBA#
RESV VSS
VCC
S
R Q P N M L K J H G F E D C B A
BHOLD NC TRST# TMS TDI TDO
TCK NC VCC D0 D60
RESV FERR# NC DP7 D62
D61 D59
VCC VSS VCC VSS
VCC VSS
RESV VSS D63 VSS
VCC
VCC
VCC VSS
VCC
VSS
D2
NC
RESV
D58
D56
D57
VSS
VCC
VCC D4
VCC
D1 D5
D6
D3 DP5
D7 D42 D46
D53 D51
D49
D55 DP6
D52
VCC
D54
DP0
D9 D11 D10
D8
D14 D13
D12
D17 D16
DP1
D21 D20
D19
D24 VSS
D23
DP2 VSS
D26
D25
D28
D27 VSS
D30
D29 VSS
DP3
D31 VSS
D33
D32 VSS
D35
D34 VSS
D37
D36 VSS
D39
D38 VSS
D40
DP4 VSS
D44
D45 VSS
D48
D47 D43
D50
NC NC
VSS VCC VCC
A
NC
D15
D18
D22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
D41
NC
37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
1740200
Figure 5-1. 296-Pin SPGA Package Pin Assignments PRELIMINARY 5-1
®
296-Pin SPGA Package
Advancing the Standards
Table 5-1. 296-Pin SPGA Package Signal Names Sorted by Pin Number
Pin A3 A5 A7 A9 A11 A13 A15 A17 A19 A21 A23 A25 A27 A29 A31 A33 A35 A37 B2 B4 B6 B8 B10 B12 B14 B16 B18 B20 B22 B24 B26 B28 B30 B32 B34 B36 C1 C3 C5 C7 C9 C11 C13 C15 C17 C19 C21 C23 C25 C27 Signal NC D41 Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc D22 D18 D15 NC NC D43 Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss D20 D16 D13 D11 NC D47 D45 DP4 D38 D36 D34 D32 D31 D29 D27 D25 DP2 D24 Pin C29 C31 C33 C35 C37 D2 D4 D6 D8 D10 D12 D14 D16 D18 D20 D22 D24 D26 D28 D30 D32 D34 D36 E1 E3 E5 E7 E9 E33 E35 E37 F2 F4 F6 F34 F36 G1 G3 G5 G33 G35 G37 H2 H4 H34 H36 J1 J3 J5 J33 Signal D21 D17 D14 D10 D9 D50 D48 D44 D40 D39 D37 D35 D33 DP3 D30 D28 D26 D23 D19 DP1 D12 D8 DP0 D54 D52 D49 D46 D42 D7 D6 Vcc DP6 D51 DP5 D5 D4 Vcc D55 D53 D3 D1 Vcc Vss D56 NC Vss Vcc D57 D58 Reserved Pin J35 J37 K2 K4 K34 K36 L1 L3 L5 L33 L35 L37 M2 M4 M34 M36 N1 N3 N5 N33 N35 N37 P2 P4 P34 P36 Q1 Q3 Q5 Q33 Q35 Q37 R2 R4 R34 R36 S1 S3 S5 S33 S35 S37 T2 T4 T34 T36 U1 U3 U5 U33 Signal D2 Vcc Vss D59 D0 Vss Vcc D61 D60 Vcc NC Vcc Vss D62 TCK Vss Vcc D63 DP7 TDO TDI Vcc Vss NC TMS Vss Vcc Reserved FERR# TRST# NC Vcc Vss Reserved BHOLD Vss Vcc Reserved LBA# Reserved DHOLD Vcc Vss MI/O# Vcc Vss Vcc CACHE# INV Vcc Pin U35 U37 V2 V4 V34 V36 W1 W3 W5 W33 W35 W37 X2 X4 X34 X36 Y1 Y3 Y5 Y33 Y35 Y37 Z2 Z4 Z34 Z36 AA1 AA3 AA5 AA33 AA35 AA37 AB2 AB4 AB34 AB36 AC1 AC3 AC5 AC33 AC35 AC37 AD2 AD4 AD34 AD36 AE1 AE3 AE5 AE33 Signal Vss Vcc Vss AHOLD SUSP# Vss Vcc EWBE# KEN# SUSPA# Reserved Vcc Vss BRDY# Reserved Vss Vcc BRDYC# NA# CLKMUL Reserved Vcc Vss BOFF# NC Vss Vcc Reserved WB/WT# WM_RST IGNNE# Vcc Vss HOLD SMI# Vss Vcc Reserved NC NMI NC Vcc Vss NC INTR Vss Vcc NC APCHK# A23 Pin AE35 AE37 AF2 AF4 AF34 AF36 AG1 AG3 AG5 AG33 AG35 AG37 AH2 AH4 AH34 AH36 AJ1 AJ3 AJ5 AJ33 AJ35 AJ37 AK2 AK4 AK6 AK8 AK10 AK12 AK14 AK16 AK18 AK20 AK22 AK24 AK26 AK28 AK30 AK32 AK34 AK36 AL1 AL3 AL5 AL7 AL9 AL11 AL13 AL15 AL17 AL19 Signal NC Vcc Vss PCHK# A21 Vss Vcc SMIACT# PCD A27 A24 Vcc Vss LOCK# A26 A22 BREQ HLDA ADS# A31 A25 Vss AP D/C# HIT# A20M# BE1# BE3# BE5# BE7# CLK RESET A19 A17 A15 A13 A9 A5 A29 A28 NC PWT HITM# QDUMP# BE0# BE2# BE4# BE6# SCYC Reserved Pin AL21 AL23 AL25 AL27 AL29 AL31 AL33 AL35 AL37 AM2 AM4 AM6 AM8 AM10 AM12 AM14 AM16 AM18 AM20 AM22 AM24 AM26 AM28 AM30 AM32 AM34 AM36 AN1 AN3 AN5 AN7 AN9 AN11 AN13 AN15 AN17 AN19 AN21 AN23 AN25 AN27 AN29 AN31 AN33 AN35 AN37 Signal A20 A18 A16 A14 A12 A11 A7 A3 Vss ADSC# EADS# W/R# Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss A8 A4 A30 NC NC NC FLUSH# Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc A10 A6 Reserved Vss
Note: Reserved pins are reserved for future use by Cyrix only. Pins marked NC are not internally connected.
5-2
PRELIMINARY
269-Pin SPGA Package
5
Pin AM12 AM14 AM16 AM18 AM20 AM22 AM24 AM26 AM28 AM30 AM8 AN37 B6 B8 B10 B12 B14 B16 B18 B20 B22 B24 B26 B28 H2 H36 K2 K36 M2 M36 P2 P36 R2 R36 T2 T36 U35 V2 V36 X2 X36 Z2 Z36 AA5 AM6 AA33
Table 5-2. 296-Pin SPGA Package Pin Numbers Sorted by Signal Name
Signal A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A20M# A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 ADS# ADSC# AHOLD AP APCHK# BE0# BE1# BE2# BE3# BE4# BE5# BE6# BE7# BHOLD BOFF# BRDY# BRDYC# BREQ CACHE# CLK Pin AL35 AM34 AK32 AN33 AL33 AM32 AK30 AN31 AL31 AL29 AK28 AL27 AK26 AL25 AK24 AL23 AK22 AL21 AK8 AF34 AH36 AE33 AG35 AJ35 AH34 AG33 AK36 AK34 AM36 AJ33 AJ5 AM2 V4 AK2 AE5 AL9 AK10 AL11 AK12 AL13 AK14 AL15 AK16 R34 Z4 X4 Y3 AJ1 U3 AK18 Signal CLKMUL D/C# D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 Pin Y33 AK4 K34 G35 J35 G33 F36 F34 E35 E33 D34 C37 C35 B36 D32 B34 C33 A35 B32 C31 A33 D28 B30 C29 A31 D26 C27 C23 D24 C21 D22 C19 D20 C17 C15 D16 C13 D14 C11 D12 C9 D10 D8 A5 E9 B4 D6 C5 E7 C3 Signal D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 DHOLD DP0 DP1 DP2 DP3 DP4 DP5 DP6 DP7 EADS# EWBE# FERR# FLUSH# HIT# HITM# HLDA HOLD IGNNE# INTR INV KEN# LBA# LOCK# MI/O# NA# NC NC NC NC NC NC NC NC NC Pin D4 E5 D2 F4 E3 G5 E1 G3 H4 J3 J5 K4 L5 L3 M4 N3 S35 D36 D30 C25 D18 C7 F6 F2 N5 AM4 W3 Q5 AN7 AK6 AL5 AJ3 AB4 AA35 AD34 U5 W5 S5 AH4 T4 Y5 A3 A37 AC35 AC5 AD4 AE3 AE35 AL1 AN1 Signal NC NC NC NC NC NC NC NC NC NMI PCD PCHK# PWT QDUMP# RESET SCYC Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved SMI# SMIACT# SUSP# SUSPA# TCK TDI TDO TMS TRST# Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Pin AN3 AN5 B2 C1 H34 L35 P4 Q35 Z34 AC33 AG5 AF4 AL3 AL7 AK20 AL17 AA3 AC3 AL19 AN35 J33 Q3 R4 S3 S33 W35 X34 Y35 AB34 AG3 V34 W33 M34 N35 N33 P34 Q33 A7 A9 A11 A13 A15 A17 A19 A21 A23 A25 A27 A29 AA1 Signal Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Pin AA37 AC1 AC37 AE1 AE37 AG1 AG37 AN11 AN13 AN15 AN17 AN19 AN21 AN23 AN25 AN27 AN29 AN9 E37 G1 G37 J1 J37 L1 L33 L37 N1 N37 Q1 Q37 S1 S37 T34 U1 U33 U37 W1 W37 Y1 Y37 AB2 AB36 AD2 AD36 AF2 AF36 AH2 AJ37 AL37 AM10 Signal Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss WB/WT# W/R# WM_RST
Note: Reserved pins are reserved for future use by Cyrix only. Pins marked NC are not internally connected.
PRELIMINARY
5-3
®
296-Pin SPGA Package
Advancing the Standards
D D1 S1 1.65 REF.
SEATING PLANE L
E2
E1
D
B
Pin C3
2.29 REF. 1.52
45 CHAMFER (INDEX CORNER)
o
A1 A2 A D
D3 D2
HEAT SPREADER
BRAZE METALIZATION
D4
D4
1739001
Figure 5-2. 296-Pin SPGA Package 5-4 PRELIMINARY
296-Pin SPGA Package
5
Table 5-3. 296-Pin SPGA Package Dimensions
SYMBOL MILLIMETERS MIN MAX MIN INCHES MAX
A A1 A2 B D D1 D2 D3 D4 E1 E2 L S1
2.92 0.33 2.46 0.43 49.28 45.47 31.50 Sq. 34.29 7.49 2.41 1.14 2.97 1.65
4.11 0.43 3.10 0.51 49.91 45.97 32.00 Sq. 36.50 6.71 2.67 1.40 3.38 2.16
0.115 0.013 0.097 0.017 1.940 1.790 1.240 Sq. 1.350 0.295 0.095 0.045 0.117 0.065
0.162 0.017 0.122 0.020 1.965 1.810 1.260 Sq. 1.437 0.264 0.105 0.055 0.133 0.085
PRELIMINARY
5-5
®
Thermal Characteristics
Advancing the Standards
5.2
Thermal Resistances
Three thermal resistances can be used to idealize the heat flow from the junction of the 6x86 CPU to ambient:
JC = thermal resistance from junction to case in °C/W CS = thermal resistance from case to heatsink in °C/W, SA = thermal resistance from heatsink to ambient in °C/W, CA = CS + SA, thermal resistance from case to ambient in °C/W.
TC = TA + P * CA (where TA = ambient temperature and P = power applied to the CPU). To maintain the case temperature under 70°C during operation CA can be reduced by a heatsink/fan combination. (The heatsink/fan decreases CA by a factor of three compared to using a heatsink alone.) The required CA to maintain 70°C is shown in Table 5-4. The designer should ensure that adequate air flow is maintained to control the ambient temperature (TA) .
Table 5-4. Required
Part Number Frequency (MHz)
qCA to Maintain 70°C Case Temperature
qCA For Different Ambient Temperatures
25°C 30°C 35°C 40°C 45°C
Maximum Power (W)
6x86 - P120+ 6x86 - P133+ 6x86 - P150+ 6x86 - P166+
100 110 120 133
19.44 20.88 21.96 23.76
2.31 2.16 2.05 1.89
2.06 1.92 1.82 1.68
1.80 1.68 1.59 1.47
1.54 1.44 1.37 1.26
1.29 1.20 1.14 1.05
In most cases a heatsink/fan similar to one of two assemblies made by Thermalloy is recommended. Thermalloy heatsink/fan part number TCM20750 (CA = 1.28°C/W) can be used with the 6x86-P90+, 6x86-P120+, 6x86-P133+, and the 6x86-P150+ CPU in a typical PC system environment. A slightly larger Thermalloy heatsink/fan assembly, part number TCM20789 (CA = 1.13°C/W), is recommended for the 6x86-P166+ CPU. Refer to the Application Note titled "Cyrix 6x86 Thermal Design Considerations" for more information. The typical 6x86 296-pin PGA-package value for JC is 0.9 °C/W.
5-6
PRELIMINARY
Thermal Characteristics
5
Table 5-5 Heatsink/Fan Dimensions
Dimension TCM20750 Inches mm TCM20789 Inches mm
A B C D E
1.885 1.900 0.650 1.241 1.575
47.88 48.26 16.51 31.51 40.00
2.015 2.100 0.650 1.044 1.969
51.18 53.34 16.51 26.51 50.00
Figure 5-3. Typical HeatSink/Fan
PRELIMINARY
5-7