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Download datasheets 74ls113 docs - Various electronics service manuals

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File name:74ls113.pdf
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datasheets

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74ls113

Original Chassis:74ls113
Descr: . Electronic Components Datasheets Various datasheets 74ls113.pdf
Group:Electronics > Other >
Uploaded:2020-07-16 06:42:12
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74ls113.pdfSN54/74LS113A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K DUAL JK NEGATIVE inputs may be allowed to change when the clock pulse is HIGH and the EDGE-TRIGGERED FLIP-FLOP bistable will perform according to the truth table as long as minimum setup times are observed. Input data is transferred to the outputs on the LOW POWER SCHOTTKY negative-going edge of the clock pulse. LOGIC DIAGRAM (Each Flip-Flop) J SUFFIX

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