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Now downloading free:Agilent 5990-9111EN Simulating High-Speed Serial Channels with IBIS-AMI Models c20140829 [19]


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5990-9111EN Simulating High-Speed Serial Channels with IBIS-AMI Models c20140829 [19].pdfKeysight Technologies Simulating High-Speed Serial Channels with IBIS-AMI Models Bob Sullivan, Michael Rose, Jason Boh Application Note Introduction The Input/Output Buffer Information Specification (IBIS) has been an essential component of the electrical simulation toolbox for nearly two decades. Many design engineers are familiar with the application of IBIS models and for the most part, the models have provided an accurate, easy-to-use alternative to SPICE-based transistor models. In fact, most IBIS models are simple behavioral translations of a vendor's SPICE buffer model. However, as serial interface bit rates increase, critical limitations with IBIS models have become more acute. With the current (version 5.0) of the IBIS specification, an important algorithmic modeling component has been added to the conventional behavioral analog IBIS model. Several earlier efforts were made to add a mixed

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