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Now downloading free:Samsung K4S281632B-N

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File information:
File name:2Mx16Bitx4Banks DRAM.pdf
[preview K4S281632B-N]
Size:64 kB
Model:K4S281632B-N 🔎 K4S281632BN
Original:K4S281632B-NC/L1H, K4S281632B-NC/L1L 🔎
Descr:Datasheets 2M x 16Bit x 4 Banks Synchronus DRAM in sTSOP - pag. 8
Group:Electronics > Components > Integrated circuits >
Multipart:No multipart

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2Mx16Bitx4Banks DRAM.pdfshrink-TSOP K4S281632B-N 2M x 16Bit x 4 Banks Synchronous DRAM in sTSOP FEATURES JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS latency (2 & 3) - Burst length (1, 2, 4, 8 & Full page) - Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock. Burst read single-bit write operation DQM for masking Auto & self refresh 64ms refresh period (4K cycle) CMOS SDRAM GENERAL DESCRIPTION The K4S281632B-N is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNGs high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidt

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