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Descr:Philips Quality Data Sheet
Group:Electronics > Components > Integrated circuits >
Uploaded:2004-07-21 19:39:44
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Tda4691.pdfINTEGRATED CIRCUITS DATA SHEET TDA4691 Sync Processor with Clock (SPC) Preliminary specification File under Integrated Circuits, IC02 September 1993 Philips Semiconductors Preliminary specification Sync Processor with Clock (SPC) FEATURES Sync processor for horizontal (H) and vertical (V) sync pulses generated by internal 13.5 MHz oscillator Stable `On Screen Display (OSD)', if no input signal is present with free running internal oscillator; automatic turn over to locked oscillator, if input signal is available External clock oscillator can be used Standard 50/60 Hz signals are identified automatically Additional outputs for 13.5 MHz, composite sync, 50//60 Hz identification, signal identification (mute), super-sandcastle 12 V TTL compatible outputs (H, V, composite sync and 13.5 MHz) 3 different time constants for the PHI1 PLL: fast, normal and slow (T1, T2 and T3). Fast and normal time constant are set independent from each other Start of H-pulse definable by ap

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