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leading edge Low-cost, high-signal-quality synthesized-clock generator replaces RF synthesizer in many applications tanford Research Systems' $2490 CG635 S synthesized-clock generator provides precise, low-jitter digital-clock signals for applications ranging from digital-circuit reduce aging, you can add an design to communications- optional oven-stabilized crys- network testing. You can set tal oscillator or rubidium fre- the clock frequency from quency standard. You can also 0.001 Hz to 2.05 GHz. Rise lock the CG635 to an external and fall times are as short as 10-MHz timebase. The CG635 synthesized-clock generator produces extremely clean, low-jit- 100 psec. Jitter is less than 1 Compared with a typical ter clock signals over a frequency range of 0.001 Hz to 2.05 GHz. The cost psec rms. At 622.08 MHz, RF synthesizer, the CG635 has is a fraction of that of RF synthesizers, which, until now, have been the phase noise at a 100-Hz offset many similarities: excellent only type of instrument suitable for producing many of the clock signals is below a 80-dBc/Hz level, frequency resolution, low the new generator produces. and the spurious response is phase noise, and low spurious below a 70-dBc level. Using output levels. The new gener- The optional clock-receiver speed transitions at standard the optional 10-MHz rubidi- ator offers several advantages, modules, which connect to the logic levels on SMA connec- um timebase, aging is less however: output frequencies CG635 via Category 6 cable tors.--by Dan Strassberg than 0.0005 ppm/year, and as low as 0.001 Hz, multiple and may be a substantial dis- Stanford Research Sys- temperature instability is less square-wave outputs to 2.05 tance from the instrument, tems, 1-408-744-9040, than 0.0001 ppm. GHz, and much lower cost. provide complementary high- You can set the CG635 out- puts to standard logic levels, including CMOS, ECL (emit- Quad processors power new DSP board ter-coupled logic), PECL Curtiss-Wright Controls Embedded Computing recently announced the Compact (positive ECL), and LVDS Champ-AV IV, a high-performance CompactPCI DSP board that derives its power from (low-voltage differential sig- four Freescale ( MPC7448 PowerPC processors. The board complies naling). You can also contin- with the CompactPCI packet-switching-backplane specification and provides DSP applica- uously adjust offset and am- tions with as much as 48 GFLOPS of peak computational power. Each of the board's four plitude between 5 and 5V. A processing nodes comprises a 1.5-GHz 7448 processor; 256 or 512 Mbytes of DDR-

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