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Now downloading free:AMD HyperTransport DUT Connector Specification

AMD HyperTransport DUT Connector Specification free download

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File name:HyperTransport DUT Connector Specification.pdf
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File name HyperTransport DUT Connector Specification.pdf

DUT Connector Definition and Test Environment for HyperTransport Proposal from PMC-Sierra, Inc. Brian Holden Mike Meschke Edited by Broadcom Corporation Mark Hayter Edited by Altera Corporation Ziad Abu-Lebdeh Edited by Advanced Micro Devices Renato D'Orfani Version 14 Introduction HyperTransport has a strong need for compatibility testing. An important enabling element for compatibility testing is to define a standardized connector to use between HT compatibility testing boards. Along with the connector, a mechanical specification is required to allow interoperation. The Consortium does not make claims of suitability of this connector for production boards as it remains outside the scope of this effort. It will remain up to the individual companies, producer or consumers of HyperTransport devices to determine this connector's applicability for their specific product design. Requirements: 1. Standardized connector 2. Standardized, reliable mechanical arrangement 3. Allows good signal integrity 4. Provides a means of making long HT daisy chains 5. Provides a means of making HT Switch test configurations 6. Mounted horizontally for easy probe access 7. Supports 2, 4, 8, or 16 bit operation Optional Requirements 1. Useful for Daughter-Card applications 2. Compatible with the HT 2.x proposal 3. Supplies power to board 4. Supports Dual Host Mode 5. Supports 32 bit operation 6. Allows the probing connector to be used Connector The specified connectors are the Samtec male connector (QSE) for the top of the board and the Samtec female connector (QTE) for the bottom of the board. The connectors are normally mounted in pairs to give maximum flexibility in connecting HT chains, on HT 2.0 the signal integrity may not allow the stubs caused by the second connector so the configurations are more constrained. The connector on the bottom of the board is always mounted rotated 180 degrees with respect to the one on the top of the board with most of the connector pads sharing vias so that pin n of the topside QSE connector is common with pin 161-n of the bottomside QTE connector (this is not true for a few slow speed signals). The connector pair on the left side of a board is rotated with respect to the connector pair on the right side of the board. These orientations seem strange, but allow a wider range of test configurations, and are best explained using the examples below. Both connectors are not required to be on each board. It may be useful to put connectors on both the top and bottom to allow daisy chains of connectors to be constructed.

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