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File name:4032.pdf
Size:290 kB
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Mfg:ST
Model:4032 🔎
Original:CMOS 4xxx 🔎
Descr:TRIPLE SERIAL ADDER
Group:Electronics > Components > Integrated circuits
Uploaded:21-04-2005
User:dupator
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File name 4032.pdf

HCF4032B TRIPLE SERIAL ADDER s s s s s s s s s INVERT INPUTS ON ALL ADDERS FOR SUM COMPLEMENTING APPLICATIONS FULLY STATIC OPERATION...DC TO 10MHz (Typ.) at VDD = 10V BUFFERED INPUTS AND OUTPUTS SINGLE PHASE CLOCKING QUIESCENT CURRENT SPECIFIED UP TO 20V STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B " STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES" DIP SOP ORDER CODES PACKAGE DIP SOP TUBE HCF4032BEY HCF4032BM1 T&R HCF4032M013TR DESCRIPTION The HCF4032B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4032B consists of three serial adder circuits with common CLOCK and CARRY-RESET inputs. Each adder has two provisions for two serial DATA INPUT signals and an INVERT command signal. When the command signal is a logical "1", the sum is complemented. Data words enter the adder with the least significant bit first; the sign bit trails. The output is the MOD 2 sum of the input bits plus the carry from the previous bit position. The carry is only added at the positive going clock transition, thus, for spike-free operation the input data transitions should occur as soon as possible after the triggering edge. The CARRY is reset to a logical "0" at the end of each word by applying a logical "1" signal to a CARRY-RESET input one bit position before the application of the first bit of the next word. PIN CONNECTION September 2001 1/9 HCF4032B IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 10, 13, 15 11, 12, 14 7, 5, 2 9, 4, 1 3 6 8 16 SYMBOL A1 to A3 B1 to B3 INVERT1 to INVERT3 SUM1 to SUM3 CLOCK CARRY-RES ET VSS VDD NAME AND FUNCTION Data Inputs Data Inputs Invert Command Inputs Data Outputs Clock Input Carry Reset Input Negative Supply Voltage Positive Supply Voltage FUNCTIONAL DIAGRAM 2/9 HCF4032B LOGIC DIAGRAM TIMING CHART 3/9 HCF4032B ABSOLUTE MAXIMUM RATINGS Symbol VDD VI II PD Top Tstg Supply Voltage DC Input Voltage DC Input Current Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature Storage Temperature Parameter Value -0.5 to +22 -0.5 to VDD + 0.5 ± 10 200 100 -55 to +125 -65 to +150 Unit V V mA mW mW °C °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage. RECOMMENDED OPERATING CONDITIONS Symbol VDD VI Top Supply Voltage Input Voltage Operating Temperature Parameter Value 3 to 20 0 to VDD -55 to 125 Unit V V °C 4/9 HCF4032B DC SPECIFICATIONS Test Conditions Symbol Parameter VI (V) 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 0.5/4.5 1/9 1.5/18.5 0.5/4.5 9/1 1.5/18.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 VO (V) IO VDD (µA) (V) 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 10 15 18 TA = 25°C Min. Typ. 0.04 0.0

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