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Model:STV223XD/3X/4X 🔎
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Group:Electronics > Components > Integrated circuits
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File name STV22xx_2.pdf

STV223XD/3X/4X Figure 6:Linear Volume Control Curve (7 bits, reg. 05 d6-d0, reg. 05 d7 = 0) Volume Control Attenuation (dB) 0 Figure 7:Non-Linear Volume Control Curve (6 bits, reg. 05 d6-d1, reg. 05 d7 = 1) Volume Control Attenuation (dB) 0 -20 -20 -40 -40 -60 -60 -80 0 50 100 150 Code (decimal) -80 0 10 20 30 40 50 60 70 Code (decimal) I2C Bus Charateristics Symbol SCL VIL VIH ILI fSCL tR tF CI SDA VIL VIH ILI CI tR tF VOL tF CL CI Low Level input Voltage High Level input Voltage Input Leakage Current Input Capacitance Input rise Time Input Fall Time Low Level Output Voltage Output Fall Time Load Capacitance Input Capacitance 1.5V to 3V 1.5V to 3V IOL = 3mA 3V to 1.5V VIN = 0 to VCC -0.5 3 -10 1.5 VCC+0.5 10 10 1.000 300 0.4 250 400 10 V V µA pF ns ns V ns pF pF Low Level Input Voltage High Level Input Voltage Input Leakage Current Clock frequency Input rise Time Input Fall Time Input Capacitance 1.5V to 3V 1.5V to 3V VIN = 0 to VCC -0.5 3 -10 0 1.5 VCC+0.5 10 100 1.000 300 10 V V µA kHz ns ns pF Parameter Test Conditions Min. Typ Max. Unit 34/72 STV223XD/3X/4X ELECTRICAL CHARACTERISTICS (continued) I2C Bus Charateristics Symbol TIMING tLOW tHIGH tSU,DAT tHD,DAT tSU,STO tBUF tHD,STA tSU,STA Parameter Test Conditions Min. Typ Max. Unit Clock Low period Clock High period Data Set-up Time Data Hold Time Set-up Time from Clock High to Stop Start Set-up Time following a Stop Start Hold Time Start Set-up Time following Clock Low to High Transition 4.7 4 250 0 4 4.7 4 4.7 340 µs µs ns ns µs µs µs µs Figure 8:I2C Bus Timing SDA tBUF tLOW tSU,DAT SCL tHD,STA tR tHD,DAT tHIGH tF tSU,STO SDA tSU,STA I2C BUS SPECIFICATIONS Data transfers follow the usual I2C format: after the start condition (S), a 7-bit slave address is sent, followed by an eight-bit which is a data direction bit (W). An 8-bit sub-address is sent to select a register, followed by an 8-bit data word to be included in the register. The IC's I2C bus decoder permits the automatic incrementation mode in write mode. The circuit operates up to clock frequencies of 400 kHz. String Format Write only mode (S = start condition, P = stop condition, A = acknowledge) S SLAVE ADDRESS 0 A SUB-ADDRESS A DATA A P Read only mode S SLAVE ADDRESS 1 A DATA 0 A DATA 1 A DATA 2 A DATA 3 A P Slave Address Address Value Write Address: Read Address: A7 1 10001010 10001011 A6 0 A5 0 A4 0 A3 1 A2 0 A1 1 A0 X 35/72 STV223XD/3X/4X I2C BUS SELECTION (continued) STV2238D: Summary Input Signals (Write Mode) Reg.Addr. (Hex) DATA D7 DATA D6 DATA D5 DATA D4 DATA D3 DATA D2 DATA D1 DATA D0 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E PIFVCO Free Running Fine Adjustment Not to be used 1F PIF AFC NEG/POS Over-modulaL/L' Mode PIFVCO Free Running Coarse Adjustment Defeat Modulation tion CVBS Output Not to be used CVBS Output Amplitude Adjustment Tuner AGC gain Tuner AGC Starting Point Adjustment QSS and Main Audio FM/AM OutFM Intercarrier FM devi



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