ST 4510 free download

File name 4510.pdf

HCF4510B PRESETTABLE BCD UP/DOWN COUNTER s s s s s s s s s MEDIUM SPEED OPERATION : 8 MHz (Typ.) at 10V SYNCHRONOUS INTERNAL CARRY PROPAGATION RESET AND PRESET CAPABILITY STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIF. UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES" DIP ORDER CODES PACKAGE DIP TUBE HCF4510BEY T&R DESCRIPTION HCF4510B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP package. It is a PRESETTABLE BCD UP/DOWN COUNTER consists of four synchronously clocked D-type flip-flops (with a gating structure to provide T-type flip-flop capability) connected as a counter. This counter can be cleared by a high level on the RESET line, and can be preset to any binary number present on the jam inputs by a high level on the PRESET ENABLE line. This device will count out of non-BCD counter states in a maximum of two clock pulses in the up mode and PIN CONNECTION a maximum of four clock pulses in the down mode. If the CARRY IN input is held low, the counter advances up or down on each positive going clock transition. Synchronous cascading is accomplished by connecting all clock inputs in parallel and connecting the CARRY OUT of a less significant stage to the CARRY IN of a more significant stage. HCF4510B can be cascaded in the ripple mode by connecting all clock inputs in parallel and connecting the CARRY OUT to the clock of the next stage. If the UP/DOWN input changes during a terminal count, the CARRY OUT must be gated with the clock, and the UP/DOWN input must change while the clock is high. This method provides a clean clock signal to the subsequent counting stage. September 2002 1/11 HCF4510B IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 4, 12, 13, 3 6, 11, 14, 2 15 10 5 7 9 8 16 SYMBOL PRESET ENABLE P1 to P4 Q1 to Q4 CLOCK UP/DOWN CARRY-IN CARRY-OUT RESET VSS VDD NAME AND FUNCTION Preset Enable Input Inputs Outputs Clock Input Up/Down Control Input Carry Input Carry Output Reset Input Negative Supply Voltage Positive Supply Voltage FUNCTIONAL DIAGRAM TRUTH TABLE CL X CARRY-IN (Cl) H L L X X X : Don't Care UP/DOWN X H L X X PRESET ENABLE L L L H X RESET L L L L H ACTION NO COUNT COUNT UP COUNT DOWN PRESET RESET X X 2/11 HCF4510B LOGIC DIAGRAM TIMING CHART 3/11 HCF4510B ABSOLUTE MAXIMUM RATINGS Symbol VDD VI II PD Top Tstg Supply Voltage DC Input Voltage DC Input Current Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature Storage Temperature Parameter Value -0.5 to +22 -0.5 to VDD + 0.5 ± 10 200 100 -55 to +125 -65 to +150 Unit V V mA mW mW °C °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage